RU2227345C2 - Hybrid integrated circuit of shf range - Google Patents

Abstract

FIELD: electronics, development of HICs for solid modules. SUBSTANCE: crystal of semiconductor device is located in recess in face side of dielectric substrate of board, blind metallized holes are made on backside of dielectric substrate. Metallization of holes is used as lower plates of capacitors, dielectric of capacitors is residual thickness of bottom of dielectric substrate in blind metallized holes. Upper plates of capacitors are arranged in composition of topological pattern of metallization on face side of dielectric substrate and thickness of substrate between metallized holes and sides of recess is equal to 0.001-1.0 mm. EFFECT: improved heat dissipation from crystal of semiconductor device, enhanced functional reliability of hybrid integrated circuit. 8 cl, 1 dwg

Description

The invention relates to electronic equipment, namely to the design of hybrid microwave integrated circuits.

A hybrid microwave integrated circuit is known that contains a dielectric board with a topological pattern on the front side of the board and a shield ground metallization on the back side connected to the metal base, a capacitor connected to the bottom plate through the hole in the board, the top plate located in the topological pattern metallization, and the dielectric of the capacitor is the board material [1].

The disadvantages of this technical solution are low weight and size characteristics and low power dissipation.

The closest technical solution is a microwave microwave integrated circuit containing a dielectric substrate with a topological metallization pattern on the front side and screen grounding metallization on its reverse side, capacitors under which there are metallized holes, while the lower plates of the capacitors are connected through metallized holes with a screen ground metallization, a recess on the front side of the dielectric substrate in which the crystal is placed and fixed the semiconductor device is flush with the front surface of the dielectric substrate, the contact pads of the crystal of the semiconductor device are connected by conductors to the upper plates of the capacitors and the topological pattern of metallization, the heat sink is connected to the screen grounding metallization by a binder of electrically and thermally conductive substance, and the capacitors are made in the form of crystals located in one figured recess with a crystal of a semiconductor device so that the upper plates are tsya coplanar with the topological pattern board [2].

The disadvantages of this technical solution are low reliability and power dissipation.

The technical result of the invention is to improve heat dissipation from a crystal of a semiconductor device and increase reliability.

The technical result is achieved by the fact that in the well-known hybrid integrated circuit of the microwave range, containing a dielectric substrate, on the front side of which there is a topological metallization pattern, and on the reverse side there is a screen grounding metallization, capacitors under which there are metallized holes, while the lower plates of the capacitors are connected through metallized holes with screen grounding metallization, a recess on the front side of the dielectric substrate in which it is placed and fixed with a binder, the crystal of the semiconductor device is flush with the front surface of the dielectric substrate, the contact pads of the crystal of the semiconductor device are connected by conductors with the upper plates of the capacitors and the topological metallization pattern, the heat sink base connected to the screen grounding metallization by a binder of electrical and heat conductive material, the metallized holes are made blind with the front sides of the dielectric substrate with a bottom thickness of 0.001-0.5 mm, the metallization of which serves as the lower plates of the capacitors, and the upper plates of the capacitors are made as part of the topological pattern of metallization, the thickness of the substrate between the metallized holes, blind from the front of the dielectric substrate, and the sides of the recess is equal to 0.001-1 mm

Metallized holes, deaf on the front side of the dielectric substrate, can be completely or partially filled with electrical and heat-conducting material.

The recess on the front side of the dielectric substrate can be metallized.

Heat-conducting inserts can be located and fixed with a binder in the metallized holes that are deaf on the front side of the dielectric substrate.

In the bottom of the recess on the front side of the dielectric substrate, metallized holes with a diameter of 0.01 mm to the diameter of the inscribed circle in the projection of the crystal of the semiconductor device can be made and filled with electrical and heat-conducting material.

Metallized holes in the bottom of the recess can be made blind.

The side walls of the recess can be inclined at an angle of 90.1-150 ° to the plane of the surface of the dielectric substrate, and the gaps between the side walls of the recess and the crystal of the semiconductor device can be equal to or less than 0.4 mm

Metallized holes, deaf on the front side of the dielectric substrate, can have a wall inclination of 90.1-150 ° to the plane of the reverse side of the dielectric substrate.

The implementation of metallized holes blind from the front of the dielectric substrate, with a metallized bottom and the location of the upper lining as part of the topological metallization pattern will allow the metallization of the bottom of blind holes as the lower plates of the capacitors, the residual thickness of the dielectric substrate in the holes as the dielectric of the capacitor, to form capacitors in the circuit board and thereby exclude part of the welded and soldered joints from the design of the hybrid integrated circuit, and It starts to increase its reliability.

The thickness of the bottom of the metallized holes, blind from the front of the dielectric substrate, within the limits specified in the claims, will ensure the preservation of strength, which means reliability of the structure, the thickness of the bottom less than 0.001 mm will not provide the necessary strength, and more than 0.5 mm does not make sense, so it does not affect reliability and reduces the capacitor capacitance produced.

The implementation of the thickness of the substrate between the metallized holes and the sides of the recess within the limits specified in the claims will increase reliability, the thickness of the substrate less than 0.001 mm will not provide sufficient strength and reliability, and more than 1 mm will not significantly affect heat dissipation and therefore will not increase reliability.

Filling of fully or partially metallized holes, deaf on the front side of the dielectric substrate, with electric and heat-conducting material will improve the heat dissipation from the crystal of the semiconductor device and increase the strength of the structure, which means its reliability.

The implementation of the recesses on the front side of the dielectric substrate will improve the thermal contact of the crystal of the semiconductor device with the dielectric substrate, and thus improve heat dissipation from the crystal of the semiconductor device.

The location and fixing of the binder in the metallized holes, blind from the front of the substrate, heat-conducting inserts will increase the heat dissipation from the crystal of the semiconductor device, and thus increase the reliability.

Performing metallized holes in the bottom of the recess on the front side of the dielectric substrate and filling it with electric and heat-conducting material will further improve the heat dissipation from the crystal of the semiconductor device.

The implementation in the bottom of the recess on the front side of the dielectric substrate of metallized holes with a diameter within the limits specified in the claims will increase the heat dissipation from the crystal, and thus increase the reliability of the circuit, making holes with a diameter of less than 0.01 mm will not increase heat dissipation and reliability, but more than the inscribed diameter the circumference in the projection of the crystal does not significantly affect the heat dissipation and reliability.

The execution of the side walls of the recess inclined will increase the accuracy of the orientation of the crystal of the semiconductor device, and therefore the uniformity and efficiency of heat dissipation from it.

Performing the inclination of the side walls of the recess within the limits specified in the claims (90.1-150 °) will stabilize the position of the crystal in the center of the bottom of the recess, and therefore stabilize the uniformity of heat dissipation from the crystal of the semiconductor device in different directions, and thus increase the reliability of the circuit, a slope of more than 150 ° to the plane of the reverse side of the dielectric substrate will increase the area occupied by the circuit, and therefore worsen the overall dimensions of the circuit, increase the distance to the capacitor and thereby reduce the heat dissipation from the crystal and the reliability of the circuit.

The gap between the side walls of the recess and the crystal is less than 0.4 mm will improve heat dissipation from the crystal of the semiconductor device.

Performing the tilt of the walls of the metallized holes in the bottom of the recess, blind from the back of the dielectric substrate, within the limits specified in the claims (90.1-150 °), will increase the area of warm contact, and thus increase the heat dissipation from the crystal of the semiconductor device and, thereby , increase reliability, performing a slope of less than 90.1 does not affect heat dissipation, and hence reliability, and more than 150 ° will increase the area occupied by the capacitor, worsen the overall dimensions of the circuit, degrade heat sowing from the crystal and reduce reliability.

The invention is illustrated in the drawing, where

dielectric substrate - 1;

topological metallization pattern - 2;

screen grounding metallization - 3;

capacitors - 4;

metallized holes, deaf on the front side of the dielectric substrate - 5;

the bottom lining of the capacitor is 6;

a recess on the front side of the dielectric substrate - 7;

a binder is 8;

crystal semiconductor device - 9;

contact pads of the crystal of a semiconductor device - 10;

conductors - 11;

the upper plates of the capacitors - 12;

heat sink base - 13;

binding electric and heat-conducting substance - 14;

the bottom of metallized holes, blind from the front of the dielectric substrate - 15;

metallization of the recess on the front side of the dielectric substrate - 16;

heat sink inserts - 17;

metallized holes made in the bottom of the recess on the front side of the dielectric substrate - 18.

Example 1. On a dielectric substrate (1), for example, a polikorovoy thickness of 0.5 mm or 1 mm and a size of 48 × 60 mm, the topological metallization pattern (2) with the structure Cr (100 Ohm / mm ² ) - Cu (1 μm) sprayed - Cu (3 μm) galvanically deposited - Ni (0.6-0.8 μm) galvanic - Au (3 μm) galvanically deposited - on the front side, and on the back side a screen grounding metallization (3) with the same structure, as the topological metallization pattern (2), capacitors (4), under which metallized holes (5) are located, for example, 2 × 2 × 0.45 mm in the dielectric substrate (1), made in such a way that the lower plates of the capacitors (6) are formed by metallization (5) of the bottom (15) of the holes, blind from the front side of the dielectric substrate having the same structure as the shield ground metallization (3). The lower plates of the capacitors through metallization of the sides of the holes (5) are connected to the shield grounding metallization (3). On the front side of the dielectric multicorrosive substrate, a recess (7) with a size of 0.7 × 0.7 × 0.20 mm is made. A semiconductor chip (9) is located and fixed with ECHE-S glue (8) in the recess, for example, a transistor ЗП 325 with a size of 0.5 × 0.5 × 0.15 mm, the contact pads (10) of the transistor are connected by conductors (11), for example, flat gold with a thickness of 7 μm, with the upper plates (12) of the capacitor having the same structure as the topological metallization pattern (2). The heat-removing base (13) is made of an MD-50 alloy (50% copper and 50% molybdenum), connected, for example, by a solder of Au-Si eutectic composition with screen grounding metallization.

The metallized holes, deaf from the front of the dielectric substrate (5), have a bottom thickness of 0.05 mm, the metallization of which serves as the lower plates of the capacitors and has the same structure as the screen grounding metallization. The thickness of the substrate between the metallized holes (5) and the sides of the recess (7) on the front side of the substrate is 0.2 mm.

Metallized holes (5), deaf from the front of the dielectric substrate, can be filled with eutectic Au - Si solder.

The recess (7) on the front side of the dielectric substrate can be metallized (16) with metallization similar to the topological metallization pattern.

In the metallized holes (5), blind from the front side of the dielectric substrate, Au - Si solder copper inserts (17) with nickel and gold plating (Ni 0.6 μm - Au 3 μm) with a size of 1 can be located and fixed , 8 × 1.8 × 0.30 mm.

In the bottom of the recess (7) on the front side of the substrate, metallized holes (18) with a diameter of 0.1 mm filled with Au-Si solder can be made.

The holes (18) can be made blind, for example, on the reverse side of the dielectric substrate.

The walls of the recess (7) may have a wall inclination, for example, 120, to the plane of the front side of the dielectric substrate (1), and the gaps between the walls of the recess (7) and the crystal of the semiconductor device (9) are 0.2 mm.

Metallized holes (5), deaf from the front side of the dielectric substrate, may have a wall inclination of 120 ° to the plane of the reverse side of the dielectric substrate.

Example 2. The hybrid integrated circuit of the microwave range is performed analogously to example 1, but with a bottom thickness of metallized holes, blind from the front of the dielectric substrate equal to 0.001 mm, a substrate thickness between metallized holes and sides of the recess equal to 0.001 mm, with metallized holes in the bottom of the recess with a diameter of 0.01 mm, the side walls of the recess are inclined at an angle of 90.1 °, the gap between the side walls of the recess and the crystal of the semiconductor device is zero, and the metallized holes are deep s on the front side of the substrate are sloped walls 90,1 ° to the back side plane of the dielectric substrate.

Example 3. The hybrid integrated circuit of the microwave range is performed analogously to example 1, but with a bottom thickness of metallized holes, blind from the front side of the dielectric substrate, equal to 0.5 mm, a thickness of the substrate between metallized holes, blind from the front side of the substrate, and recess sides equal to 1 mm, with a diameter of metallized holes in the bottom of the recess equal to the diameter of the inscribed circle in the crystal projection of the semiconductor device, the side walls of the recess are inclined at an angle of 150 °, the gap between the side and the walls of the recess and the crystal of the semiconductor device, equal to 0.4 mm, and the slope of the walls of the metallized holes under the capacitors is 90.1 °.

Example 4. The hybrid integrated circuit of the microwave range is performed analogously to example 1, but with a bottom thickness of metallized holes that are blind from the front side of the dielectric substrate equal to 0.0005 mm, a thickness of the substrate between metallized holes that are blind from the front side of the substrate, and recess sides equal to 0.0005 mm, with a diameter of metallized holes in the bottom of the recess equal to 0.005 mm, the side walls of the recess are inclined at an angle of 90.05 °, and the inclination of the walls of the metallized holes, deaf from the front of the dielectric spoon equal to 90.05 ° to the plane of the reverse side of the dielectric substrate. This design does not have sufficient strength, and therefore reliability.

Example 5. The hybrid integrated circuit of the microwave range is performed analogously to example 1, but with a bottom thickness of metallized holes, blind and the front side of the dielectric substrate equal to 0.7 mm, the thickness of the substrate between the metallized holes and the sides of the recess equal to 1.5 mm, with a diameter metallized holes in the bottom of the recess equal to 1.5 of the diameter of the inscribed circle in the projection of the crystal of the semiconductor device, the side walls of the recess are inclined at an angle of 160 °, the gap between the side walls of the recess and the crystal m semiconductor device equal to 0.5 mm, and the inclination of the walls of metallized holes, accessibility from the front side of the dielectric substrate is 160 ° to the back side of the dielectric substrate plane.

When a crystal of a semiconductor device is operating, heat is released that dissipates through the walls of the recess, metallized holes that are deaf from the front of the substrate, through the metallized holes in the bottom of the cavity, and then through the heat sink base. The reliability of the circuit depends on the intensity of the heat sink.

The proposed design of a hybrid microwave integrated circuit compared to the prototype will increase reliability due to the reduction in the number of welded and soldered joints and improve the overall dimensions of the circuit.

Sources of information

1. RF patent No. 2137256, priority 09/26/96, IPC - H 01 L 21/00. Hybrid microwave integrated circuit.

2. RF patent No. 2025822, priority 03.19.91, IPC H 01 L 21/00. Hybrid integrated circuit.

Claims (8)

1. A hybrid microwave integrated circuit containing a dielectric substrate, on the front side of which there is a topological metallization pattern, and on the back there is a screen grounding metallization, capacitors under which there are metallized holes, while the lower plates of the capacitors are connected through the metallized holes to the screen ground metallization, a recess on the front side of the dielectric substrate in which the semiconductor crystal is placed and fixed with a binder the rib is flush with the front surface of the dielectric substrate, the contact pads of the crystal of the semiconductor device are connected by conductors to the upper plates of the capacitors and the topological pattern of metallization, a heat sink connected to the screen grounding metallization by a binder of electrically and thermally conductive substance, characterized in that the metallized holes are made blind from the front side dielectric substrate with a bottom thickness of 0.001-0.5 mm, the metallization of which serves as the lower plates of the con ensatorov, and the upper capacitor electrode formed in a part of the topological pattern of metallization, the substrate thickness between the metallized holes, blind at the front side of the dielectric substrate, and the sides of recesses is 0.001-1 mm. 2. The hybrid integrated circuit according to claim 1, characterized in that the metallized holes, deaf from the front side of the dielectric substrate, are completely or partially filled with an electric and heat-conducting substance. 3. The hybrid integrated circuit according to claims 1 and 2, characterized in that the recess on the front side of the dielectric substrate is metallized. 4. A hybrid integrated circuit according to claims 1 and 3, characterized in that heat-conducting inserts are located and fixed with a binder in the metallized holes that are deaf on the front side of the dielectric substrate. 5. The hybrid integrated circuit according to claims 1 to 4, characterized in that in the bottom of the recess on the front side of the dielectric substrate, metallized holes are made with a diameter of 0.01 mm to the diameter of the inscribed circle in the crystal projection of the semiconductor device and are filled with electrical and heat-conducting material. 6. The hybrid integrated circuit according to claims 1 to 5, characterized in that the metallized holes in the bottom of the recess are made blind from the back of the dielectric substrate. 7. The hybrid integrated circuit according to claims 1 to 6, characterized in that the side walls of the recess are inclined at an angle of 90.1-150 ° to the plane of the surface of the dielectric substrate, and the gaps between the side walls of the recess and the crystal of the semiconductor device are equal to or less than 0.4 mm 8. The hybrid integrated circuit according to claims 1 to 7, characterized in that the metallized holes, blind from the front of the dielectric substrate, have a wall inclination of 90.1-150 ° to the plane of the reverse side of the dielectric substrate.