RU2225992C2 - Computer of correction functions - Google Patents

Abstract

FIELD: aviation electronics, systems of stability and controllability of aircraft. SUBSTANCE: salient feature of proposed system lies in usage of combined electric circuit in computer, analog and digital, simplified and convenient adjustment of transmission coefficients of paths of roll, pitch and course by reprogramming of proper working registers of computer, insertion of cross couplings between control channels to simplify control laws of computer. EFFECT: increased efficiency of utilization of electric remote control system, diminished mass and size characteristics and consumed power. 5 dwg

Description

The invention relates to aviation electronics, in particular to fly-by-wire control systems, and can be used in aircraft stability and controllability systems.

Modern aviation is characterized by the widespread use of automatic control systems (ACS), but this is the external control loop of the aircraft, and the remote control system (EMDS) is the internal loop. On-board automatic control systems have evolved from means that make it easier for the pilot to control the aircraft, into means that ensure the efficient operation of a modern airplane, and in the ACS the pilot is included in the external control loop, and in the EMDS - in the internal one. Modern aircraft, especially fighters, are designed to be statically unstable to ensure a high degree of maneuverability, and it is basically impossible to control them using mechanical wiring. An effective means of ensuring longitudinal and lateral stability are EMFs, which simultaneously serve as vibration dampers. Equipping the aircraft with such systems has led the pilot to perceive the longitudinal and lateral movement as an airplane movement with good stability and controllability in the control process.

Autopilots that perform flight along a given trajectory with a high degree of accuracy are widely known for the automatic controllability of an airplane, but these are all “airborne” tasks for controlling and fending off short-period oscillations, especially for an airplane with an instability> 10%.

The known control system of the electronic control system, which is a redundant analog, built on precision elements, including a system for improving stability and controllability. The system receives, processes and transmits pilot control commands to actuators, as well as dampens aircraft vibrations and improves its controllability in flight modes. Due to triple redundancy, the EMDS provides aircraft control even after two independent failures in pitch, roll, and direction occur in it, see MRGA PANAVIA 200 Multipurpose Combat Aircraft, OCAONTI, M., 1976, p. 32-35.

The disadvantages of this EMDS are:

- the use of analogue computers in each channel, which requires large material costs, because computational operations with analog quantities are quite complicated;

- making changes to the calculation program (gear ratio correction) is all the more complicated, requires "re-soldering" in all channels, it is especially difficult at the stage of development and testing.

Known EDSU, used on the F-16 fighter, which is the first analogue EDSU with a four-channel redundancy scheme without redundant mechanical wiring. The plane is statically unstable, its stability is artificially provided by deflecting control surfaces, in addition, the EMF limits the angle of attack of the aircraft and overload. Four independent electric channels ensure normal flight of an aircraft with two failed channels, see “General Dynamics Fighter, F-16 Fighting Falcon,” TsAGI. - M., 1985, p. 20.

The disadvantages of constructing this EDSU also include the difficulty of working out calculators during flight tests, additional settings (adjustments) in the control channels when replacing roll angle sensors, pitch, attack, etc.

Cneppu’s digital electrical remote control system is known that provides appropriate control in all flight modes of the AN-64 helicopter to provide good flight characteristics, namely to increase stability, strengthen control commands, maintain specified flight modes, coordinate a U-turn, strengthen control while hovering and following course, see. Combat helicopter McDonnell-Douglas An-64A APACH, TsAGI. - M, 1989, p. 29 is a prototype.

Despite the attractiveness of the use of “numbers” in EMDS, a fully digital control system has the following disadvantages:

- sensors of primary information (angular velocities, angle of attack, etc.) almost all are analog, i.e. adapted for analog consumers, therefore, the conversion of their signals into a “digital” presents certain difficulties;

- drive control surfaces (ailerons, differential stabilizers, etc.) are also analog in most cases, so an inverse transformation from “numbers” to “analogs” is required;

- noise immunity of digital systems is much worse than analog;

- in a purely digital computer, it is quite difficult to implement filters of higher orders (second and higher), in addition, there are problems of digital filtering compared to analog, such as: restoring filters after a power failure, quantization error, increasing the part of the measuring channel for which it is necessary provide an extended range of signal variation, taking into account possible interference.

An object of the invention is to increase the efficiency of the use of EMDS due to

- application of the combined electric circuit of the computer: analog and digital, i.e. analog-digital;

- simplicity and convenience of tuning the gear ratios of the roll, pitch and direction paths by simply reprogramming the necessary cells of the calculator's memory circuit, for which RPZU is used;

- the introduction of cross-links between control channels, which simplifies the overall technological transparency of the control laws of the computer;

- reduction of overall mass characteristics and power consumption.

To solve this problem, a correction function calculator is proposed, containing a microprocessor, second input analog buses 1 ... K, first input analog buses 1 ... N, output analog buses 1 ... K, first and second switches, adder, scaler , ADC, Shaper of the functional ROM address, device for selecting the maximum signal, multiplying the DAC, device for generating a signal sign, device for sampling and storage, inter-unit analog buses 1-6, inter-unit digital buses 1-3, control buses 1-10, bus lines, address bus, connected as follows: input analog buses 1 ... K through the first analog switch, the adder and the scaling devices of the first, second and third analog buses are respectively connected to the ADC input, the output of which is connected by a digital eight-bit code with the first digital bus to the driver addresses of the functional ROM, which is also connected via the control bus 5 to the microprocessor output by three bits of a digital code; the output of the address generator of the functional ROM by the eleven-bit address bus is connected to the functional ROM, the output of which is connected directly to the first input of the OR circuit directly with the second digital bus, and through the device to select the maximum signal, the output of this circuit OR the ninth digital bus is connected to the digital inputs of the multiplying DAC but the analog input of which, through the second analog switch, the fourth analog bus is connected to the second input analog buses 1 ... K, the output of the fifth DAC multiplying the analog second bus connected to the device forming the sign signal output of which is the sixth analog bus connected to SHA, the outputs of which are the outputs of the calculator and are connected to output analog tires 1 ... K; the microcontroller is also connected by the first control bus to the control inputs of the first and second analog switches and a sampling and storage device, the second control bus - with the control input of the bias signal generator, the output of which the bias bus is connected to the second input of the adder, the third control bus - with the control input of the scaling device , the fourth control bus - with the control input of the ADC, the sixth control bus - with the control input of the functional ROM, the seventh control bus - with the control the input input of the signal maximum selection device, the eighth control bus with the control input of the multiplying DAC, the ninth control bus with the control input of the signal sign forming device.

Figure 1 shows the structural diagram of the computer, which contains: 1 - microprocessor (MP), 2 and 11 - the first and second analog switches, respectively, 3 - adder, 4 - scaling device, 5-ADC, 6 - address generator functional ROM, 7 - displacement signal shaper, 8 - functional ROM, 9 - OR circuit, 10 - signal maximum selection device, 12 - multiplying DAC, 13 - signal sign forming device, 14 - sampling and storage device (I / O), second analog input buses 1 ... K, first input analog buses 1 ... N, output analogs e buses 1 ... K, control buses 1 ... 9, analog interconnect buses 1 ... 6, digital interconnect buses 1 ... 3, offset bus, address bus.

Figure 2-5 shows examples of corrective functions.

The first input analog buses 1 ... N are connected to the inputs of the first analog switch 2, the output first analog bus of which is connected to the first input of the adder 3, the second input of which is connected to the offset bus from the output of the bias signal generator 7, the output of the adder 3 to the second analog bus is connected with the input of the scaling device 4, the output of which is connected to the ADC input 5 by the third analog bus, the output of which is connected to the first input of the address generator by the eight-bit parallel first digital bus ROM 6, the second input of which a three-digit fifth control bus is connected to the corresponding output of MP 1, the output of the address generator 6 by an eleven-digit address bus is connected to the address inputs of the functional ROM 8, the output second digital eight-bit data bus of which is connected directly to the first input of the OR circuit 9, and with its second input - through the device for selecting the maximum signal 10 by the third digital bus, the output of the OR circuit 9 by the eighth control bus is connected to the digital inputs of the multiplying DAC 12, the second input analog buses 1 ... K are connected to the inputs of the second analog switch 11, the output fourth analog bus of which is connected to the input Uoop of the multiplying DAC 12, and its output fifth analog bus is connected to the input of the signal conditioning instrument 13, the output sixth analog bus of which is connected to input UVX 14, analog outputs 1 ... To which are the output of the computer; MP 1 with control buses is connected to the nodes of the calculator, with the first control bus with the first and second analog switches 2 and 11, respectively, and with the UVX 14, the second control bus with the shaper of the offset signal 7, the third control bus with the scaling device 4, the fourth control the bus — with input the ADC 5 starts, the fifth control bus — with input 2 of the address generator of the functional ROM 6, the sixth control bus — with the input of the selection permission of the functional ROM 8, the seventh control bus — with the selection device AH 10 signal, the ninth control line - with a signal mark 13, the eighth control bus connects the output of OR circuit 9 multiplying DAC 12.

The calculator can be performed on the following known elements. MP 1 - on the IC PIC16C74 company MICRO-CHIP; analog switches 2 and 11 - on the 590 series IC, see “Digital and analog integrated circuits”, Reference. - M: Radio and Communication, 1989, pp. 447-450; adder 3, signal conditioning unit 13 and scaling device 4 - on the operational amplifiers of the 140 series, see ibid., Pp. 343-345; ADC 5 and the multiplying DAC 12 - on the IC series 572, see ibid., P. 428, 434; address generator of the functional ROM 6 - on the registers ТМ9 and digital switchboard KP11 IC series 1533, see ibid., Pp. 53 and 55, respectively; functional ROM 8 - on the IC series 556 RT 7A (in series, and at the stage of testing IC 57 3), see ibid., Pp. 316 and 317; OR circuit 9 - on the 533 Series IMS, ibid., P. 49; MAX signal selection device - on the KP11 digital switches and SP1 digital comparison circuits, IR 23 registers of the IC series 1533, see ibid., Pp. 55 and 50, respectively; signal sign-forming device - on the analogue key of the IC series 590 and the operational amplifier of the series 140, see ibid.; UVX 14 on the IC 1100SC2 g. , from. 16 and 17.

The calculator works as follows.

First, for a more complete understanding of the job of the calculator, we introduce a few general remarks. The maneuver of an aircraft with manual control from the control stick (helm) in general is limited by several parameters: thus, the radius of a combat turn is limited by the allowable angular speed of turn, speed (high-speed head g _sr ), flight height (pressure P _st ), allowable angle of attack (α _East ), etc., i.e. with very vigorous control that does not take these factors into account, you can either destroy the airplane glider (at high angular velocity or acceleration) or lose control (stalling when exceeding the permissible angle of attack, entering a corkscrew when entering a U-turn at low speed and a large roll angle ) etc. The EMDS is constructed in such a way that according to laws calculated in advance mathematically (for a given type of aircraft) it will not allow reaching critical modes, no matter how the pilot tries to do this. We can say that the maneuverability of the aircraft, as well as the ability to carry out one or another flight mode, are determined and limited by its aerodynamic, strength characteristics and power supply. In practice, it looks as follows. For each aircraft control channel (longitudinal, roll and direction), the main dependencies are calculated and then simulated, for example, the dependence of the angular velocity coefficient (Kω) on the pressure head (see Fig. 2), from which it can be seen that the higher the pressure head (q _cf ), the smaller the allowable value of Kω.

Figure 3 shows the dependence of the coefficient of angle of attack Kα also on the pressure head q _sr . For each type of aircraft, graphs of essential dependencies (corrective functions) are determined, which are laid down in the structural diagrams of the EMDS. The specific points of all these graphs for each moment of flight are determined by the proposed calculator and are output to the control channels of the EDSU.

The operation of the calculator is determined by the microprocessor MP 1, which, according to a pre-compiled program of all time dependences of the operation of the nodes and blocks of the calculator in time and with each other, generates control signals. Consider the work of the calculator on the example of processing a simple corrective function (figure 2). The first control signal for control. bus 1 controls the operation of analog switches 2 and 11, alternately turning on a loop all the input analog buses.

When the value of the signal bus, e.g. _czh q, passes to the output of the analog switch 2, and the corresponding value of the control path, for example, ω, - at the output of the switch 11. With the switch output value q _{compression channel} 2 is supplied to a first input of the adder 3. The adder 3 serves to shift functions with negative values to the positive region and to highlight only the variable part of the function, by shifting the beginning of the variable part of the function to the ordinate axis, since in Fig. 2 the function has positive values, it shifts to the ordinate axis m and released for further processing only a fraction of 1000 to 7000 units.

q _cf — the amount of bias and allocation of the variable part of the functions is determined in advance for each function, and the values of bias and selection are generated on the shaper of the bias signal 7 and fed to the second input of the adder 3. The processed input signal is transmitted via the second analog bus to the scaling device 4, where normalizes, i.e. reduced to the full scale of the ADC 5. Given so the analog signal through the third analog bus is fed to the input of the ADC 5, where it is converted into a digital eight-bit code and fed through the first digital bus to the first input of the address generator of the functional ROM 6, the second input of which receives a three-digit digital code via the fifth control bus from MP 1, which complements the ADC code with high-order bits, forming an eleven-bit code that is set on the address bus to the functional ROM 8. In accordance with this address, the output of the ROM 8 (according to pre-recorded data), made for convenience in the 2K × 8 format, a digital eight-bit code appears on the second digital bus, which, in the case of a simple function (function of one variable), directly through the OR 9 circuit, goes to the digital inputs of the multiplying DAC 12, the analog input of which Uoop is supplied via the fourth analog bus the signal from the output of the switch 11, so in the case of processing the function in figure 2 is the value of the path of the angular velocity ω. Program MP 1 consists of subprograms, the number of which corresponds to the number of processed functions. The multiplying DAC 12 has a gain in the range from 1 to 0 in accordance with pre-calculated values. In total, when processing each function, its entire value accounts for 256 quantization levels, which is quite enough for smooth control. After the multiplying DAC 12, the signal is fed via the fifth analog bus to the signal conditioning device 13, which is set from MP 1 via the ninth control bus, after which it is fed to the UVX 14 via the sixth analog bus, where it is stored for the time until the next processing of this path. The output voltage of the UVX 14 then enters the longitudinal channel (roll, direction). Each channel has its own calculator. The EMDS itself also has four channels for each coordinate (control path). EDSU channels have several control sections, which are built on the principle of majority choice.

Processing a more complex correction function of two variables, for example, q _sr and P _st type, the choice of MAX (Fig. 4) occurs in exactly the same way for two clock cycles.

Because a similar function can be represented in the form of two simple q _qs and P _st, respectively, from the first variable, then in the first control cycle, as was presented above, a function is processed, for example, from q _cg , and a digital eight-bit code from the output of functional ROM 8 to the 1st signal control bus 7 recorded in the first register MAX selection device 10. in the second cycle management function is handled by P _st and the corresponding eight-bit digital code output from the ROM 8 for functional 2nd control bus 7 the signal is recorded in the second Registers 10 MAX selection unit.

Then, according to the 3rd signal of the control bus 7, it is allowed to select the maximum value of the digital eight-bit code by the MAX 10 selection device, which, through the OR 9 circuit, is fed to the digital inputs of the multiplying DAC 12.

Further signal propagation is similar to that described above for a simple function of one variable.

The processing of a complex corrective function of two variables, for example, α _ist and M, (Fig. 5), which can be represented in the form of algebraic equations or a table, takes place over two clock cycles as follows.

In the first control cycle, similar to processing a function of one variable at the output of the ADC 5, when processing the parameter α _ist , a digital eight-bit code is generated, the highest six bits of which are sent via digital bus 1 to the first input of the address generator of the functional ROM 6 and to the 1st signal of the control bus 5 are recorded in the first register of the shaper 6.

In the second control cycle, the parameter M is similarly processed and, from the output of the ADC 5, the highest five bits of the digital eight-bit code are sent via digital bus 1 to the first input of the driver 6 and are written to the second register of the driver 6 by the second signal of the control bus 1.

Thus, the eleven-bit address of the functional ROM 8 is formed by "gluing" six-bit and five-bit addresses. The conversion of the parameter to a six-digit or five-digit code is determined by the rate of change of the input parameter. Parameters that quickly change in time are converted into six-digit code, while slowly changing parameters into five-digit code.

Further signal propagation is similar to that described above for a simple function of one variable.

The construction of the calculator according to the proposed principle successfully combines the advantages of analog and digital technology, with minimal overall mass characteristics, high accuracy, easy tunability of the coefficients by simply reprogramming the functional ROM 8.

Claims (1)

A correcting function calculator of an electrical control system comprising a microprocessor, input analog buses 1 ... K, input analog buses 1 ... N and which are inputs of the calculator, output analog buses 1 ... M, first and second switches, adder, device scaling, ADC, functional ROM address generator, maximum signal selection device, DAC multiplier, signal sign forming device, sampling and storage device (I / O), inter-unit analog buses, inter-unit digital buses, control buses the bus, bias bus, address bus, connected as follows: input analog buses 1 ... K through the first analog switch, adder and scaling devices of the first, second and third analog buses are respectively connected to the ADC input, the output of which is digital eight-bit code by the first digital bus connected to the address generator of the functional ROM, which is also connected via the control bus to the microprocessor output by three bits of a digital code; the output of the address generator of the functional ROM by the eleven-digit address bus is connected to the functional ROM, the output of which is connected directly to the first input of the OR circuit directly with the second digital bus, and through the device for selecting the maximum signal, the output of the OR circuit is connected to the digital inputs of the multiplying DAC by the digital bus, analog whose input is connected to the analog buses 1 ... N through the second analog switch with the fourth analog bus; the output of the multiplying DAC by the fifth bus is connected to a signal sign-forming device, the output of which is connected by the sixth analog bus to the UVX, the outputs of which are the outputs of the calculator; the microprocessor is connected by the first control bus to the control inputs of the first and second analog switches and a sampling and storage device, the second control bus - with the control input of the bias signal generator, the output of which the bias bus is connected to the second input of the adder, the third control bus - with the control input of the scaling device, the fourth control bus - with the control input of the ADC, the sixth control bus - with the control input of the functional ROM, the seventh control bus - with the control input the signal pick-up device, the ninth control bus with the control input of the signal sign-forming device.

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