RU2205519C1 - Demodulator of signals of sixteen-position quadrature amplitude manipulation - Google Patents

Abstract

FIELD: radio engineering. SUBSTANCE: input signal of sixteen-position quadrature amplitude manipulation is coherently demodulated and tetrad of demodulated symbols A,B,C,D is generated across output of demodulator. Then first and second signals of four-position phase manipulation are formed, obtained noise signal is amplified K times and is summed up with input signal of sixteen-position quadrature amplitude manipulation, frequency of pulse flow of incompatibles per each of four partial channels is measured and evaluation of error probability in digital symbols A,B,C,D across output of demodulator is obtained. EFFECT: evaluation of error probability in each of four partial digital information transmission channels. 2 cl, 3 dwg

Description

 The invention relates to radio engineering and can be used for demodulation of signals of sixteen position quadrature amplitude manipulation (KAM-16).

 Known demodulator of signals of quadrature amplitude manipulation, containing two phase detectors, two low-pass filters, two multipliers, a controlled generator and an adder. The outputs of the multipliers are connected to the inputs of the adder. The output of the controlled generator is connected to the second input of the first phase detector, the first input of which is the input of the device (see AS 1758899, MKI 5 N 04 L 27/38, published in BI 32, 08/30/92 - [1]).

 The known device has four outputs, for each of which the consumer receives digital information streams (also called subchannels or partial channels).

 A disadvantage of the known demodulator is the impossibility of estimating the probability of error in it for each of the four partial digital channels for transmitting information, since the known demodulator lacks the necessary technical means.

 A signal demodulator of sixteen position quadrature manipulation amplitude is also known, comprising two phase detectors (PD), two regeneration units (solvers), two modulators, two subtractors, an adder, a filter and a voltage controlled oscillator (VCO). The first input of the first PD is the input of the device, and the second input is connected to the output of the VCO, the input of which is connected to the output of the filter, the input of which is connected to the output of the adder. The outputs of the first PD are connected to the inputs of the first regeneration unit, the outputs of which are connected to the inputs of the first modulator. The outputs of the second PD are connected to the inputs of the second regeneration unit, the outputs of which are connected to the inputs of the second modulator. The second input of the second PD is connected to the output of the VCO (see patent RU 2019055, MKI 5 H 04 L 27/34, published in BI 16, 08.30.94 - [2]).

 A disadvantage of the known demodulator is the impossibility of estimating the probability of error in it for each of the four partial digital channels for transmitting information, since the known demodulator lacks the necessary technical means.

 Of the known technical solutions, the closest in technical essence to the claimed device (prototype) is a signal demodulator of sixteen-position quadrature amplitude manipulation, containing the first and second phase detectors, the first solver, the first and second subtracters, the first four-position modulator, the first and second multipliers, the first and the second limiters, a filter and a voltage-controlled generator, and the first input of the first phase detector is connected to the input of the device and to the first an ode to the first subtractor, the second input of which is connected to the output of the first four-position modulator, the first input of which is connected to the output of a voltage-controlled generator, and the second and third inputs, respectively, with the first and second outputs of the first solver, the first and second inputs of which are connected respectively with the first and the second outputs of the first phase detector, the second input of which is connected to the second input of the second phase detector and the output of the voltage-controlled generator, the input of which is connected to filter stroke. The input of the filter is connected to the output of the second subtractor, the first and second inputs of which are connected respectively to the outputs of the first and second multipliers, the first inputs of which are connected respectively to the outputs of the first and second limiters, the input of the first limiter is connected to the second input of the second multiplier and the second output of the second phase detector. The input of the second limiter is connected to the second input of the first multiplier and the first output of the second phase detector, the first input of which is connected to the output of the first subtractor, the first, second, third, and fourth outputs of the first solver are the first, second, third, and fourth outputs of the device, respectively (see patent RU 2013018, IPC 5 N 04 L 27/22, published in BI 9, 05/15/94 - [3]).

 Like the devices described above, the prototype has four outputs through which the consumer receives four partial channels of information.

 The disadvantage of the prototype device is the impossibility of assessing in it the probability of error for each of the four partial channels of information transfer.

 In discrete message transmission systems, the error probability in each of the partial channels is the most important quantity that determines both the channel capacity with noise and the quality of received messages (see Radio Engineering Information Transmission Systems / Ed. By V.V. Kalmykova. M.: Radio and Svyaz, 1990, p. 62-63 - [4]). In this regard, the task of measuring the probability of error in the partial channels is relevant.

 A trivial way of measuring the probability of an error is to estimate the number of distorted characters in some known sync combination (concentrated or distributed).

 On the one hand, the corresponding devices (such as cyclic or frame synchronizers) are much more complicated than the demodulator itself. On the other hand, in some cases, a predetermined synchronization in the signal may be absent (for example, if the KAM-16 signal is compressed by other signals during transmission). Thus, the urgent task is to measure the probability of an error precisely in the demodulator itself and precisely in any traffic signal (including one that does not contain known sync sequences). The term "traffic signal" means a useful information signal (as opposed to special technological test signals).

The technical result is the estimation in the demodulator of the probability of error in each of the four partial digital channels for transmitting information directly by the graphic signal by achieving the following operations on the signal:
1. Coherently demodulate the input signal KAM-16 and receive at the output of the demodulator a tetrad of demodulated symbols {A; B; C; D}.

 2. Using the restored carrier frequency signal and two digital symbols {C; D} from the tetrad of demodulated symbols {A; B; C; D} form at the output of the first four-position modulator a signal of four-position phase modulation (FM-4).

 3. Subtract the generated FM-4 signal from the KAM-16 input signal and the signal obtained as a result of subtraction is processed in the Costas circuit to generate a control voltage for a voltage-controlled generator (VCO), the output of which receives a restored carrier frequency signal.

 4. Using the signal of the restored carrier frequency and two digital symbols {A; B} from the tetrad of demodulated symbols {A; B; C; D} form the second FM-4 signal at the output of the second four-position modulator.

 5. Subtract the second signal FM-4 from the signal difference of the input signal KAM-16 and the first signal FM-4. Thus, as a result of performing this procedure on the signals, the signal of the noise component present in the input signal is obtained. According to fundamental restrictions, this signal (noise) cannot be used to reduce the probability of error at the output of the demodulator, but it can be used to estimate this error probability.

 6. Amplify the received noise signal by a factor of K and sum it with the input signal KAM-16.

7. Coherently demodulate the KAM-16 signal mixed with a K-amplified noise signal, after which a tetrad of demodulated symbols {A _k ; In _to ; C _to ; D _to }.

8. Compare the meanings of the characters A and A _to ; In and In _to ; C and C _to ; D and D _to and form a stream of pulses of mismatches of these pairs of characters.

 9. By measuring the frequency of the pulse mismatch stream for each of the four partial channels, an estimate of the probability of error in the digital symbols {A, B, C, D} at the output of the demodulator is obtained.

 Thus, to estimate the probability of error at the output of the demodulator, an additional phase detector is used, in which the input signal KAM-16 is coherently demodulated, additionally noisy by the signal of the input noise component with a normalized level K.

 The technical result is achieved by the fact that the signal demodulator of sixteen position quadrature amplitude manipulation contains the first and second phase detectors, the first solver, the first and second subtracters, the first four position modulator, the first and second multipliers, the first and second limiters, the filter and the voltage-controlled generator, and the first input of the first phase detector is connected to the input of the device and to the first input of the first subtractor, the second input of which is connected to the output of the first four a positional modulator, the first input of which is connected to the output of a voltage-controlled generator, and the second and third inputs, respectively, with the first and second outputs of the first solver, the first and second inputs of which are connected respectively to the first and second outputs of the first phase detector, the second input of which is connected with the second input of the second phase detector and the output of the voltage-controlled generator, the input of which is connected to the output of the filter. The input of the filter is connected to the output of the second subtractor, the first and second inputs of which are connected respectively to the outputs of the first and second multipliers, the first inputs of which are connected respectively to the outputs of the first and second limiters, the input of the first limiter is connected to the second input of the second multiplier and the second output of the second phase detector. The input of the second limiter is connected to the second input of the first multiplier and the first output of the second phase detector, the first input of which is connected to the output of the first subtractor, the first, second, third and fourth outputs of the first deciding device are the first, second, third and fourth outputs of the device, respectively.

 According to the invention, it further comprises a third subtractor, an amplifier, an adder, a third phase detector, a second solver, a second four-position modulator, the first, second, third and fourth elements of an EXCLUSIVE OR, and the first and second inputs of the third subtractor are connected respectively to the outputs of the first subtractor and second a four-position modulator, the first, second and third inputs of which are connected respectively to the output of the voltage-controlled generator, the third and fourth outputs of the first sol a device, the first, second, third and fourth outputs of which are connected respectively to the first inputs of the first, second, third and fourth EXCLUSIVE OR elements, the outputs of which are the fifth, sixth, seventh and eighth outputs of the device, and the second inputs are connected respectively to the first, the second, third and fourth outputs of the second solver, the first and second inputs of which are connected respectively to the first and second outputs of the third phase detector, the second input of which is connected to the output voltage-controlled generator, and the first input with the output of the adder, the first input of which is connected to the first input of the first subtractor, and the second input with the output of the amplifier, the input of which is connected to the output of the third subtractor.

Another difference is that the phase detector contains the first and second multipliers, the first and second low-pass filters (low-pass filters) and a phase shifter of 90 ^o . The first inputs of both multipliers are connected to the first input of the PD, the second input of which is connected to the second input of the first multiplier and the input of the phase shifter by 90 ^° , the output of which is connected to the second input of the second multiplier, the outputs of the first and second multipliers are connected to the inputs of the first and second low-pass filters, which are the first and second outputs of the PD.

 Another difference is that the solving device (RU) contains the first, second, third and fourth limiters and the first and second subtracters. The first input of the switchgear is connected to the input of the first limiter and the first input of the first subtractor, the output of which is connected to the input of the third limiter, the output of which is the second output of the switchgear. The output of the first limiter is connected to the second input of the first subtractor and is the fourth output of the switchgear. The second input of the switchgear is connected to the input of the second limiter and the first input of the second subtractor, the output of which is connected to the input of the fourth limiter, the output of which is the first output of the switchgear. The output of the second limiter is connected to the second input of the second subtractor and is the third output of the switchgear.

 Figure 1 shows the functional diagram of the signal demodulator KAM-16.

 Figure 2 shows the functional diagram of the phase detector.

 Figure 3 shows the functional diagram of the solving device.

 The functional diagram of the demodulator does not show circuits that are not essential in this case: the power circuit and clock synchronization.

 The signal demodulator of sixteen position quadrature amplitude manipulation (Fig. 1) contains a first phase detector (PD) 1, a second PD 2 and a third PD 3, a first resolving device (RU) 4 and a second RU 5, a first four-position modulator (NPM) 6 and a second NPM 7, the first, second and third subtractors 8, 9 and 10, the adder 11, the amplifier 12, the first and second multipliers 13 and 14, the first and second limiters 15 and 16, the filter 17, the voltage-controlled oscillator (VCO) 18, the first, second, third and fourth elements EXCLUSIVE OR 19, 20, 21 and 22.

Transferring coefficients of the first subtracter 8 to a first input 1, the second - _^1/2; transmission coefficients of the second subtractor 9 at the first input -1, at the second +1; transmission coefficients of the third subtractor 10 at the first input +1, at the second input -1.

Each phase detector 1, 2 and 3 (figure 2) contains the first and second multipliers 23 and 24, the first and second low-pass filters (LPFs) 26 and 27 and the phase shifter 90 ^o 25. The first inputs of both multipliers 23 and 24 are connected to the first input of the PD 1, 2 and 3, the second input of which is connected to the second input of the first multiplier 23 and the input of the phase shifter by 90 ^o 25, the output of which is connected to the second input of the second multiplier 24, the outputs of the first and second multipliers 23 and 24 are connected to the inputs of the first and the second low-pass filter 26 and 27, which are the first and second output Dams FD 1, 2 and 3.

 Each solving device (RU) 4 and 5 contains the first, second, third and fourth limiters 28, 29, 30 and 31 and the first and second subtractors 32 and 33. The first input of RU 4 and 5 is connected to the input of the first limiter 28 and the first input of the first a subtractor 32, the output of which is connected to the input of the third limiter 30, the output of which is the second output of RU 4 and 5. The output of the first limiter 28 is connected to the second input of the first subtractor 32 and is the fourth output of RU 4 and 5. The second input of RU 4 and 5 is connected to the input of the second limiter 29 and the first input of the second subtracts Atelier 33, the output of which is connected to the input of the fourth limiter 31, the output of which is the first output of RU 4 and 5. The output of the second limiter 29 is connected to the second input of the second subtractor 33 and is the third output of RU 4 and 5.

 The demodulator works as follows.

где ω₀- несущая частота сигнала КАМ-16;
А, В, С, D - выбираемые из набора {+1;-1} информационные символы;
N(t) - аддитивный шум.The input of the demodulator receives the signal KAM-16, which in the Cartesian basis can be represented as:

where ω ₀ is the carrier frequency of the KAM-16 signal;
A, B, C, D - information symbols selected from the set {+1; -1};
N (t) is the additive noise.

We transform expression (1) to the following form:
S _in = S ₁ + (1/2) S ₂ + N (t), (2)
where S ₁ = Acosω ₀ t + Bsinω ₀ t; (3)
S ₂ = Ccosω ₀ t + Dsinω ₀ t (4)
An analysis of expressions (3) and (4) shows that each of them describes a four-position phase-shift keying signal FM-4, and sets {A; B} and {C; D} respectively.

Expression (2) is in good agreement with the principle of the so-called superpositional formation of the KAM-16 signal (see Polezhaev V.A., Wiesel A.A. High-speed phase modulators and demodulators for digital microwave transmission systems. Foreign electronics, 1980, 3 - [ 5]) at which the 16 QAM signal is formed by summing two signals, FM-4, one of which is weakened relative to the other by 6 dB (which corresponds to the factor _^1/2 in the expression (2)).

To the second inputs (inputs of the reference oscillation) of all PDs, a signal of the form comes from the output of the VCO:
S _op = cos (ω ₀ t + φ), (5)
where φ is the phase mismatch.

а на втором выходе первого ФД 1 будет формироваться сигнал

где n₁(t) и n₂(t) - квадратурные низкочастотные составляющие шумового процесса N(t)
Перемножители 13 и 14, ограничители 15 и 16 и второй вычитатель 9 образуют известную схему Костаса, позволяющую формировать на выходе второго вычитателя 9 для сигнала ФМ-4 управляющее напряжение для восстановления несущей частоты в петле фазовой автоподстройки частоты (ФАПЧ).In accordance with this and the principle of operation of blocks 23-27, a signal will be generated at the first output of the first PD 1 (Fig. 2)

and at the second output of the first PD 1 a signal will be formed

where n ₁ (t) and n ₂ (t) are the quadrature low-frequency components of the noise process N (t)
The multipliers 13 and 14, the limiters 15 and 16, and the second subtractor 9 form the well-known Costas circuit, which allows generating the control voltage at the output of the second subtractor 9 for the FM-4 signal to restore the carrier frequency in the phase locked loop (PLL).

 In the capture state φ_ → 0 and, in accordance with expressions (6), (7) and the logic of the RU 4 operation (Fig. 3), the transmitted symbols D, C, B, A will be generated at its first and fourth outputs, respectively (in in accordance with the principle of operation of blocks 28-31).

Then, at the output of the first CNC 6, a signal of the form S ₂ will be generated (see expression (4)), and accordingly, at the output of the first subtractor 8, a signal S _{8 of the} form will be generated:
S ₈ = S _in - - (1/2) • S ₂ . (8)
Substituting expression (2) in expression (8), we obtain:
S ₈ = S ₁ + N (t). (9)
Since the output of the second CNC 7 generates a signal S _{1 of the} form (3), then the output of the third subtractor 10 generates a signal S _{10 of the} form:
S ₁₀ = S ₈ -S ₁ ,
S ₁₀ = N (t).

After that, the signal N (t), thus extracted from the input mixture (1) of the noise signal, passing through amplifier 12 with gain K and adder 11, is added to the input signal S _in , which is equivalent to a deterioration in the signal-to-noise ratio of the mixture on the first input of the third PD 3.

The noise thus extracted (from the input signal-noise mixture) cannot be used in any way (for example, by subtracting N (t) from S _in ) to improve the noise immunity of signal demodulation in PD 1-RU 4. This is due to the fact that The procedure for obtaining the realization of noise N (t) on each interval of the symbol duration of the KAM-16 signal is implemented only under the assumption that there are no errors at the outputs of RU 4 (the boundaries of this assumption are A. Kotelnikov's theory of potential noise immunity).

 Thus, the noise N (t) extracted from the input signal cannot be used in any way to reduce the very probability of error at the output of the demodulator, but it can be used to assess the probability of this error (i.e., signal quality).

 The probability of a bit error is estimated by performing the following operations on the signal.

As you know, when demodulating independent and equally probable symbols of the KAM-16 signal, the probability of error in the symbol is calculated using some function
P _c = f (R _in ),
where P _c is the probability of error in the symbol;
R _in - input signal-to-noise ratio.

When coding the KAM-16 signal with the Gray manipulation code (which is almost always implemented in practice),
P≈ (1/4) P _c ,
where P is the probability of an error in a bit, i.e. probability of error in each of the four partial channels.

 The exact analytical expression of the function f for the KAM-16 signals has a rather complicated form, therefore, in practice, the well-known graphical representations of the function are usually used (see, for example, Feer K. Wireless digital communication. M: Radio and communication, 2000 - p. 248 , Fig. 4.8.3 - [6]).

According to known from the literature (for example, [6]) dependencies
P = (1/4) P _c = (1/4) f (R _in )
you can find the following characteristic value of the probability of error in each partial channel:
P = 10 ^-4 at R _inx = 13.2 dB.

 The output of the adder 11, the signal-to-noise ratio is less than the input signal-to-noise ratio.

где S_кам - входной полезный сигнал КАМ-16.The signal-to-noise ratio R ₁₁ at the output of the adder 11 is found from the following formulas:

where S _cam is the input useful signal KAM-16.

 It follows from the last expression that the third PD 3 demodulates the KAM-16 signal under the conditions of the signal-to-noise ratio, by 10 log (1 + K), dB less than the first PD 1. In particular, when K = 1, the signal-to-noise ratio decreases 6 dB

The first or fourth elements OR 19-22 carry out a comparison of the signals at the respective outputs of the decision devices 4 and 5 (A and A _to ; B and B _to ; C and C _to ; D and D _to ). If R _{inx is} sufficiently large, then the probability of error at the output of the first switchgear 4 can be neglected and it can be assumed that all the mismatch pulses at the fifth or eighth outputs of the device are a consequence of the degradation of the signal-to-noise ratio by 10 log (1 + K), dB.

 Then, by measuring the frequency of occurrence of pulses at the fifth to eighth outputs of the device, one can indirectly estimate the probability of error at the first and fourth outputs of the device, respectively.

Thus, by measuring P _n, R can be found by using _Rin inverse solution equation
P _n = (1 / 4f) (R _in -10 log (1 + K)),
where R _n is the frequency of occurrence of pulses at the fifth eighth outputs of the device, i.e. the probability of a mismatch between the characters A and A _k (or B and B _k , or C and C _k , or D and D _k ). Knowing R _in , using a direct solution to the equation
P = (1 / 4f) (R _in )
You can find the probability of error in each of the partial digital channels (on each of the four outputs of the KAM-16 signal demodulator).

For example, let R _I be more than 10 dB, the exact value unknown is unknown and accordingly the exact value of R. Let the gain of the amplifier 12 K be chosen so that at the output of the adder 11 the signal-to-noise ratio deteriorates by 3 dB.

Suppose that the measured pulse frequency of the mismatch signals A and A _to is P _n = 5 • 10 ^-2 . Then it can be found from the curve f (R _in -3 dB) that R _in = 10 dB, and accordingly from the f (R _in ) curve it can be found that P = 5 • 10 ^-5 .

 Thus, due to the formation of the noise component from the input signal and, with its help, the deterioration of the signal-to-noise ratio in the control phase detector, the technical result is achieved in the inventive demodulator: measuring the probability of error in each of the four partial digital channels.

 Moreover, in the inventive demodulator, the measurement of the probability of an error occurs directly by a graphical (informational) signal, in which there may be no synchronization foreseen in the specification.

Claims (3)

 1. A signal demodulator of sixteen-position quadrature amplitude manipulation, comprising a first phase detector, the first input of which is connected to the input of the device and to the first input of the first subtractor, the second input of which is connected to the output of the first four-position modulator, the first input of which is connected to the output of the voltage-controlled generator, and the second and third inputs, respectively, with the first and second inputs of the first solver, the first and second inputs of which are connected respectively to the first and second the outputs of the first phase detector, the second input of which is connected to the second input of the second phase detector and the output of the voltage-controlled generator, the input of which is connected to the output of the filter, the input of which is connected to the output of the second subtractor, the first and second inputs of which are connected respectively to the outputs of the first and second multipliers the first inputs of which are connected respectively to the outputs of the first and second limiters, the input of the first limiter is connected to the second input of the second multiplier and the second output of the second phase detector, the input of the second limiter is connected to the second input of the first multiplier and the first output of the second phase detector, the first input of which is connected to the output of the first subtractor, the first, second, third and fourth outputs of the first deciding device are the first, second, third and fourth outputs, respectively devices, characterized in that it further comprises a third subtractor, an amplifier, an adder, a third phase detector, a second solver, a second four-position modulator, the first, the second, third and fourth elements EXCLUSIVE OR, wherein the first and second inputs of the third subtractor are connected respectively to the outputs of the first subtractor and the second four-position modulator, the first, second and third inputs of which are connected respectively to the output of the voltage-controlled generator, the third and fourth outputs of which are connected respectively with the first inputs of the first, second, third and fourth elements EXCLUSIVE OR, the outputs of which are the fifth, sixth, seventh and eighth outputs respectively triads, and the second inputs are connected respectively to the first, second, third and fourth outputs of the second solver, the first and second inputs of which are connected respectively to the first and second outputs of the third phase detector, the second input of which is connected to the output of a voltage-controlled generator, and the first input - with the output of the adder, the first input of which is connected to the first input of the first subtractor, and the second input is with the output of the amplifier, the input of which is connected to the output of the third subtractor. 2. The demodulator according to claim 1, characterized in that each phase detector comprises first and second multipliers, first and second low-pass filters and a 90 ^o phase shifter, the first inputs of both multipliers being connected to the first input of the phase detector, the first input of which is connected to the second input of the first multiplier and the input of the phase shifter 90 ^o, the output of which is connected to the second input of the second multiplier, the outputs of the first and second multipliers are connected to inputs of the first and second lowpass filters which e are first and second outputs of the phase detector.  3. The demodulator according to claim 1, characterized in that each solving device comprises first, second, third and fourth limiters and first and second subtracters, the first input of the solving device being connected to the input of the first limiter and the first input of the first subtractor, the output of which is connected to the input of the third limiter, the output of which is the second output of the solving device, the output of the first limiter is connected to the second input of the first subtractor and is the fourth output of the solving device, the second input of the solving device CTBA connected to the input of the second restrictor and the first input of the second subtractor, whose output is connected to the fourth input of the limiter, whose output is the first output of the decision unit, the second limiter output coupled to a second input of the second subtracter and a third output of the decision unit.

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