RU2205517C1 - Signal demodulator with frequency modulation - Google Patents

Abstract

FIELD: radio engineering, equipment for information transmission systems with frequency modulation, communication systems with pseudorandom operation frequency change, in particular. SUBSTANCE: technical result lies in reduced time of tuning to operation frequency which is achieved by execution of following operations with signal: formation of periodic signal proportional to sine of input frequency, formation of periodic signal proportional to cosine of input frequency, multiplication of signal proportional to sine of input frequency by coefficient K₁, that is set across first controlling input of demodulator and is computed by formula K₁ = cos(2πf_nT) where f_n is required tuning frequency of demodulator; T is delay time of signal in delay line. Then signal proportional to cosine of input frequency is multiplied by coefficient K₂, that is set across controlling input of demodulator and is computed by formula K₂ = sin(2πf_nT). Discrimination characteristic with center on frequency f_n. is formed with subtraction of obtained signals. Change of tuning frequency of demodulator is carried out by change of coefficients K₁ and K₂. Change of tuning frequency of demodulator occurs practically instantaneously after change of coefficients K₁ and K₂ since multipliers and adder are inertia-free elements. EFFECT: reduced time of tuning to operation frequency. 1 dwg

Description

 The invention relates to radio engineering and can be used in the equipment of information transmission systems with frequency modulation (FM), in particular in communication systems with pseudo-random tuning of the operating frequency (PFRCH).

 Known demodulator of FM signals containing the first and second multipliers, the connected first inputs of which are the input of the device, the outputs of which are connected to the inputs of the first and second low-pass filters (LPFs), the second inputs of the first and second multipliers are, respectively, the first and second inputs of the reference signal, the output of the first low-pass filter is connected to the first input of the fourth multiplier and, through the differentiator, to the second input of the third multiplier, the output of the second low-pass filter is connected to the first input of the third ne the multiplier and, through the differentiator, to the second input of the fourth multiplier, the outputs of the third and fourth multipliers are connected, respectively, to the first and second inputs of the subtractor, the output of which is the output of the device (see Gardner FM Properties of Frequency Difference Detectors. IEEE Transactions on Communications. 1985 . - Vol. 33, 2, p. 131-135) [1].

 A disadvantage of the known device is the great time tuning the demodulator to the operating frequency. In communication systems, with a rapid change in the frequency of the signal, for example, in systems with pseudo-random tuning of the operating frequency (PFRCH), a quick change in the tuning frequency of the demodulator is required. The frequency tuning in the known device is carried out by changing the frequency of the reference signal supplied to the second inputs of the multipliers. Thus, the frequency tuning time is the sum of the frequency settling time in the synthesizer of the reference signal and the signal delay in the first and second low-pass filters, which is inversely proportional to the filter band. In systems with fast frequency tuning, this time can be unacceptably long, which leads to a decrease in the noise immunity of the communication system.

 A demodulator of FM signals is also known, containing the first and second delay lines, the inputs of which are connected to the first inputs of the first and second multipliers, respectively, and the outputs are connected to the second inputs of the second and first multipliers, the outputs of which are connected to the inputs of the subtractor, the output of which is the output of the device (see Alberty T., Hespelt V. A New Pattern Jitter Free Frequency Error Detector. IEEE Transactions on Communications. 1989.- Vol. 37, 2, p. 159-163) [2].

 This device has the same disadvantages as the above device.

 Of the known technical solutions, the closest in technical essence to the patented device (prototype) is a frequency modulated signal demodulator, containing the first and second delay lines, the inputs of which are connected to the first inputs of the first and second multipliers, as well as to the second inputs, respectively, of the fourth and third multipliers, the outputs of which are connected, respectively, to the second and first inputs of the first subtracter, the outputs of the first and second delay lines are connected to the first inputs, with respectively, of the third and fourth multipliers, and to the second inputs, respectively, of the first and second multipliers, the outputs of which are connected to the inputs of the adder (see Natali FD AFC Tracking Algorithms. IEEE Transactions on Communications. 1984. - Vol. Com-32, 8, p. 935-947) [3].

 The disadvantage of the prototype is the large time tuning the demodulator to the operating frequency. In communication systems with a fast change in the signal frequency, for example, in systems with a pseudo-random tuning of the operating frequency (MFC), a rapid change in the tuning frequency of the demodulator is required. The frequency tuning in the known device is carried out by changing the frequency of the reference signal supplied to the second inputs of the multipliers. Thus, the frequency tuning time is the sum of the frequency settling time in the synthesizer of the reference signal and the signal delay in the low-pass filter (integrators with reset), which is inversely proportional to the filter band. In systems with fast frequency tuning, this time can be unacceptably long, which leads to a decrease in the noise immunity of the communication system.

EFFECT: reduced tuning time for the operating frequency is achieved by performing the following operations on the signal:
- form a periodic signal proportional to the sine of the input frequency;
- form a periodic signal proportional to the cosine of the input frequency;
- the signal proportional to the sine of the input frequency is multiplied by a coefficient K ₁ , which is set at the first control input of the demodulator and is calculated by the formula K ₁ = cos (2πf _n T), where f _n is the required demodulator tuning frequency, T is the signal delay time in the line delays;
- the signal proportional to the cosine of the input frequency is multiplied by the coefficient K ₂ , which is installed on the first control input of the demodulator and is calculated by the formula K ₂ = sin (2πf _n T);
- when subtracting the received signals, a discriminatory characteristic is formed with the center at a frequency f _n .

The tuning frequency of the demodulator is tuned by changing the coefficients K ₁ and K ₂ . Since the multipliers and the adder are inertialess elements, the change in the tuning frequency of the demodulator occurs almost instantly after changing the coefficients K ₁ and K ₂ .

 This is achieved by the fact that the demodulator contains the first and second delay lines, the inputs of which are connected to the first inputs, respectively, of the first and second multipliers, as well as to the second inputs, respectively, of the fourth and third multipliers, the outputs of which are connected, respectively, to the second and first the inputs of the first subtractor, the outputs of the first and second delay lines are connected to the first inputs of the third and fourth multipliers, respectively, and to the second inputs of the first and second multipliers, respectively, the outputs of which s connected to the inputs of the adder.

According to the invention, the fifth and sixth multipliers are introduced into it, the first inputs of which are connected to the outputs of the first subtractor and adder, the second inputs are, respectively, the first and second control inputs of the demodulator, and the outputs are connected, respectively, to the first and second inputs of the subtractor , the output of which is the output of the demodulator, the input of the first delay line through the 90 ^° phase shifter is connected to the input of the second delay line and is the input of the demodulator.

 Figure 1 shows the functional diagram of the signal demodulator with frequency modulation.

The frequency modulated signal demodulator contains the first and second delay lines 1 and 2, the first and sixth multipliers 3-6, 10, 11, the first and second subtractors 7 and 12, the adder 8 and the phase shifter 9 by 90 ^o .

 The demodulator works as follows.

An FM signal of the form:
S ₁ (t) = A × cos (ω ₀ t + Ω _m t),
where A = const is the signal amplitude;
ω ₀ - carrier (central) frequency of the signal;
Ω _m = Ω _m (t) is the modulation frequency that carries information about the transmitted message.

The output of the phase shifter 9 at 90 ^o the signal is formed:
S ₂ (t) = A × sin (ω ₀ t + Ω _m t).
The signals S _1D (t) and S _2D (t) at the outputs of the delay lines 1 and 2 are of the form, respectively:
S _1D (t) = A × cos [ω ₀ (tT) + Ω _m (tT)],
S _2D (t) = A × sin [ω ₀ (tT) + Ω _m (tT)],
where T is the signal delay time.

Сигналы S₇(t) и S₈(t) на выходах вычитателя 7 и сумматора 8, соответственно, получаем, выполняя простые тригонометрические преобразования, в виде:
S₇(t) = S₅(t)-S₆(t) = A²×sin(ω₀T+Ω_mT),
S₈(t) = S₃(t)-S₄(t) = A²×cos(ω₀T+Ω_mT).
Полученные сигналы S₇(t) и S₈(t) подаются на перемножители 10 и 11, соответственно, где умножаются на коэффициенты K₁ и К₂. Эти коэффициенты поступают на первый и второй управляющие входы демодулятора и вычисляются по формулам
K₁=cos(2πf_nT),
К₂=sin(2πf_nT),
где f_n - требуемая центральная частота настройки демодулятора.At the outputs of multipliers 3-6, the following signals are generated:

The signals S ₇ (t) and S ₈ (t) at the outputs of the subtractor 7 and adder 8, respectively, are obtained by performing simple trigonometric transformations, in the form:
S ₇ (t) = S ₅ (t) -S ₆ (t) = A ² × sin (ω ₀ T + Ω _m T),
S ₈ (t) = S ₃ (t) -S ₄ (t) = A ² × cos (ω ₀ T + Ω _m T).
The received signals S ₇ (t) and S ₈ (t) are fed to the multipliers 10 and 11, respectively, where they are multiplied by the coefficients K ₁ and K ₂ . These coefficients go to the first and second control inputs of the demodulator and are calculated by the formulas
K ₁ = cos (2πf _n T),
K ₂ = sin (2πf _n T),
where f _n is the desired central tuning frequency of the demodulator.

As a result, at the outputs of multipliers 10 and 11 we obtain signals S ₁₀ (t) S ₁₁ (t), respectively:
S ₁₀ (t) = S ₇ (t) • k ₁ = A ² × sin (ω ₀ T + Ω _m T) × cos (2πf _n T),
S ₁₁ (t) = S ₈ (t) • k ₂ = A ² × cos (ω ₀ T + Ω _m T) × sin (2πf _n T).
The signals S ₁₀ (t) and S ₁₁ (t) are fed to the subtractor 12, the output of which is formed by the output signal of the demodulator of the form:
S ₁₂ (t) = S ₁₀ (t) -S ₁₁ (t) = A ² × sin (ω ₀ -2πf _n + Ω _m ) T.
With fine tuning to the signal, the condition f _n = ω ₀ / 2π should be satisfied, while the last expression is converted to:
S ₁₂ (t) = A ² × sin (Ω _m T).
This shows that for Ω _m ≪ 1 / T, the signal at the output of the demodulator is proportional to the modulating parameter Ω _m . The magnitude of the signal delay T determines the width of the linear portion of the demodulator characteristic.

As can be seen from the above expressions, the tuning frequency of the demodulator is determined only by the values of the coefficients K ₁ and K ₂ , therefore, the tuning frequency changes almost instantly, since the multipliers and the subtractor are inertialess elements.

With an analog implementation of a demodulator, the coefficients K ₁ and K ₂ can be obtained using high-speed DACs or high-speed analog keys. In the case of a digital implementation, the set of coefficients required for operation can be stored in the form of a table in ROM or RAM.

Sources of information
1. Gardner FM Properties of Frequency Difference Detectors. IEEE Transactions on Communications. 1985.- Vol. 33, 2, p. 131-135.

 2. Alberty T., Hespelt V. A New Pattern Jitter Free Frequency Error Detector. IEEE Transactions on Communications. 1989. - Vol. 37, 2, p. 159-163.

 3. Natali F. D. AFC Tracking Algorithms. IEEE Transactions on Communications. 1984. - Vol. Com-32, 8, p. 935-947. - prototype.

Claims (1)

A demodulator of signals with frequency modulation, containing the first and second delay lines, the inputs of which are connected to the first inputs of the first and second multipliers, respectively, as well as to the second inputs of the fourth and third multipliers, respectively, whose outputs are connected to the second and first inputs of the first subtracter, the outputs of the first and the second delay lines are connected to the first inputs of the third and fourth multipliers, respectively, and to the second inputs of the first and second multipliers, respectively which are connected to the inputs of the adder, characterized in that it additionally contains fifth and sixth multipliers, the first inputs of which are connected to the outputs of the first subtractor and adder, the second inputs are respectively the first and second control inputs of the demodulator, and the outputs are connected respectively to the first and second inputs of the subtractor, the output of which is the output of the demodulator, the input of the first delay line through the 90 ^° phase shifter is connected to the input of the second delay line and is the input of the demodulator pa