RU2191847C2 - Method for forming layers of polycrystalline silicon - Google Patents

Abstract

FIELD: microelectronics, namely processes for making integrated circuits. SUBSTANCE: method comprises steps of loading semiconductor plates into reactor; feeding monosilane at temperature of growing layer of amorphous silicon; depositing layer of amorphous silicon; increasing temperature until that of growing layer of polycrystalline silicon and depositing it until predetermined thickness; supplying inert gas into reactor until achieving atmospheric pressure; discharging plates. Deposition of layer of amorphous silicon is realized at temperature T that is higher or equal to 550 C and that is less or equal to 570 C for (5 -10) min; deposition of polycrystalline silicon is realized at temperature T that is higher or equal to 610 C and less or equal to 640 C. EFFECT: enhanced uniformness of layers of polycrystalline silicon. 3 cl, 1 ex

Description

 The scope of the invention is microelectronics, namely the technology for manufacturing integrated circuits.

Currently, in the production of integrated circuits, layers of polycrystalline silicon are formed in once-through reactors of low pressure with a hot wall at Т = 600-650 ^o С and pressure Р = 1-50Па by pyrolysis of monosilane (VLSI technology. Edited by S.Z. Book 1, Moscow "Mir", 1986, pp. 127-139) [1].

 The deposition rate of polycrystalline silicon layers is in the range of 10-20 nm / min.

The disadvantage of this method of forming layers of polycrystalline silicon (SEC) is the absence of isobaric and isothermal deposition conditions in ramjet reactors leading to inhomogeneous resistance of the SEC in the deposition zone after doping, especially in small doses (less than 60 μCul · cm ^-2 ). The heterogeneity of the resistance of the SEC depends on the grain size, texture of the SEC and the energy state of the surface of the plates. A positive temperature gradient along the monosilane, set to obtain a homogeneous thickness of the SCS along the deposition zone, and a negative pressure gradient along the monosilane due to the hydraulic resistance of the pipelines and the dissipation of energy of the moving gas, lead to an increase in grain size from the beginning of the deposition zone to the end. The energy state of the plate affects the size of the nuclei of polysilicon grains. The presence on the plate of potential energy wells and deposition temperatures of more than 590 ^o C leads to an increase in the size of polysilicon grains and the so-called "outgrowths", leading to the rejection of the SEC.

Known methods for producing SECs by modifying (thermal annealing) layers of amorphous silicon (NM Manzha. Resistance of layers of amorphous silicon obtained under reduced pressure. Proceedings under the editorship of RAS Corresponding Member G. Ya. Moscow (3lenograd) 2000, p. p. 250-256) [2]. Amorphous silicon layers are obtained by the pyrolysis of monosilane in low-pressure reactors with a hot wall at Т≤575 ^o С (LPAwakyants, LLGerasimov, VSGorelik, NM Manzha ea Y. Of Molekular Structure, 267, pp 177-184) [3]. The deposition of layers of amorphous silicon at low temperatures partially eliminates the disadvantages of the methods of forming layers of polycrystalline silicon for the following reasons:
- since not a polycrystalline layer is deposited, consisting of many small silicon crystallites that nucleate on the wafer surface and substantially depend on the energy state of the wafer in different areas, but an amorphous layer, whose properties depend little on the energy state of the wafer surface, thereby eliminating the heterogeneity of the structure of the deposited layers;
- reducing the deposition temperature to 570 ^o C eliminates a positive temperature gradient along the reactor along the reagents, which favorably affects the uniformity of the structure of polysilicon;
- when the layers of amorphous silicon are modified (by thermal annealing), the density of the crystallization centers decreases, and the grain sizes on the plate are almost the same size, and the roughness of the layers is at the level of roughness of single-crystal silicon (1-1.5) nm.

 The disadvantages of the methods [2, 3] for producing polycrystalline silicon layers by modification of amorphous silicon are low deposition rates (1.0-2.5) nm / min.

 - The closest technical solution to the proposed invention is a method for producing layers of polycrystalline silicon (Pat. USA 3900597, С 23 С 11/00, 1975. System and process for deposition of polycrystalline silicon with silane in vacuum) [4], which includes loading semiconductor wafers into a hot-wall reactor perpendicular to the gas flow, pumping the reactor to the ultimate vacuum, feeding monosilane, depositing a layer of polycrystalline silicon, stopping the supply of monosilane, pumping the reactor to the ultimate vacuum, letting inert gas into the reactor to atmospheric pressure phenomenon unloading wafers.

The disadvantages of the prototype include:
- increased roughness of the layers of polycrystalline silicon 5-20 nm, which complicates chemophotography of these layers;
- the presence on the plate of potential energy wells leads to the appearance of “outgrowths” in the layers with a height of up to 300-800 nm, which makes the layers opaque and irreplaceable etching;
- heterogeneity of the resistance of the layers of polycrystalline silicon over the deposition zone during subsequent alloying, especially in small doses.

 The objective of the present invention is to obtain a technical result, which consists in improving the uniformity of the properties of the layers of polycrystalline silicon (SEC), in particular in reducing the heterogeneity of the resistance, in reducing the roughness of the SEC and the absence of "outgrowths".

The problem is solved in a method of forming layers of polycrystalline silicon, including loading semiconductor wafers into a reactor with hot walls perpendicular to the gas flow, pumping the reactor to the ultimate vacuum, feeding monosilane, depositing a layer of polycrystalline silicon, stopping the supply of monosilane, pumping the reactor to the ultimate vacuum, feeding inert gas to atmospheric pressure, unloading of semiconductor wafers from the reactor, characterized in that the supply of monosilane to the reactor is carried out they are formed at the growth temperature of the amorphous silicon layer, the amorphous silicon layer is deposited, and then, without stopping the supply of monosilane, the temperature is increased to the growth temperature of the polycrystalline silicon layer and the latter is deposited to a predetermined thickness. While the deposition of the layer of amorphous silicon is carried out at 550 ^o C≤T≤570 ^o C, and the deposition of the layer of polycrystalline silicon is carried out at 610 ^o C≤T≤640 ^o C.

 Thus, the hallmark of the present invention is the combined process of the formation of polycrystalline silicon layers, which consists in the formation of an amorphous silicon sublayer, raising the temperature to the growth temperature of the polycrystalline silicon layer, without stopping the supply of monosilane to the reactor, and the growth of the polycrystalline silicon layer to a given thickness.

 The deposition of an amorphous silicon sublayer evens the energy state of the wafer surface, reduces the density of crystallization centers for the subsequent growth of polycrystalline silicon layers, which improves the uniformity of the polysilicon structure and reduces its roughness.

 This set of distinctive features allows us to solve the problem.

Example. On single-crystal substrates, after chemical treatment of KARO-PAR-GMO-PAR, silicon dioxide was formed in trichlorethylene and oxygen at T = 900 ^° C with a thickness of 50 nm. Oxidized plates were placed in boats with a pitch of 2.38 mm, boats with plates were loaded into the reactor at T = 565 ^° C. The reactor was pumped out to a pressure of 0.3 Pa, then at a flow rate of Ar = 60 l / h the reactor was pumped out for 25 min ( temperature stabilization). They pumped out without feeding argon to a vacuum of 0.3 Pa, after which 100% monosilane was fed into the reactor at a rate of 12 l / h for 10 min at P = 20 Pa. The thickness of the amorphous silicon layer was 15 nm. Without stopping the supply of monosilane, the temperature was programmed to increase to 622 ^o C (the center of the deposition zone). The rate of temperature rise was 10 ^o C / min. A layer of polycrystalline silicon was deposited for 45 minutes. Then the monosilane supply was stopped, the reactor was pumped out to 0.3 Pa for 5 minutes, then the pump was pumped out with Ar Q = 60 l / h for 10 minutes, the argon supply was stopped, the reactor was pumped out to 0.3 Pa and then the reactor was depressurized:
- Ar was fed with Q = 60 l / h;
- closed the shutter of the pumping system;
- Ar was fed into the reactor for 5 minutes;
- for 10 min, N ₂ Q = 300 l / h was supplied;
- equalized pressure in the reactor with atmospheric.

 After that, the plates were unloaded from the reactor.

 The thickness of the polycrystalline silicon layer was 500 nm. Polycrystalline silicon layers are smooth (flat-polycrystalline) with a roughness of 1-1.5 nm, which is an order of magnitude smaller than that of the polysilicon layers obtained by the standard method, and the reproducibility of the resistance of doped polycrystalline silicon layers in the deposition zone is ± 5%, while while the reproducibility of the resistance of the polysilicon layers in the deposition zone obtained by the standard method is ± 15%.

Claims (3)

 A method of forming polycrystalline silicon (SEC) layers, including loading semiconductor wafers into a hot-wall reactor, pumping the reactor to the ultimate vacuum, letting in monosilane, shutting off the latter, pumping the reactor to the ultimate vacuum, letting the inert gas into the reactor to atmospheric pressure, unloading the semiconductor wafers from a reactor, characterized in that the monosilane is poured into the reactor at a growth temperature of an amorphous silicon layer, an amorphous silicon layer is deposited, and then, without stopping I supply monosilane, the temperature is increased to the growth temperature of the polycrystalline silicon layer, polycrystalline silicon is precipitated to a predetermined thickness. 2. The method according to claim 1, characterized in that the deposition of a layer of amorphous silicon is carried out at 550 ^o C≤T≤570 ^o C for 5-10 minutes 3. The method according to claim 1, characterized in that the deposition of a layer of polycrystalline silicon is carried out at 610 ^o C≤T≤640 ^o C.