RU2106736C1 - Automatic generator of signal for initial setting of microprocessor control system of converter - Google Patents

Abstract

FIELD: digital control systems for uninterruptable power supply and for electric supply lines which redundant sources are power supplies with wide dynamic range of output voltage. SUBSTANCE: device is designed as standard microprocessor control system where microprocessor is set to initial state by RESET signal and peripheral devices are controlled by microprocessor signals which are transmitted through data and address buses. Goal of invention is achieved by introduced comparator, two voltage dividers, controlled gate, NAND gates and 2-AND-NOT gates. Input of comparator is connected to difference between required voltage and part of non-stabilized power supply. Output signal of comparator controls gate which is connected in parallel to capacitor of serial RC circuit which is connected to stabilized power supply which outputs signal to input of NAND gate which generated high level RESET signal. Low level RESET signal is generated by second NAND gate which input receives signal from output of first NAND gate. RESET signal and one signal from output of NAND gate at output of selector of peripheral devices are sent to first 2-AND-NOT gate. RESET signal and one signal from NAND gate at output of microprocessor for control of peripheral devices are sent to second 2-AND-NOT gate. Signals from 2-AND-NOT gates are sent to corresponding chips of peripheral devices. EFFECT: increased reliability of digital control system in voltage drop and recovery modes. 2 dwg

Description

 The invention relates to digital control systems (CSB) of microprocessor-based converters and is intended to ensure the operation of the CSB in the modes of disappearance and restoration of the supply voltage, as well as in the modes of abnormal deviation of the supply voltage, where it is necessary to ensure the operation of the converter (when applying the supply voltage) with the same initial conditions that occurred before the disappearance of the supply voltage. The scope of converters with such a device is guaranteed power supply systems or electric networks, where diesel generators or other alternative power supplies with a wide range of output voltage changes are used as backup sources.

 In guaranteed power systems, situations are possible when, after turning off the main supply voltage, a transition to alternative backup power sources, for example, a diesel generator, is performed [1]. In this case, the supply voltage can fluctuate significantly, which can lead to unstable operation of the microprocessor control system (MCU) of the converter. This is mainly due to a decrease in the supply voltage of the chips. This is mainly due to a decrease in the supply voltage of microcircuits to the level of minimum passport values. As a rule, the supply voltage of the microcircuits is formed by the power supply unit from the input voltage of the converter containing powerful C filters, which provide a slow drop in the supply voltage of the microcircuits when the control system is turned off or slow growth when it is turned on, while the unstable operation of the microcircuits arises at the level of the minimum microcircuit supply voltage and as a result, inaccurate information transfer between external devices of the local self-government (especially with external storage devices) is possible, which makes it impossible vtornye launches converter when reaching a sufficient voltage level. Therefore, the task is to preserve useful information and ensure stable operation of the local self-government with significant non-standardizable deviations of the supply voltage (or standby) of the network, enable or disable the supply voltage.

 Known schemes for the initial installation of the microprocessor control system [2,3], where the initial signal of the microprocessor and external RESET devices provides the initial start-up of the control system only when the MCU is turned on. These circuits are based on an RC circuit, the capacitor of which generates a RESET signal at the moment of switching on the ISU.

 The circuit [4], taken as a prototype, is a typical configuration of the ISU, where the microprocessor is set to its initial state by the RESET signal (according to options [2,3], and the control of external devices (including external memory elements) is carried out using microprocessor control signals of external devices , data buses (ШД) and addresses (ША) .The circuit does not contain elements that can ensure the safety of information and stable operation of the local self-government while reducing the supply voltage of the converter.

 The purpose of the invention is to increase the reliability of a digital converter control system based on a microprocessor in the modes of disappearance and restoration of the supply voltage.

(сигнал низкого уровня) вторым элементом И-НЕ, на вход которого подается сигнал с первого элемента И-НЕ. Добавляются элементы И-НЕ на каждый из соответствующих выходов селектора внешних устройств по числу внешних устройств, на каждый из соответствующих выходов микропроцессорных сигналов управления внешними устройствами. Сигнал

и один из соответствующих сигналов с элемента И-НЕ на выходе селектора внешних устройств подаются на первый элемент 2И-НЕ, сигнал

и один из соответствующих сигналов с элемента И-НЕ на выходе микропроцессорных сигналов управления внешними устройствами подаются на второй элемент 2И-НЕ, другие необходимые микропроцессорные сигналы управления внешними устройствами подаются на соответствующие последующие элементов 2И-НЕ. Полученные сигналы с элементов 2И-НЕ подаются на соответствующие микросхемы внешних устройств.This is achieved by introducing a comparator, the input of which is supplied with the difference of the set voltage and part of the unstabilized supply voltage of the microcircuits. The setpoint voltage is generated by the first voltage divider, consisting of a resistor and a zener diode. Part of the unstabilized voltage, proportional to the input voltage of the converter, is formed by a second voltage divider consisting of resistors. The output of the comparator controls the key, which is connected in parallel with the capacitor, which forms a series chain with the resistor between the common wire and the plus of the stabilized power supply of the microcircuits. The initial RESET microprocessor installation signal (high level signal) is generated by the first NAND element, the input of which is supplied with voltage from the capacitor, and the signal

(low level signal) by the second AND-NOT element, to the input of which a signal is supplied from the first AND-NOT element. NAND elements are added to each of the corresponding outputs of the selector of external devices according to the number of external devices, to each of the corresponding outputs of the microprocessor control signals of external devices. Signal

and one of the corresponding signals from the AND-NOT element at the output of the selector of external devices is supplied to the first element 2-NOT, the signal

and one of the corresponding signals from the AND-NOT element at the output of the microprocessor control signals of external devices is supplied to the second element 2I-NOT, the other necessary microprocessor control signals of external devices are supplied to the corresponding subsequent elements 2I-NOT. The received signals from 2I-NOT elements are supplied to the corresponding microcircuits of external devices.

- сигнал (высокого и низкого уровня) сброса процессора и внешних устройств в исходное состояние;

- сигнал записи (низкого уровня);

- сигнал чтения (высокий уровень) и записи (низкого уровня) на входе ОЗУ;

- сигнал выбора микросхемы (низкий уровень).In FIG. 1 presents a diagram of the proposed device, where the following notation is introduced:
U _{pit. unstable -} unstable power supply of microcircuits proportional to the input voltage of the converter;
U _pit.stab - stabilized chip power;
U _pit.ab - battery power;
ША - address bus;
AB - rechargeable battery;
RESET

- signal (high and low level) reset the processor and external devices to its original state;

- recording signal (low level);

- read signal (high level) and write (low level) at the input of RAM;

- chip selection signal (low level).

 In FIG. 2 shows timing diagrams of stresses at test points of the circuit of FIG. 1 and the formation of the initial setup signal RESET LSG.

с выхода элемента И-НЕ 11. Сигнал записи

микропроцессора 12 (или сигнал чтения, в зависимости от конфигурации МСУ) подается на элемент И-НЕ 16, выход которого соединен с первым входом элемента 2И-НЕ 17, на второй вход которого подается сигнал

с выхода элемента И-НЕ 11. Выходы элементов 2И-НЕ 15 и 17 подаются соответственно на управляющие входы CS и R/W внешнего устройства 18. Питания (U_пит.аб) внешнего оперативного запоминающего устройства (ОЗУ) осуществляется от аккумуляторной батареи (АБ) 19 через диод 20. Заряд АБ 19 осуществляется через диод 21 и резистор 22 от источника стабилизированного питания.The circuit of the proposed device (Fig. 1) contains a first voltage divider from series-connected resistors 1 and interlinear resistor 2 connected to an unstabilized power supply (U power _{. Unstable} ) and a second voltage divider consisting of series-connected resistor 3 and zener diode 4. Midpoint the first voltage divider is connected to the inverted input of the comparator 5, the middle point of the second divider is connected to the first input of the comparator 5. The output of the comparator 5 goes to the base of the transistor switch 6. Call vector transistor switch 6 through a resistor 7 is connected to a stabilized power source (U _pit.stab ), the emitter is connected to a common wire (O). Between the stabilized power source and the common wire is sequential chain of diode 8 and the capacitor 9, the diode cathode connected to the plus stabilized power supply (U _pit.stab.), And the total point of the diode 8 and the capacitor 9 is connected to the collector of the transistor switch 6 and the inlet of the AND-NOT element 10. The output of the AND-NOT element 10 is fed to the input of the AND-NOT element 11 and the RESET input of the microprocessor 12. The microprocessor 12 is connected via an SHA to the address selector of external devices 13, the output of which CS is connected to the AND-NOT element 14 ( quantity of AND-NOT depend on the number of external devices). The output of the AND-NOT 14 element is connected to the first input of the 2N-NOT 15 element, a signal is supplied to the second input of the 2N-NOT 15 element

from the output of AND-NOT 11. Recording signal

microprocessor 12 (or a read signal, depending on the configuration of the local self-government) is fed to the AND-NOT 16 element, the output of which is connected to the first input of the 2I-NOT 17 element, to the second input of which

from the output of the AND-NOT 11 element. The outputs of the 2AND-NOT 15 and 17 elements are supplied respectively to the control inputs CS and R / W of the external device 18. The _power supply (U _{power supply} ) of the external random access memory (RAM) is provided by the battery (AB ) 19 through the diode 20. The battery AB 19 is charged through the diode 21 and the resistor 22 from the stabilized power source.

The principle of operation of the circuit will be considered for the case when RAM is used as an external device 18 (Fig. 1). In FIG. 2 shows timing diagrams of stresses at the test points of FIG. 1 circled. In FIG. 2 are additionally shown:
U _in.ust - voltage setting proportional to the minimum input voltage of the converter;
U _ipmin - the maximum voltage of the stabilized power supply of microcircuits, at which the microcircuit fulfills its functional purpose;
U _srab is the _input voltage of the microcircuits (when switching from a high level to a low level and vice versa).

(на выходе элемента 11) осуществляется запрет прохождения микропроцессорных управляющих сигналов

и выбора микросхемы

от микропроцессора 12 к микросхеме 18.When applying the supply voltage to the ISU, the voltage at point 1 (curve 1 in Fig. 2) repeats the voltage of the unstabilized power at a certain scale (voltage divider on resistors 1 and 2). At point 2 (curve 2 in Fig. 2), the voltage first repeats the voltage of the unstabilized power source, then it is stabilized by the zener diode 4 at the level of the selected setting (U _input in Fig. 2). The stabilized power supply (curve 3 in Fig. 2) has a time delay relative to the unstable power due to the filtering of the unstable power. At the moment of intersection of curves 1 and 2 the comparator output low level signal is generated, which allows closing the transistor switch 6, whereupon charging of the capacitor 9 via the resistor 7. stabilized supply voltage U _pit.stab 3 crosses the threshold voltage U _ip.min before the voltage at the input of the logic element 10 will reach the threshold operation U _srab . In the interval between the intersection point of curve 3 with U _ipmin and the intersection of curve 4 with U _srb , a high level signal RESET is generated at the output of element 10. In this case, the processor is reset, and the signal

(at the output of element 11), the passage of microprocessor control signals is prohibited

and chip selection

from microprocessor 12 to microcircuit 18.

осуществляется запрет прохождения микропроцессорных сигналов управления R/W и сигнала выбора микросхемы

. В рассматриваемом случае на элемент 18 (ОЗУ) запрещается подача сигнала записи и выбора микросхемы как при подаче напряжения, так и при его исчезновении фиг. 2), что важно для сохранения промежуточной информации и недопущения записи ложных данных. Данные в ОЗУ (микросхема 18) сохраняются за счет использования АБ 19, которая автоматически включается при исчезновении напряжения питания.With a decrease in the supply voltage of the converter and, accordingly, the ISU, the voltage at point 1 (Fig. 1) reaches the voltage U _in.ust , while the voltage at the output of the comparator 5 becomes positive and the transistor switch 6 is turned on, which discharges the capacitor 9. The voltage at point 4 (Fig. 1) decreases to the level U _srab , and at the output of the element 10 appears a high level signal RESET, which resets the microprocessor 12 to its original state, and the signal

the prohibition of the passage of microprocessor control signals R / W and the signal selection chip

. In the case under consideration, it is forbidden to supply a recording signal and select a chip to an element 18 (RAM) both when voltage is applied and when it disappears. FIG. 2), which is important for maintaining intermediate information and preventing the recording of false data. Data in RAM (chip 18) is stored through the use of AB 19, which automatically turns on when the power supply disappears.

 In the case of using other external devices 18, a ban is placed on the passage of those control signals from the microprocessor 12, which must be prohibited for this external device with the addition of the corresponding elements 2I-NOT.

 Sources of information.

 1. Adamia G.G., Berkovich E.I., Kartavykh A.S. and other Static Uninterruptible Power Supplies. Ed. F.I. Kovaleva. - M .: Energoatomizdat, 1992, 288 p.

 2. Single-chip microcomputers. -M .: MIKAP, 1994, 400 p. fig. 8-16, p. 316.

 3. Neroda V.Ya., Torbinsky V.E. and Shlykov E.L. Single-chip microcomputers MS-51. -M.: Digital Components, 1995, 164 p. fig. 2.16.

 4. Abraitis V.V., Averyanov N.N., Belous A.I. et al. Microprocessors and microprocessor sets of integrated circuits: a Handbook in 2 volumes. Ed. V.A. Shakhnova. - M.: Radio and Communications, 1988, vol. 1, 368 p. fig. 3.84, p. 170.

Claims (1)

 A device for automatically generating a signal for the initial installation of a microprocessor-based converter control system, containing an RC circuit connected by a common point to the RESET input of the microprocessor and connected by the terminal of the resistor to the potential terminal of the stabilized power supply, and by the terminal of the capacitor to the common terminal, an address selector connected to the output by the output microprocessor using address buses, and outputs connected to corresponding external devices, characterized in that a comparator is introduced p, two voltage dividers, a controlled key, n + 3 elements AND - NOT and (n + 1) elements 2I - NOT, where n is the number of external devices, and the voltage dividers are connected to the terminals of the power supply proportional to the voltage of the converter, the first divider voltage is made on series-connected resistors, a second voltage divider is made on series-connected zener diodes and a resistor, the voltage difference of the setpoint generated on the second voltage divider and part of the voltage If the converter is formed by the first voltage divider, the controlled key is connected in parallel to the capacitor of the RC circuit, and its control circuit is connected to the output of the comparator, the common point of the RC circuit is connected to the RESET input of the microprocessor through the first element AND is NOT, the output of the first element AND is NOT connected with the input of the second element AND - NOT, the read / write output of the microprocessor is connected to the input of the third element AND - NOT, the output of which is connected to the first input of the first element 2I - NOT, the outputs of the address selector are connected to the inputs, respectively but the fourth and subsequent elements AND are NOT, the outputs of the fourth and subsequent elements AND are NOT connected to the first inputs of the second and subsequent elements 2I, respectively, NOT, and the second inputs of the elements 2I are NOT connected to the output of the second element AND are NOT, the output of the first element 2I - It is NOT connected to the read-write input of external devices, and the outputs of the second and each subsequent element 2I are NOT connected to the input of the microcircuit selection of the corresponding external devices.

Images