RU2020494C1 - Device for measuring phase shift of two sinusoidal signals - Google Patents

Abstract

FIELD: measurement technology. SUBSTANCE: device has selection and storage block, amplitude detector, control signal shaper, block for determination of equiphase condition, block for determination of phase difference sign, trigonometric transducer, registration control unit. EFFECT: higher efficiency. 3 cl, 4 dwg

Description

 The invention relates to measuring technique, in particular to a device for measuring phase shifts of sinusoidal electrical signals, and can be used to determine the phase-frequency characteristics mainly in the infra-low frequency range when calibrating the measuring channels and processing the recorded signals.

 The device is required to ensure high accuracy of the measurement of phase shifts, allowing changes in signal amplitudes in a wide dynamic range.

 A simple device for determining the phase shift containing a multiplier of the studied signals and a device that emits a constant component obtained from the multiplication of signals is known. The magnitude of the DC voltage is proportional to the absolute value of the phase shift.

 The device is characterized by insignificant accuracy of determination, especially in the infra-low-frequency region, due to the need to isolate the DC component with high accuracy obtained from the multiplication of signals.

 More sophisticated devices can improve accuracy.

 A device for measuring the phase shift between two voltages is considered. It contains two key detectors and a common auxiliary sine heterodyne generator with a frequency close to that of a factor many times higher than the frequency of the measured oscillations, as well as sine to spiky pulse converters and low-pass filters the envelope, and a phase meter measures the phase difference between the envelopes, which is equal to the desired phase difference times the multiplicity coefficient between the generator frequency and the frequency of the signal under study .

 Instead of the desired value of the phase difference, such a device measures other values of the phase difference, while the frequency ratio is also measured, therefore the accuracy of such a device is very low.

 A device for measuring the phase shift of two sinusoidal signals is proposed, which contains a modulator, a carrier frequency generator, a low-pass filter, a registrar, a demodulator, a multiplier device that has an advantage over [2], but it is low in accuracy, since many intermediate steps are used - modulation, demodulation, multiplication. The measurement accuracy decreases significantly with decreasing amplitude of the studied signals.

arccosU_″ /

-signU_″

arccosU_″ /

Как видно из этого выражения, управляемый блок регистрации содержит блоки деления, формирователь импульсов, функциональные преобразователи-устройства извлечения корня квадратного из суммы квадратов двух величин, триго- нометрические преобразователи, сумматоры с блоками управления знаком (управляемыми усилителями).The closest technical solution to the claimed one for a larger number of similar technical features is a device containing filtering devices that separate sinusoidal signals from a constant component, phase-shifting units that shift both signals by an angle π / 2 in the advance direction, and an analog storage unit with sampling devices and storage, which measures and remembers four instantaneous signals at the same time (two after the filter and two after the phase-shifting units), and the phase difference is determined using managed registration unit that implements the mathematical relationship
φ = sign U _″

arccosU _″ /

-signU _″

arccosU _″ /

As can be seen from this expression, the controlled recording unit contains division blocks, a pulse shaper, functional converters-devices for extracting the square root of the sum of squares of two quantities, trigonometric converters, adders with sign control units (controlled by amplifiers).

 As a result, the error in measuring the phase shift is still large, especially in the area of infralow frequencies, due to the presence of four component errors from the measurements of four instantaneous values and the need to measure the values of the square root of the sum of the squares of two quantities.

 The aim of the invention is to improve the accuracy of measuring the phase shift of two sinusoidal signals.

 The purpose and device for measuring the phase shift of two sinusoidal signals, comprising a sampling and storage device, the input of which is connected to the first input of the device, a trigonometric converter, a controlled recording unit and a control pulse generator, the input of which is connected to the second input of the device, and the output is connected to the control input sampling and storage devices, the output of the latter is connected to the first input of the trigonometric converter, the first and second outputs of which are connected to the first and second mu inputs of the controlled recording unit, respectively, is achieved by the fact that it additionally contains an amplitude detector, a phase difference sign determination unit, and a phase detection unit, the first input of the device through an amplitude detector connected to the second input of the trigonometric converter, the first and second inputs of the device connected to pairwise connected the first and second inputs of the phase detection unit and the phase difference sign determination unit, respectively, the outputs of the last two are connected to the third and to the fourth (control) inputs of the controlled recording unit, respectively: the in-phase detection unit contains a series-connected multiplier, a sampling and storage device, a comparator and a former, and the first and second inputs of the multiplier are connected to the corresponding inputs of the in-phase detection unit, the second input of which is connected to the input of the former, the output which is connected to the control input of the sampling and storage device, and the output of the in-phase detection unit is connected to the output of the comparator; the controlled registration unit contains an EXCLUSIVE OR logic element, a key and a controlled inverter, the first input of a controlled registration unit connected to the first inputs of the EXCLUSIVE OR logic element, the second input of which is connected to the output of the EXCLUSIVE OR element, the second input of the last connected to the second input of the managed block registration, the third (control) input of which is connected to the control input of the key, the output of which is connected to the input of the controlled inverter, the control input of which is connected to the fourth input of a controlled recording unit, the output of the latter is connected to the output of a controlled inverter.

 Functional diagram of the device shown in Fig 1.

 A device for measuring the phase shift of two sinusoidal signals includes a sampling and storage device 1, an amplitude detector 2, a control pulse generator 3, a phase detection unit 4, a phase difference sign determination unit 5, a trigonometric converter 6, a controlled recording unit 7.

 The blocks in the device are interconnected as follows. The first input of the device is connected to the input of the amplitude detector 2, as well as to the first inputs of the device 1 of sampling and storage, block 4 for determining the in-phase and block 5 for determining the sign of the phase difference. The second input of the device is connected to the input of the driver 3 of the control pulses and the second inputs of the block 4 determine the in-phase and block 5 determine the sign of the phase difference. The output of the shaper 3 of the control pulses is connected to the second (control) input of the device 1 sampling and storage. The outputs of the I / O 1 and the amplitude detector 2 are connected respectively to the first and second inputs of the trigonometric converter 6. The first and second outputs of the trigonometric converter 6 are connected to the first and second inputs of the controlled recording unit 7, respectively. The third and fourth (control) inputs of the controlled recording unit 7 are connected to the outputs of the in-phase detection unit and the phase difference sign determination unit 5, respectively.

 The block diagram of the in-phase detection unit 4 is shown in FIG. 2. The in-phase determination unit 4 comprises a series-connected multiplier 8, a sampling and storage device 9, a comparator 10 and a shaper 11. The first and second inputs of the in-phase determination unit 4 are connected to the corresponding inputs of the multiplier 8. The second input of the in-phase determination unit 4 is connected to the input of the shaper 11 the output of which is connected to the second (control) input of the I / O 9. The output of the comparator 10 is connected to the output of the in-phase detection unit 4.

 The block diagram of the controlled registration unit 7 is shown in FIG. 3. The controlled registration unit 7 contains an EXCLUSIVE OR 12 logic element, a key 13, and the inverter 14 is controlled. The first input of the registered registration unit 7 is connected to the first inputs of the EXCLUSIVE OR 12 logic and a key 13. The second input of the controlled registration unit 7 is connected to the second input of the logical element EXCLUSIVE OR 12, the output of which is connected to the second input of the key 13, the output of which is connected to the input of the controlled inverter 14. The second (control) input of the key 13 is connected to the third (control) input of the controlled unit ka 7 registration. The second (control) input of the controlled inverter 14 is connected to the fourth (control) input of the controlled recording unit 7, the output of which is connected to the output of the controlled inverter 14.

 Timing diagrams of the operation of the device are shown in FIG. 4.

The device operates as follows. The studied sinusoidal signal, for example, U _x (t), is a measuring one, and the signal U _y (t) is a reference (see Fig. 4a). Then the input signal U _x (t) from the first input of the device is supplied simultaneously to the input of the amplitude detector 2 and the first inputs of the sampling and storage device 1, the in-phase detection unit 4, and the phase difference sign determination unit 5. The input signal U _y (t) from the second input of the device is supplied simultaneously to the input of the shaper 3 of the control pulses and the second inputs of the inphase determination unit 4 and the phase difference sign determination unit 5.

Shaper 3 of the control pulses generates digital logic signals of voltage U ₃ , which are sampling and storage signals for the I / O 1 and are fed to the second (control) input of I / O 1. The formation of the output pulses U _{3 is} illustrated by the diagram of FIG. 4b: the logical unit of voltage U ₃ is the signal "Storage", and the logical zero is "Sample" for the I / O 1.

At the output of the amplitude detector 2, a voltage signal U ₂ is proportional to the amplitude of the signal under study (see Fig. 4a).

Thus, the corresponding inputs of the trigonometric transducer 6 during the storage period corresponding to the time interval from t ₁ to t ₃ receives voltage U ₂ from the output of the amplitude detector 2, equal to the signal amplitude U _x (t ₂ ), and voltage U ₁ from the output of UVX 1, equal to the voltage U _x (t) at time t ₁ , when the reference voltage U _y (t) reaches its extremum (Fig. 4a).

The trigonometric transducer 6 of the time-pulse action includes a reference signal generator of a sinusoidal shape, the generation frequency of which is selected from the required speed (see Fig. 4c), and two outputs, on one of which voltage pulses U _{6-1 are formed} (Fig. 4d) , and on the other, reference voltage pulses U _{6-2 are formed} (Fig. 4e).

FIG. 4c-e shows how the output pulses are formed in the time interval corresponding to the "Storage" mode, starting from time t ₁ and tending to time t ₃ .

The amplitude of the signals of the reference generator is set equal to the voltage U ₂ . This voltage is supplied to one input of the comparison unit of the trigonometric transducer 6, a threshold voltage U _{1 is} supplied to the other input, as a result, at the first output of the trigonometric transducer 6 a sequence of voltage pulses U _{6-1 is formed} , the duration of which is proportional to the value of arccos (U ₁ / U ₂ ) . The time-pulse trigonometric converter circuit is standard, therefore, it does not open inside block 6. At the second output of the trigonometric converter 6, a sequence of reference pulses is obtained, the pulse duration of which corresponds to a half-period of oscillations of the reference generator. They are obtained by standard methods and have the form shown in FIG. 4d The formation of these reference pulses is produced inside the time-pulse trigonometric transducer 6.

The sequence of voltage pulses U _6-1 and U _6-2 from the first and second outputs of the trigonometric converter 6 is supplied to the first and second inputs of the controlled recording unit 7 (see Fig. 3), that is, U _{6-1 is} supplied to the first inputs of the logic element The EXCLUSIVE OR 12 and the key 13, and the second input of the EXCLUSIVE OR 12 logic element receives a sequence of voltage pulses U _6-2 from the second output of the trigonometric transducer 6, the duration of which corresponds to 1/2 the period of harmonic oscillations of the reference oscillator, and used in trigonometric transducer 6.

arccos (U₁/U₂)

.The sequence of pulses U _6-1 and U _6-2 at the input of the EXCLUSIVE OR 12 logic element generates at its output a signal U ₁₂ (Fig. 4e), which is a sequence of pulses whose duration corresponds to the duration difference of the signals U _6-2 and U _{6- 1} . Since the pulse duration of the signal U _6-2 corresponds to the interval π, and the pulse width of the signal U _6-1 corresponds to the value of arccos (U ₁ / U ₂ ), the pulse duration of the signal U ₁₂ can be written as follows:
π -

arccos (U ₁ / U ₂ )

.

arccos (U₁/U₂)

.The voltage signals U _6-1 or U ₁₂ pass to the output of the switch 13 in accordance with the control logic signals U ₄ from the output of the in-phase detection unit 4, which are received at the output of the comparator 10, which for a time corresponding to the "Storage" mode of the UVX 9, signal generator 11 generates a logical control signal for switch 13. in a case where at the input of the multiplier 8 are ratios investigated at time signals of the same sign t _1, which corresponds in phase condition, a positive signal at the output of SHA 9 generates councils yayuschy signal which connects to the output 13 signal U _6-1 key pulse duration is proportional to the value arccos U ₁ / U _2). In the case of signals of the opposite sign at the input of the multiplier 8 at the time t ₁ , the antiphase condition is satisfied and a logic signal is generated at the output of the comparator 10 that connects to the output of the key 13 signals U ₁₂ from the output of the EXCLUSIVE OR element, the pulse duration of which is proportional to the value π -

arccos (U ₁ / U ₂ )

.

arccos (U₁/U₂)

Напряжение U₅ поступает на четвертый вход управляемого блока 7 регистрации и управляет полярностью выходных импульсов напряжения U₁₄. Управляемый инвертор 14 имеет коэффициент передачи +1 или -1 и управляется сигналом U₅ с выхода блока 5 определения знака разности фаз. При положительной разности фаз между U_x(t) и U_y(t) - коэффициент передачи равен +1, а при отрицательной разности фаз коэффициент передачи равен -1.Thus, a sequence of voltage pulses U ₁₃ , the duration of which is proportional to the value of arccos (U ₁ / U ₂ ) or π -, is supplied to the input of the controlled inverter 14 for different ratios of the studied signals in phase and antiphase

arccos (U ₁ / U ₂ )

The voltage U _{5 is} supplied to the fourth input of the controlled recording unit 7 and controls the polarity of the output voltage pulses U ₁₄ . The controlled inverter 14 has a gain of +1 or -1 and is controlled by the signal U ₅ from the output of the phase difference sign determination unit 5. With a positive phase difference between U _x (t) and U _y (t), the transmission coefficient is +1, and with a negative phase difference, the transmission coefficient is -1.

arccos U_x(t₁)/U_x(t₂)

.Thus, at the output of the controlled inverter 14 there is a sequence of positive voltage pulses U ₁₄ , the duration of which is proportional to the value of arccos U _x (t ₁ ) / U _x (t ₂ ) with a positive phase difference and a sequence of negative pulses corresponding to the value of arccos U _x (t ₁ ) / U _x (t ₂ ) with a negative phase difference under the condition of in phase between the studied signals. Under the condition of antiphase, the output of the controlled inverter 14 receives a sequence of positive or negative pulses, the duration of which is proportional to the value π -

arccos U _x (t ₁ ) / U _x (t ₂ )

.

F

< 90, а логический нуль соответствует значению 90 <

F

≅180. Напряжение U₄ управляет ключом 13 так, что при логической единице (U₄) на выход ключа 13 поступает напряжение U_6-1, а при логическом нуле (U₄) - на выходе ключа 13 напряжение U₁₂.In the time intervals "Storage" (signal U ₃ ) at the output of the in-phase determination unit 4, a voltage U _{4 is} obtained, the logical unit of which corresponds, for example, to the case when the phase difference F _o has a value

F

<90, and a logical zero corresponds to a value of 90 <

F

≅180. The voltage U ₄ controls the key 13 so that, with a logical unit (U ₄ ), the voltage U _{6-1 is} supplied to the output of the key 13, and with a logical zero (U ₄ ), the voltage U ₁₂ is output from the key 13.

X(t₁)

≅

X(t₂)

, для случая, когда измеряемый сигнал Х(t) опережает по фазе опорный сигнал:
g = -arccos [

Y(t₁)/Y(t₂)

] при

Y(t₁)

≅

Y(t₂)

для случая, когда измеряемый сигнал Y(t) отстает по фазе от другого сигнала, причем
n = 0, M(0) = 1 - для синфазных сигналов,

F

/2,
n = 1, M(1) = -1 - для противофазных сигналов, π/2 <

F

≅π.Thus, the proposed device implements a method for determining the phase shift of two sinusoidal signals, in accordance with which two instantaneous values of one of the signals are measured at time t ₂ when the reference signal reaches its extremum, and at time t ₂ when the measured signal reaches its extremum, and the phase shift value Fo is determined by the formula
F _o = M (n) [g + n π], where g = arccos [X (t ₁ ) / X (t ₂ )] for

X (t ₁ )

≅

X (t ₂ )

, for the case when the measured signal X (t) outpaces the reference signal:
g = -arccos [

Y (t ₁ ) / Y (t ₂ )

] at

Y (t ₁ )

≅

Y (t ₂ )

for the case when the measured signal Y (t) lags in phase from another signal, and
n = 0, M (0) = 1 - for common-mode signals,

F

/ 2,
n = 1, M (1) = -1 - for antiphase signals, π / 2 <

F

≅π.

 The device for determining the phase shift of two sinusoidal signals is made on standard elements - digital microcircuits and operational amplifiers. Shaper 3 control pulses built on standard circuits and devices. The phase difference sign determination unit 5 can be used using the analog output in this unit. Block 4 for determining the common mode is constructed using standard units as a water supply and storage complex 8. As an trigonometric transducer 6, you can use the arccosine transducer. Managed registration unit 7 is built according to standard schemes: the element EXCLUSIVE OR 12 - using the MS 564 series, key 13 - using the MS 590KN series.

 The advantage of the proposed device is that the use of the aforementioned method of measuring phase shifts allows you to create a device for determining the phase shift of two sinusoidal signals, which has high measurement accuracy, not reducing during infra-low-frequency measurements under dynamic range changes over a wide range.

 An analysis of the error of the links and blocks used in the device shows that the total error is less than 0.1%, which is a higher indicator compared to the errors of modern digital devices for measuring phase shifts. The advantage of the proposed device is also the ability to manufacture small-sized, economical, but precision measuring equipment.

Claims (3)

 1. DEVICE FOR MEASURING PHASE SHIFT OF TWO SINUSOIDAL SIGNALS, comprising a sampling and storage unit, the input of which is connected to the first input of the device, a trigonometric converter, a controlled recording unit and a control pulse shaper, the input of which is connected to the second input of the device, and the output to the control input sampling and storage unit, the output of the latter is connected to the first input of the trigonometric transducer, the first and second outputs of which are connected to the first and second inputs of the controlled block registration window, respectively, characterized in that it further comprises an amplitude detector, a phase difference sign determination unit and a phase detection unit, the first input of the device through an amplitude detector connected to a second input of the trigonometric transducer, the first inputs of the phase detection unit and the phase difference sign determination unit connected to the first input of the device, and the second inputs to the second input of the device, the outputs of the blocks determine the in-phase and determine the sign of the phase difference s respectively to the third and fourth inputs of the managed registration unit.  2. The device according to claim 1, characterized in that the in-phase determination unit comprises a multiplier, a sampling and storage device, a comparator and a shaper, the first and second inputs of the multiplier connected to the corresponding inputs of the in-phase determination unit, the second input of which is connected to the input of the shaper the output of which is connected to the control input of the sampling and storage device, and the output of the in-phase detection unit is connected to the output of the comparator.  3. The device according to claim 1, characterized in that the managed registration unit contains an EXCLUSIVE OR logic element, a key and a controlled inverter, the first input of a controlled registration unit being connected to the first inputs of an EXCLUSIVE OR logic element and a key, the second input of which is connected to the element output EXCLUSIVE OR, the second input of the latter is connected to the second input of the controlled recording unit, the third control input of which is connected to the control input of the key, the output of which is connected to the input of the controlled inverter , The control input of which is connected to the fourth input register managed unit, an output connected to the output of the last inverter managed.

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