RU2017339C1 - Discrete fm detector - Google Patents

Abstract

FIELD: radio communication. SUBSTANCE: discrete FM detector has low-pass filter 1, multiplier 2, amplifier 3, pulse generator 4, two threshold units 5,6, AND gate 7, shift register 8, differentiating unit 9, gate-controlled timing generator 10, 1-2-3-4-5-7-8-9-10-4, 1-2, 4-6-7-9,10-8. EFFECT: increased efficiency. 1 dwg

Description

 The invention relates to telecommunications and can be used in information transmission systems that use wideband pseudo-random signals.

 The purpose of the invention is the expansion of functionality by providing the ability to demodulate discrete frequency-modulated signals according to a random law.

 The drawing shows a structural electrical diagram of the proposed device.

 It contains a low-pass filter 1, a multiplier 2, an amplifier 3, an integrator 4, threshold sides 5, 6, an element 7, a shift register 8, a differentiating unit 9, a controlled clock 10.

 The device operates as follows.

раз. Далее производится интегрирование его на интервале времени Т с последующим сравнением результата интегрирования в пороговом блоке 5 типа "боьше" и в пороговом блоке 6 типа "меньше". В качестве значений порогов для блоков 5 и 6 можно выбрать соответственно h₁ и h₂, причем h₁ < h₂, и h= , где при β>α h₁=

и h₂=

, где h_α и h_β - средние значения результатов интегрирования на интервале Т соответственно модулирующих функций в виде шумов с R_α и R_β . Естественно, что пороги h_α и h_β, а также пороги h₁ и h₂ для блоков 3 и 6 выбираются исходя из значений α , β , T. Если установить, что высокий потенциал напряжения на выходах пороговых блоков 5 и 6 соответствует сигналу "да", то через элемент И 7 в регистр 8 будет на каждом такте записываться информация о попадании и непопадании значения интегрирования в установленный интервал от h₁ до h₂ (символы "1" и "0" соответственно).The input of the filter 1 continuously receives a discrete frequency-modulated random signal. Filter 1 filters out the interfering components of the frequencies and frequencies that lie outside the band occupied by the spectrum of the useful signal x (t). In the multiplier 2, the operation of squaring the useful signal x (t) into the square is performed, and in the amplifier 3, the received signal is amplified in

time. Next, it is integrated over the time interval T, followed by a comparison of the integration result in the threshold block 5 of the type "more" and in the threshold block 6 of the type "less". As the threshold values for blocks 5 and 6, you can choose h ₁ and h ₂ , respectively, and h ₁ <h ₂ , and h = , where for β> α h ₁ =

and h ₂ =

, where h _α and h _β are the average values of the integration results on the interval T, respectively, of modulating functions in the form of noise with R _α and R _β . Naturally, the thresholds h _α and h _β , as well as the thresholds h ₁ and h ₂ for blocks 3 and 6 are selected based on the values of α, β, T. If we establish that the high voltage potential at the outputs of the threshold blocks 5 and 6 corresponds to the signal " yes ", then through the And 7 element, register 8 will record information on the hit and miss of the integration value in the set interval from h ₁ to h ₂ (symbols" 1 "and" 0 ", respectively) at each clock cycle.

 If solid "0" is written in register 8, then in this case it can be stated that the frequency and phase of the oscillations generated by the oscillator 10 are close to the frequency and phase of the clock cycles of the received discrete frequency-modulated signals. If in register 8 there is an entry “1”, then this indicates a mismatch of the corresponding values, and the repetition rate “1” is proportional to the phase difference of the compared values. Differentiating block 9 plays the role of a determinant of growth or decrease in the repetition rate "1" in register 8. If identical information symbols are currently recorded in one of the bits of register 8 and its last digit, then block 9 does not generate a control signal for generator 10. If in this one bit register 8 has "1", and in the last bit "0", then block 9 generates a control signal of one polarity, and if vice versa - of a different polarity. As a result, the generator 10 adjusts to the clock cycles of the received signals. Thus, the threshold blocks 5, 6, the element And 7, the register 8 and the differentiating block 9 act as a phase discriminator with a step discriminating characteristic.

 The number of bits in the register 8, as well as the bit number of the register 8, the output of which is connected to block 9, depends largely on the inertia of the described feedback circuit in the device. As the generator 10, it is advisable to use a generator with discrete control.

PRI me R. The discrete frequency-modulated signals received by the device are signals modulated alternately by noise with R _α and R _β , i.e. useful information contained in them is presented in the form of alternating “0” and “1”.

If the generator 10 generates oscillations with a signal for receiving these signals, which differ in phase from the information cycles of the received signals at approximately T / 2, then from the output of the And 7 element to the output of register 8, "1" will be written, which indicates that the signal at the output of the integrator 4 the level falls in the range from h ₁ to h ₂ . Since in the initial state register 8 was reset, block 9 with some delay, determined by the discharge number of register 8, from which the analyzed signal is taken, starts to generate a control signal to correct the operation of generator 10. As a result, the generator 10 starts to generate oscillations, the phase of which approaches phase of the clock cycles of the received signals, which means that the integrator 4 outputs a voltage that does not fall in value in the range from h ₁ to h ₂ . Therefore, the register 8 receives "0" and the control signals from block 9 to the generator 10 are not supplied.

 The generator 10 is synchronized with the clocks of the signals received in the device.

Claims (1)

 DEVICE FOR DEMODULATION OF DISCRETE FREQUENCY-MODULATED SIGNALS, comprising a multiplier, the output of which is connected to the amplifier input, a low-pass filter, a differentiating unit and a controlled clock generator, characterized in that, in order to expand the functionality due to the possibility of demodulating discrete frequency-modulated randomly to the law of signals, an integrator, two threshold blocks, an AND element, a shift register are introduced, and the low-pass filter output is connected to the first and second inputs of the reg In the case of a shift unit, the amplifier output is connected to an integrator input, the output of which is connected to the inputs of threshold blocks, the outputs of which are connected to the inputs of the And element, the output of which is connected to the input of the shift register, the outputs of which are connected to the first and second inputs of the differentiating unit, the output of which is via a controlled clock the generator is connected to the control input of the shift register and the zeroing input of the generator.