RU2013861C1 - Pulse counter - Google Patents

Abstract

FIELD: pulse engineering. SUBSTANCE: counter has n two-position switches, (3n-1) photon-coupled pairs, n+2 resistors, n-1 decoupling diodes, input photon-coupled pair, additional photon-coupled pair. EFFECT: improved reliability of operation. 1 dwg

Description

 The invention relates to a pulse technique and can be used in automatic control and management systems, in computing devices and in mine automation circuits, for example, in a mine shaft alarm system from working horizons to the surface.

 A decimal counter is known that contains ten bit relays with contact groups, an input relay with a switching contact group, two switching relays with damping diodes connected in parallel to the windings, switching supply voltage pulses to the counting buses of even and odd pulses, a start relay with a damping diode connected in parallel a winding that is connected in series with a capacitor having a discharge resistance to the power supply buses, and a reset switch that provides switching of the pit present voltage (a. s. USSR N 595864, cl. H 03 K 23/03, 1981). This counter has the following disadvantages.

 The lack of reliability of the circuit due to the blackout of the switching relays at the time of switching the switching contacts of the input relay, including the windings of the switching relays to self-lock via their own make contact of the corresponding switching relay.

 Failure of the circuit, which is in the initial state in standby mode, during a short-term loss, followed by a quick restoration of the supply voltage. In this case, at the time of the voltage disconnection, all discharge relays are disconnected, the capacitor of the start relay of the circuit does not have time to discharge, and when the supply voltage is quickly restored, the capacitor charge current is insufficient to turn on the start relay, as a result of which all discharge relays, including the first ones, remain disconnected and the circuit is unable to perceive input pulses.

 The impossibility of using the circuit for a multi-decade counter, since when the supply voltage is disconnected for a time sufficient to completely discharge the capacitor of the start relay of the circuit when the supply voltage is restored, the start relay of all decades will briefly turn on, as a result of which the first bit relays of these decades, which are simultaneously input, will turn on relay for circuits of the corresponding decade of high order. This is perceived by the scheme as the simultaneous receipt of the first impulse for every decade, starting from the second, and will lead, for example, when organizing a decimal digital display, to highlight units in all decades, except for the decade of the least significant digit.

 When you first turn on the supply voltage to the multi-decade counter circuit, the same drawback occurs as in clause 3.

 The circuit does not have the “memory” property: after the accumulation of a given number of code pulses, even in case of a short-term power failure, information is reset.

 Known pulse counter having the property of "memory", containing an input relay with a switching contact group, bit relays and their corresponding on-off double-winding switches, decoupling diodes, reset key, while the device provides the possibility of a pulse by switching the corresponding on-off switch to disable the previous discharge circuit with bit relay, prepare the corresponding discharge circuit to turn on, and at the end of the pulse turn on the corresponding p gas tube circuit (bit switch) at the same time to prepare the next succeeding switch to receive the next pulse.

 The main disadvantages of this device, adopted as a prototype, are the following.

 Insufficient performance, which is essential when using the counter in the circuits of the counting devices. According to the principle of operation, the circuit requires the use of bit and input relays, designed for long-term inclusion. Such relays are characterized by low speed, especially when disconnected (for example, an input relay). The overall speed of the prototype circuit is determined by the total switching time of three elements: the fastest - on-off switch, which also works in the circuit always from supplying voltage to one of its two windings, and non-fast - discharge relays and input relays, which work when the power is turned on and when the power is turned off voltage.

 Insufficient reliability due to the constant presence under current of the weakest element in terms of heat - windings of the discharge relay, on which the count stopped.

 Increased energy consumption due to the need to use long-term operation mode as input and bit relays, the designs of which are characterized by high power consumption of the windings, as well as due to the constant presence of one of the bit relays under current in each decade.

 The purpose of the invention is to increase speed, reliability and reduce energy consumption.

 The goal is achieved by the fact that in the pulse counter, containing n discharge circuits (n-1) decoupling diodes, n on-off switches with closing and opening contact groups with the first and second windings, the first conclusions of which are connected to the first bus of the power source, the second conclusions of the second windings through the reset key are connected to the second bus of the power source, and the last bit circuit through the closing contact group of the last switch with its first output is connected to the second power bus, and each m-1 is bit the circuit (m = 2,3,4, ... n) through the respectively connected NC contact m, NO contact m-1 of the switch and m-1 decoupling diode is connected to its common point by its first output, n + 2 resistors are additionally introduced, the first and second groups of n, the third group of n-1 and the fourth group of two optocouplers, the second outputs of all discharge circuits through the corresponding resistor and input circuits of the optocouplers of the first and second groups connected in series, and in all discharge circuits, except the last, and through the input circuits of the optocoupler third g the ups are connected to the first bus of the power supply, while the n + 1 resistor and the input circuit of the first optocoupler of the fourth group are connected in series to the counter input circuit, the output circuit of this optocoupler connects the second power supply bus to the second output of the first winding of each switch, except for the first, respectively, through the output circuit m-1 of the optocoupler of the third group, the n + 2 resistor connected in series and the input circuit of the second optocouple of the fourth group are connected in parallel to the input circuit of the first optocouple of the fourth group, you the driving circuit of the first optocoupler of the fourth group connects the second bus of the power source to the common point of the first terminals m-1 of the discharge circuit, which, in turn, is connected through the output circuit of the last optocoupler of the first group to the common point of the second terminals of the second switch windings, in each m-1 bit circuit, the common point of the decoupling diode and the make contact of the switch through the output circuit of the corresponding optocoupler of the first group is connected to the second bus of the power source, and the output circuit of the optocoupler of the second group is the output counter circuits.

 The claimed technical solution meets the criterion of "significant differences", since no technical solutions with similar features and properties were found.

 The drawing shows a diagram of the proposed counter with n bit circuits, for example n = 10, which, like the prototype, has the property of memory and is able to provide a multi-bit decimal count with the corresponding number of decades according to the proposed scheme.

 The device contains ten discharge circuits, the first 1.1, 1.2. . . 1.10 second 2.1, 2.2. . . 2.10, third 3.1, 3.2. . . 3.9 groups of optocouplers (optoelectronic switches), groups of limiting resistors 4.1, 4.2. . . 4.10 and decoupling diodes 5.1, 5.2. . . 5.9 discharge circuits, the fourth group of two optocouplers 6 and 7, limiting resistors 8 and 9, providing the ability to receive input pulses, a reset key 10, as well as two-position double-winding switches 11, 12.. . 20 having a closing 11.1, 12.1. . . 20.1 and disconnecting 12.2, 13.2. . . 20.2 contact groups, the position of which in the drawing corresponds to the state after applying power to the second winding of the switch.

 In the drawing, each m-1 discharge circuit (m = 2,3,4.. N) is formed by the series connection of the corresponding decoupling diode, the limiting resistor, the input circuits of the optocouplers of the first, second and third groups, as well as the make contact of the corresponding and open contact of the subsequent , i.e., m switch, and the first conclusions of these circuits (from the side of the decoupling diodes) are connected to a common point, and the second conclusions of these bits of circuits together with the first conclusions of the first and second switch windings are connected to the first source bus Italy, taking into account its polarity. The last discharge circuit contains the corresponding resistor in series, the input circuits of the optocouplers of the first and second groups and the make contact of the last switch, and this discharge circuit is connected between the second and first buses of the power source, taking into account their polarity. The second terminals of the second switch windings are connected to a common point, which is connected via a reset key 10 to a second power supply bus. In each m-1 discharge circuit, the common point of the decoupling diode and the closing contact of the switch is connected through the output circuit of the corresponding optocoupler of the first group to the second bus of the power source, taking into account its polarity, and the output circuit of the last optocouple of the first group connects the common point of the first conclusions of the m-1 discharge circuits with a common point of the second terminals of the second switch windings. The second terminals of the first switch windings, the first directly, and each m through the output circuit respectively m-1 optocouplers of the third group, are connected to a common point, which through the output circuit of the optocoupler 6 is connected to the second bus of the power source, and the input circuit of the optocoupler 6 is connected in series limiting resistor 8 forms the input of the counting pulses of the counter. A chain of series-connected limiting resistor 9 and the input circuit of the optocoupler 7 is connected in parallel with the input circuit of the optocoupler 6, and the output circuit of the optocoupler 7 connects the second bus of the power source with the common point of the first outputs of all discharge circuits, except the last. The output circuits of the optocouplers of the second group are the output circuits of the counter.

 To implement the proposed device, the same switches, reset key, and diodes can be used as in the prototype circuit, MLT resistors, and as optoelectronic keys - thyristor optocouplers, for example, type AOU103, as shown in the drawing, or transistor optocouplers, for example, type AOT110 , ЗОТ110 taking into account the scheme of their inclusion (not shown in the drawing).

 The device operates as follows.

 In the initial state, the supply voltage U is applied to the circuit, all the discharge circuits are de-energized, the position of the contact groups corresponds to that indicated in the drawing, all optoelectronic keys, except key 7, are disconnected. The optoelectronic switch 7 is open (turned on) due to the flow of current through its input circuit through the first winding of the first switch, however, the operation of this switch does not occur as a result of the corresponding limitation of the circuit current by the resistor 9.

On admission to the input of the first pulse U _Rin account is opened (in the pulse width time) switch 6, an output circuit which supplies full potential of the second power supply bus to the first winding of the first switch, causing it to transition to the second stable state. The closing contact 11.1 of this switch closes, preparing the first discharge circuit for inclusion, i.e., for the flow of current in it. At the same time, the output circuit of the key 6 shunts the input circuit of the key 7 with a series resistor 9. Thus, for the duration of the input pulse, the key 7 is always turned off, and for a pause time it is always on. Immediately after the end of the first pulse, the first discharge circuit is switched on by switching on the key 7 and supplying the potential of the second power supply bus through the decoupling diode 5.1, the make contact 11.1 of the switch 11 and the make contact 12.2 of the switch 12 to the resistor 4.1 and the key inputs 1.1, 2.1 and 3.1, respectively the first, second and third groups, which at the same time open. As a result, the output circuit of the key 1.1 automatically blocks the connection of the input of the first bit circuit to the second bus of the power supply regardless of the state of the key 7, the output circuit of the key 2.1 is excited at the counter output (the key is opened), and the output circuit of the key 3.1 prepares the first winding of the second switch 12 to receive the second momentum.

 Upon receipt of the second counting pulse at the counter input, the key 6 is opened again for the duration of the key and the key 7 is closed. The key 3.1 is open for the entire duration of the second pulse due to the action of the key 1.1 that is self-blocking the first bit circuit. As a result of the second, the switch 12 switches to the second steady state. At the same time, its opening contact 12.2 opens, de-energizing the first discharge circuit, which leads to the disconnection of its keys 1.1, 2.1 and 3.1, and the making contact 12.1 closes, preparing the second discharge circuit for inclusion. Immediately after the end of the second pulse, the key 6 is closed, and the key 7 is opened, including through the decoupling diode 5.2 the second bit circuit and its keys of the first, second and third groups 1.2, 2.2 and 3.2. Moreover, the output circuits of these keys provide respectively: key circuit 1.2 - self-locking power of the second bit circuit, regardless of the state of the key 7; key circuit 2.2 - excitation of the second output circuit of the counter; key circuit 3.2 - preparation of the first winding of the next, third, switch 13 to receive the third pulse.

 Similarly, the remaining pulses are counted with sequential selective switching of the discharge circuits up to and including the ninth pulse.

 Upon receipt of the nth pulse (under the drawing conditions, the tenth pulse), the key 6 is turned on again and the key 7 is turned off. In this case, the key 3.9 is open in the previous pulse and the last switch (under the drawing of switch 20) is transferred to the second stable state, which opens contact 20.2 of this switch disables the previous discharge circuit, and the making contact 20.1 of this switch turns on the last discharge circuit to the supply voltage and its keys of the first and second groups 1.10 and 2.10. As a result, the output circuit of the key 2.10 supplies the first pulse for the next decade, and the output circuit of the key 1.10 prepares the second windings of all switches to turn on, which occurs after the end of the nth pulse, followed by the inclusion of the key 7. In this case, all the remote switches return to the first steady state, the keys 1.10 and 2.10 are turned off, and the key 1.10 breaks the power supply circuit of the second switch windings, and the key 2.10 completes the formation of the first pulse for the next decade, and this deck and it comes in its original state.

 If it is necessary to increase the reliability of the automatic return of the switches after the nth pulse to the initial state, in order to prevent the last switch from returning before creating the conditions for switching any of the previous switches, it is possible to slow down the operation of the second coil of the last switch in a known manner, namely, by connecting a resistor in series with this winding , and in parallel with it, a capacitor (not shown in the drawing).

 The reset key 10, when pressed briefly, resets the circuit to its original state by supplying power to the second windings of the switches and transferring them to the first stable state.

 As in the prototype circuit, due to the on-off switches in the proposed counter, the "memory" property is provided when the supply voltage disappears for an arbitrarily long time.

 The proposed scheme provides the following advantages relative to the prototype.

 Increased performance. In the proposed scheme, the interval between pulses is determined almost exclusively by the switching time of the high-speed switch, since the time of switching on and off the optoelectronic keys can be practically neglected. In the prototype circuit, this interval is determined by the total turn-on time of the switch, the input and corresponding discharge relays, which are less fast when triggered than the switch, and release the input relay, which is always much higher than the turn-on time of the same relay.

 Improving reliability by replacing long-duration discharge relays with a thermally unreliable element - a winding with semiconductor optoelectronic switches that allow for arbitrarily long-term activation, as well as by eliminating discharge relays from the contact circuit.

 Reducing energy consumption, and as a consequence of this, and dimensions due to the replacement in the discharge circuits of the discharge relays of long-term inclusion by optoelectronic switches with significantly lower power consumption and dimensions. For example, at a supply voltage of 24 V in the prototype circuit, the current consumption of the relay, for example of the RP-21 type, is 80 mA, while for optocouplers in the proposed circuit it can have a value of about 10-15 mA.

 These advantages determine the technical and economic efficiency proposed in comparison with the scheme of the prototype.

Claims (1)

 PULSE COUNTER containing n switching bit elements with first and second switched groups, the first conclusions of which are connected to the first bus of the power supply, n - 1 decoupling diodes, the input switching element with a switched group, the first output of which is connected to the second power bus, which is connected to the first conclusions of the second switched groups of n - 1 switching bit elements, a reset key, characterized in that, in order to improve performance, reliability and reduce power consumption, it will complement n resistors, n on-off switches with first and second windings and closing and opening contact groups, the first conclusions of the first and second windings of which are connected to the first bus of the power supply, the second conclusions of the first windings of each of the two-position switches except the first through the first switched group m - 1 switching bit element (m = 2,3,4, ..., n) are connected to the second terminal of the switched group of the input switching element, which is connected to the second terminal of the first winding of the on / off switch, the second terminals of the second windings of the on / off switches are connected via a reset key to the second bus of the power supply and through the second switching group of the last switching element to the anodes of the decoupling diodes, the second terminals of each of the switching discharge elements, except the last, through a resistor disconnecting the contact in series group of the k-th on-off switch (k = 2,3,. . . , n) and the closing contact group of the nth on-off switch are connected to the second terminals of their own second switching groups and the cathodes of the corresponding decoupling diodes, the second output of the switching element of the last discharge through a series-connected resistor and the closing contact group of the last on-off switch is connected to the second power bus, anodes decoupling diodes are connected to the first output of the switched group of the additional switching element, the second output of which it is connected to the second power bus, which is connected through an additional resistor to the first terminal of the additional switching element, the second terminal of which is connected to the second terminal of the first winding of the first remote switch, the discharge switching elements, except the last, are made on the light emitters of the first, second, third optocouplers in series, the discharge switching element of the last discharge is made on the first and second optocouplers connected in series, the photodetectors of the first optocouplers are are the second switched groups of commuting discharge elements, the first commutated groups of which are made on the photodetectors of the third optocouplers, the photodetectors of the second optocouplers are the outputs of the counter, the input and additional switching elements of which are made on the light emitters of the input and additional optocouplers, the photodetectors of which are the input and additional commutated groups.

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