RU1837359C - Device for display of symbols on cathode-ray tube screen - Google Patents

Abstract

Usage: in the field of automation and computer technology, an on-line display system of information on the screen of the display of symbols of complex configuration within the matrix field of 8x8 pixels. The inventive device includes a pulse generator (1), a CRT (2), sawtooth voltage generators (along the X coordinate and Y coordinate) (6, 7), a symbol end signal conditioner (12), an inclined line video signal conditioner (9), inclined line video shaper groups

Description

cl

with

The invention relates to automation and computer technology, and is intended for rapid operational display of information on a screen display of symbols of complex configuration within the matrix field of 8x8 ticks,

The aim of the invention is to increase the speed of the device.

Fig. 1 shows a functional device for displaying symbols on a CRT screen, Fig. 2 shows an oblique line video shaper, Fig. 3 shows a video signal shaper, I- and Fig. 4 is an example of a symbol generated in Within raster sign fields with different partitioning of their matrices.

The device comprises a pulse generator 1, a cathode ray tube (CRT) 2, with deflecting systems in the coordinate X 3 and coordinate Y 4 and the modulator 5,

X-axis sawtooth generator 6, Y-axis sawtooth generator 7, OR element 8, oblique line video signal generator 9, group of oblique video signal generators 10i-10n, bias voltage generator 11, symbol end signal generator 12 and group horizontal line video shapers 13i-13m, control input 14, output 15.

The inclined line video signal generator 9 (10) comprises a memory unit 16, registers 17, 18, And elements 19, 20, a reversing counter 21, a comparison unit 22, a voltage shaping device 23, an adder 24, a switch 25, registers 26 and 27 , decoders 28, 29, 30, subtractors 31 and 32, code converter 33, switches 34-37, comparison units 38, 39 and 40 of pulse former 41, 42, group

00

w

VI

Gj

SL Yu

formers 43-1-43 pulses, element 44 AND, element 45 OR,

The horizontal line video shaper 13 comprises registers 46.47 and 48, decoders 49, 50.51, switches 52, 53 and 54, comparison blocks 55, 56 and 57, AND elements 58 and 59, and a trigger 60.

61 indicates the information input of the device.

The following positions indicate, respectively: 62 — clock input of the oblique line video signal generator, 63–65 — its first, second, and third control inputs, 66–67 — its second and third information inputs, and 68 — its output.

The following positions indicate respectively: 69 - the second information input of the horizontal line video signal generator, 70-72 - the first, second and third control inputs of it, 73 - its output.

The essence of the invention consists in the formation of backlight signals, which are pulses of a certain duration and generated at the moments of equal potentials of the deflecting voltage of the television scan of the frame on the screen of a CRT and potentials that directly track the fragments of the generated images in a functional way.

The generation of symbols on the screen of a CRT 2 is carried out within the sign field of 8x8 nodes (Fig. 4a), which may have a different partition (Fig. 4, B, c, d).

An informational description of the displayed symbols is set as follows. Symbols displayed by the proposed device may consist of n fragments of the first type and m fragments of the second type. A fragment of the first type is a broken line, consisting of two segments located between two nodes of the sign field. Moreover, the segments of which the fragments of the first type consist must have a nonzero projection onto the coordinate axis OY of the sign field. Fragments of the second type are segments located between nodes of the sign field and parallel to the coordinate axis OX. Since the dimensions of the sign field are 23x23 nodes, a bit is needed to encode any of its nodes. Therefore, to encode a fragment of the first type, located between the three nodes of the sign field, 18 - Tb bits are required, which are stored in memory blocks 16 of the drivers 9, 10. To encode a fragment of the second type, 9-10 bits are required (bits in X and 3 coordinate -th bit in Y coordinate). Thus, the information description of the invention shown in Fig. 4a, consisting of four fragments of the second type and eight fragments of the first type, is 180 bits. In shaper 13, the code of the fragment of the second type is entered into register 46 in the coordinate Y. And in registers 47-48, codes in the coordinate X are entered.

If we take into account that the CRT 2 beam moving speed along the OY and OX coordinate axes is constant for different partitions of the raster sign fields, then when forming the image within the partition, the familiar field is 28x28 cells (Fig. 4d) the pulse repetition period from the pulse generator 1 should be two times less than when forming images on familiarity with a partition of 14x14 cells (Fig.4c) and four times less than when forming images on familiarity with a partition of 7x7 cells (Fig.56).

The sawtooth voltage generator 6 along the X coordinate generates a linearly increasing voltage with an amplitude sufficient to deflect the CRT beam 2 within the raster sign field of the selected partition along the OX axis, and with a frequency whose lower limit is limited by the critical frequency of human perception of a non-flickering image ( 25 Hz), and the upper one with a resolution of a CRT (for the accuracy of image reproduction and the energy needed to illuminate the phosphor of the screen).

The sawtooth voltage generator 7 along the Y coordinate generates a linearly increasing voltage with an amplitude sufficient to deflect the CRT beam 2 within the raster sign field of the selected partition along the OY axis and with a pulse repetition period 28 times greater than the pulses from the generator 6 for dividing 28x28 familiarity cells (Fig. 4) 14 times as large for dividing 14x14 cells (Fig. 4c) and 7 times as large as dividing 7x7 cells (Fig. 4b).

At one of the outputs of the former 11 of the bias voltage there are voltages of the magnitude, O, U, 2U ... 7U, and at the other output of the former 11 there are voltages of the size 1 / 7U, 1 / 6U, 1 / 5U, 2 / 7U, 1 / 3U, 2 / 5U, 3 / 7U. 1 / 2U, 4 / 7U, 3 / 5U, 2 / 3U, 5 / 7U, 3 / 4U. 4 / 5U, 5 / 6U, 6 / 7U, 7 / 6U, 6 / 5U, 5 / 4U, 4 / 3U, 7 / 5U, 3 / 2U, 5 / 3U, 7 / 4U, 7 / 3U, 5 / 2U, 7 / 2U. A voltage of U is sufficient to move the CRT beam between adjacent nodes of the sign field (Fig. 4a).

Shapers 9, 10 generate backlight signals at their outputs, forming fragments of the first type, and shapers 12 form forming fragments of the second type.

The main elements of the memory unit 16 (Fig. 2) are three six-bit registers (not shown). The first three bits of the first of the registers contains the code of the beginning of the fragment of the first type in the coordinate of X, and the second three bits contain the code

the beginning of this fragment in the Y coordinate. In the next two registers are the codes of the first and second fragments of the first type, Writing information into the registers

Eye 16 memory occurs from input 61 Symbol code through the information input of block 15. Read pulses are applied to

the first is the third inputs of block 16. Only information from one register can be read at a time, and the signal information is read from the first region by the signal from the first input of block 16. By the signal from the second input of block 16, information can be read from the second region, if the code is the first the register of block 16 in coordinate Y is zero.

From the second register, information can

1t is also read by a signal from the third

Ode, if the code of the first register of block 16, the Y coordinate is different from zero. From the third register of the block 16 information

It only occurs on a signal from the third

ode to block 16. In addition, information is read from block 16 so that (from its third register, information is read only after the information from the second register is preliminarily read. In case

d the beginning of the first fragment of the first type

the first register of block 16 in the Y coordinate is nonzero, then on the control

At the input of block 16, a zero pulse inhibit signal is generated by the first pulse driver 41.

from the inhibit signal is generated at an interval until information is read from the second register of block 16.

During operation of the device, codes of the end of the first MJoro fragment of the first type are stored in registers 17 and 18, and in the registers

and 27 the codes of the beginning of this fragment are stored, respectively, in the coordinates Y and X. Thus, in the first output of block 16

in the register 17, fragment codes are read in the coordinate Y, and on the second output in the register 18 in the coordinate X. Information in

histories 26 and 27 are recorded by signals,

 Entering the entries entries of these regions. Reversible counter 21 - with record

initial condition, which is applied to

his information input. Information is recorded in registers 17 and 18 and in the reverse counter 21 by the recording signals received respectively at the first third inputs of block 16 and at the recording input of the counter 21.

The second and third inputs of block 16 and the recording input of the counter 21 are delayed. Delay time is needed on

0 preliminary rewriting of information from registers 17 and 18 to registers 26 and 27 before updating information in registers 17 and 18 and in the reverse counter 21. Comparison unit 22 is intended for

5 compares the status of register 18 of the code of the end of the fragment of the first type with respect to the coordinate X and the reverse counter 21. In the case where the register code exceeds the code of the reverse counter, the signal occurs at the first output of the comparison unit 22. When the register code is less than the code of the reverse counter, a signal occurs at the second output of the comparison unit 22.

Shaper 23 deflecting voltage 5 generates at its output a linearly increasing voltage when a single signal is applied to its summing input, a linearly decreasing voltage - when a single signal is applied to it

0 subtracting input, retains the previously developed potential at its output in the absence of signals at its summing and subtracting inputs and zero potential - when a single signal is supplied to its first and second zeroing inputs and zero signal to its inverse zeroing input. The rate of rise or fall of the potential at the output of the driver 23 is determined by the level of voltage supplied to its information input.

An adder 24 sums the potentials supplied to its inputs.

Subtractors 31 and 32 determine the difference by the absolute value of the binary numbers supplied to their inputs.

Switches 25, 34-36 and 52-54 are selected by means of switching signals supplied to their

0 control inputs, the level of one of the bias voltages stored by the shaper 11.

Blocks 39 and 40 and 57 comparison produce at their outputs a single signal in

5 if the potential levels of the signals supplied to their first inputs exceed the level of the potentials of the signal supplied to their second inputs, and vice versa, the comparison blocks 38, 44 and 56 generate a single signal at their outputs

excesses of potential levels of signals supplied to their second inputs over potential levels of signals supplied to their first inputs.

The end-of-signal signal generator 12 generates pulses when the signal trailing edges arrive at its input. The pulse generators 41 and 42 generate short-duration pulses during the arrival of the leading and trailing edges of the signals at their inputs. Shapers 43i-43 generate pulses during the rising edges of the signals. The pulse duration from the formers 431-43 determines the width of the luminescence of the fragments of the first type for different nodes of the slope of the fragments of the first type relative to the OX coordinate axis: the smaller the inclination angle, the longer the pulse duration, the switch 37 is selected from the corresponding shaper 431-43.

The device operates as follows.

The code of the displayed symbol is input to the device 61 and is recorded in the registers of the memory blocks 16 and in the registers 46-48. According to the signal (Start) received at the (input 14) of the device, the pulse generator 1 and the sawtooth voltage generator 7 in the Y coordinate are started, and then the linearly increasing voltage in the Y coordinate starts from zero potential. At the start signal, they reset to zero, i.e. reverse counters 21, deviating voltage generators 23 and registers 26 and 27 are being prepared for operation, and the beginning codes of fragments of the first type will be entered from registers 16 into registers 17 and 18. Triggers 60 of former 13 are also reset.

Let us further consider the operation of the formers 9 and 10, suggesting that the start code of the first fragment of the first type in the Y coordinate is zero. Since the zero code is stored in the registers 26 and 27, the zero potentials are generated by the switches 34 and 25, which are supplied to the potential comparison unit 38 and the adder 24. In this case, a single potential is generated at the output of the unit 38, as a result of which the generator 41 produces a short the duration of the pulse, which, going through the element 45 OR will overwrite the information from the registers 17 and 18 in the corresponding registers 26 and 27 (zero code at the Y coordinate and any code at the X coordinate), and then update the contents of the registers 17 and 18 and write the code acala fragment of the first type of coordinate X

register 27 to the counter counter 21. At the same time, at the output of the switch 35, the bias voltage level corresponding to the end code of the fragment along the Y coordinate will be selected and at the output of block 39 a unit potential will also be formed, which together with the unit potential from block 38 will open element 44 AND At the same time, the output level of the bias voltage will be selected at the output of the switch 25. This level corresponds to the beginning code of the fragment at the coordinate X, which will go to adder 24. In addition, subtractors 31 and 32 determine the differences between the ko The size of the beginning and the end of the generated fragment, as a result of which the code converter 33 generates a code that selects the bias voltage from the shaper 11 in the switch 36, which determines the rate of increase or decrease of the potential at the output of the shaper 23. Block 22 compares the state of register 18 with the state of the counter 21 , develops high potential at one of its exits.

If the signal occurs at its first output, then the potential generated by the deflector 23 is increased. Moreover, the growth rate of the potential at the output of the shaper 23 is such that if the output of the adder 24 were directly applied to the deflecting system 3 of the CRT 2 along the X coordinate, then a fragment whose coordinates were recorded in registers 17, 18, 26, and 27 would be displayed on the screen of the CRT 2 . In addition, the signal from the driver 23 is summed with the potential from the switch 25 in the adder 24. If the signal occurs at the second output of the block 22, then a decreasing potential is generated at the output of the driver 23 with the corresponding decay rate and is summed This potential is also with the potential from the switch 25 in the adder 24.

Each time, when the potential level from the sawtooth voltage generator 6 in the X coordinate exceeds the potential from the adder 24, a single signal is generated at the output of block 40, the leading edge of which is allocated to pulse generators 43i-43 with different durations. The signal from the corresponding driver is selected according to the above rule by the switch 37 and is transmitted further through the open element 44 And then through the element 8 or to the CRT modulator 5, as a result of which the generated fragment of the first type is highlighted on the CRT screen 2.

The generation of signals of positive or negative polarity by the driver 23 continues until e balancing of the states 1 of the register 18 and the reverse counter 21. The counter 21 is dimmed so that if a segment of the first type of segment is formed to the side increasing the X coordinate, the clock pulses go to the summing input of the counter 1, and if the coordinates are decreasing, the pulses from the generator 1 arrive ia the subtracting input of the counter 21. This ensures that the outputs of block 22 are connected enes corresponding inputs of elements 19 and 20 and, on the other lmpulsy which come from the output of the generator 1,

As soon as the potential from the sawtooth voltage generator 7 in the Y coordinate exceeds the potential U0 from the switch 35, the corresponding shaper 9, 10 will be transferred to the formation mode of the second segment of the first type fragment. This will happen as follows.

At the point in time when the potential from the sawtooth voltage generator 7 in the Y coordinate exceeds the potential Uo from the switch 36, a zero potential is generated at the output of block 39, as a result of which a short pulse will be generated by the former 42, which, after passing through the OR element 45, will overwrite information from registers 17 and 18 to the corresponding registers 26 and 27, and then update the contents of registers 17 and 18 and the reverse counter 21, as a result of which the codes of the beginning of the second segment of the fragment of the first type will be recorded in registers 26 and 27 , i.e. codes of the end of the first segment, in registers 17 and 18 - codes of the end of the second segment of a fragment of the first type, and in counter 21 - a code along the X coordinate of the beginning of the second segment, Functioning of the shapers 9.10 when displaying the second segments of fragments of the first type is similar to displaying the first segment. In this case, the former 23 is preliminarily cleared by the signal from the elements 45 of IL I.

The formation of fragments of the second type (parallel to the axis OX) is as follows. According to the code recorded in registers 46-48 by switches 52-54, the corresponding bias voltage levels are selected. At the same time, the fragment code in the Y coordinate is stored in register 46, the code of the smaller number in the X coordinate in register 47 and the larger code in the register 48 along the X coordinate. Block 55 generates a single signal when the potential level from the generator exceeds the potential level 7 from the switch 52, block 56 will generate a single signal, on the contrary, when the potential level from the switch 54 exceeds the potential level from the generator 6. Combining these of signals will enable at the output of element 58 And to form a pulse of illumination of a fragment of the second type, which will pass through the open

0 unit potential from the inverted output of flip-flop 60, element 59 AND and then through element 8 IL AND to modulator 5 of CRT 2. A trailing edge of this pulse will trigger flip-flop 60 to the state when the element And 59 I closes with zero potential from its inverse output. after which the next impulses from element 58 And will not pass through element 59 I. Thus, a fragment of the second type will be displayed with a width of one

0 line scan frame CRT 2.

If the start code of the first segment of a fragment of the first type with respect to the Y coordinate is not zero, then zero is generated at the control output of block 16

5, a potential which, upon entering the inhibitory input of the first pulse shaper 41, prevents the formation of a pulse during the operation of block 38, i.e. at a point in time when the potential from

0 generator 7 will exceed the zero potential from the switch 34, because at the initial moment of character formation, a zero code is stored in register 26 due to zeroing it by the Start signal, which is input

5 14, devices. In this case, there is no rewriting of the codes from registers 17 and 18 both to registers 26 and 27 and to the reverse counter 21, and at the output of the former 23 there is a zero potential due to the presence on

0 its inverse nulling input nullifies the zero signal until the potential level from the generator 7 exceeds the level of the bias voltage from the switch 35, after which the output

5 of block 39, a zero potential is generated and the driver 42 will generate a pulse that will first rewrite the start codes of the first generated fragment from registers 17 and 18 to the corresponding registers

0 26 and 27, and then after a delay time - from the second register of block 16 to registers 17 and 18 the coordinate codes of the end of the first segment of the fragment of the first type and from register 27 to the reverse counter 21 - the code of the beginning of the first 5 segment along the X coordinate. At the same time at the control output of block 16, a unit potential is generated, allowing the driver 23 to form a linearly decreasing or linearly increasing voltage. So

Thus, the device proceeds to display the first segment of the fragment of the first type. The functioning of the nodes of the device is similar to that described above.

Upon reaching the potential from the sawtooth voltage generator 7 along the V coordinate of level 7 U, the voltage is reset to the zero level at the output of the latter, as a result of which the driver 12 generates the End symbol signal. Based on this signal, the device is prepared for the formation of the following symbol: the CRT beam 2 is transferred to the beginning of another familiarity, the information is updated in the registers of blocks 16 of the shapers 9, 10 and in the registers 46-48 of the shapers 13.

The technical and economic advantage of the claimed device consists in obtaining a combined image forming method based on combining raster and functional methods of displaying information on a CRT screen.

SUMMARY OF THE INVENTION 1. A device for displaying symbols on a cathode ray tube (CRT) screen, comprising a pulse generator, the input of which is the control input of the device, connected to the control input of the sawtooth voltage generator in the Y coordinate and the first control input the oblique line video signal generator, the first information input of which is the information input of the device, the second control input of the oblique line video generator is connected to the output of the sawtooth generator voltage along the X coordinate, connected to the CRT deflection system in the X coordinate, the deflection system in the Y coordinate, is connected to the output of the sawtooth voltage generator in the Y coordinate, connected to the third control input of the inclined video signal generator, the clock input of which is connected to the output of the pulse generator, and an OR element, characterized in that, in order to increase the speed of the device, it contains a signal end driver, a bias voltage driver, a group of formers ideosignalov oblique lines and a group of horizontal lines of video signal generators, the first data inputs of which are connected to the information input device, the first output of the bias voltage is connected to

to the second information inputs of the oblique line video signal conditioner and the video signal generators of the inclined and horizontal lines of the groups, the second output of the bias voltage former is connected to the third information inputs of the oblique video signal generator and the oblique and horizontal video signal generators

0 groups, the first control inputs of the formers of the inclined and horizontal lines of the groups are connected to the control input of the device, the second and third control inputs of which are connected to the outputs of the sawtooth voltage generators respectively in the X and Y coordinates, the clock inputs of the video generators of the inclined lines of the group are connected to the output of the pulse generator, outputs

0 oblique line video signal conditioner and group oblique and horizontal line video signal conditioners are connected to the inputs of the OR element, the output of which is connected to the CRT modulator, the second output of the sawtooth voltage generator in the Y coordinate is connected to the input of the signal end conditioner, the output of which is the output waveform End of device display.

0 2. The device according to claim 1, with the proviso that the oblique line video shaper comprises a memory unit, from the first to the fourth registers, from the first to the third elements AND, a reverse counter first to fourth comparison units, a diverter, a combiner, first to fifth switches, first to third decoders, first and second subtracters, a code converter, first and second pulse generators, a group of pulse generators and an OR element, the information input of the memory unit is The first information input is formative. the first and second outputs of the memory unit are connected to the inputs of the first and second registers, respectively, the first inputs of the first and second elements AND are the clock input of the driver, the outputs

0 of the first and second elements AND are connected respectively to the summing and subtracting inputs of the reverse counter, the output of which is connected to the first input of the first block of comparison, the second input of which is 5 keys to the output of the second register, connected to the information input of the fourth register and the first input of the second subtractor, the output of which connected to the first information input of the code converter, the second information

the input of which is connected to the output of the first subtracter, the output of the code converter is connected to the first information input of the fourth switch and the information input of the fifth switch, the control inputs of which are connected to the outputs of the pulse shapers d) ups, the output of the first switch is connected to the first the input of the third element V, the output of which is the output of the shaper, the inputs of the shapers of the group are connected to the output of the fourth block with equalization, the first input of which is the second control input of the shapers a-a; l, and the second input is connected to the output of the adder, the first input of which is connected to the output of the deflector, the second input of the adder is connected to the output of the first switch, the input of which is connected to the input of the second decoder, and the control the input is the third information input of the driver connected to the etching inputs of the second, third, and h; of the fourth switch; the second information input of the fourth switch is the second information input (driver, the output of the fourth the switch is connected to the information input 4 of the deflector voltage regulator, the first control input of the memory unit is the first control input of the former connected to the reset inputs of the reverse counter, deflector, third) and fourth registers , the third output of the memory unit is connected to the control input of the first pulse shaper and the first control input of the bias voltage shaper, the second control input of which, the control inputs of the reverse counter, the third and h of the fourth registers are connected to the output of the first element OR, the output of the first register is connected to the input of the third decoder, the information (to the input of the third register and the first input of the first subtractor, the second of which is connected to the output of the third register connected to the input of the first decoder, output which is connected to the information input of the first switch, the output of which is connected to the first input of the second comparison unit, the second in the code of which is the third control input of the driver connected

with the first input of the third comparison unit, the second input of which is connected to the output of the third switch, the information input of which is connected to the output of the third decoder, the output of the third comparison unit is connected to the second input of the third AND element and the input of the second pulse former, the output of which is connected to the second control input the memory unit and the first input of the OR element, the second input of which is connected to the output of the first pulse shaper connected to the third control input of the memory unit, the outputs of the first block comparator coupled to the second inputs of the first and second members, and third and fourth and the gate input of the deflection voltage output of the second comparator unit is coupled to a control input of the first pulse shaper and the third input of the third element I.

3. Device pop. 1, characterized in that the horizontal line video shaper contains from first to third registers, from first to third decoders, from first to third switches, from first to third comparison units, the first and second AND elements and the trigger whose inverse output is connected to the first input of the second AND element, the output of which is the output of the driver, the first information input of which is the information inputs of the registers, the outputs of which are connected to the inputs of the corresponding decoders, the output which are connected to the information inputs of the respective switches, the control inputs of which are the second control input of the driver, the outputs from the first to third switches are connected to the first inputs, respectively, from the first to third comparison blocks, the outputs of which are connected to the inputs of the first element And, the output of which connected to the trigger installation input and the second input of the second AND element, the trigger reset input is the first control input of the driver, the second control input of which is the second inputs of the second and third comparator block, the second input of the first comparator block is the third control input of the shaper.

LЈ

61

9

/ fft

U

: And

ha

 l

/4

and/

0 /

gz

./l

d;

V77

fi

67 65

tpv. 2

omS &

g

d)

Editor

(rig. Ts

Compiled by L. Abrosimov

Tehred M. Morgenthal Corrector M. Samborska

1837359 From 69 OT-Ya12.

d)