RU1833904C - Fire warning device - Google Patents

Abstract

The invention relates to the field of fire alarms, and more particularly, to alarm systems with addressable sensors for subway rolling stock; An object of the invention is to increase the functional reliability of a device. This device makes it possible to accurately determine the detector from which the alarm was received and, accordingly, the location of the fire source, in case of the possible above-mentioned rearrangement of wagons or replacement by others without corresponding reconnection of the display system, which significantly increases the reliability of the fire alarm system in conditions of its application rolling stock of subways. The device transmits information states via a loop in series with addressable sockets with fire detectors to a control panel. The device consists of a linear part with addressable outlets in series with fire detectors, connected to a control panel, which includes a clock pulse generator, an information processing unit, a pulse counter, an indication unit, and a controlled power supply unit for the linear part. 3 ill. next to

Description

The invention relates to the field of fire alarms, and more particularly to alarm systems with addressable sensors for subway rolling stock. .

The purpose of the invention is to increase the reliability of the system under conditions of its use on the rolling stock of subways.

In FIG. 1 shows a block diagram of a fire alarm system; figure 2 is a block diagram of a block of information processing; Fig. 3 is a block diagram of an address socket.

The system consists of a linear part 1 with series-connected address sockets 2; to which the detectors are connected 3. The linear part is connected to the control panel 4, which includes a generator 5, clock pulses, an information processing unit 6, a counter 7. of an indication 8 and a controlled power supply unit of the linear part 9. In this case the generator 5 is connected to the input of the information processing unit b. The signal output of the inline part 1 is connected to the second input of block 6. The first output of block 6 is connected to the first

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the input of the counter 7, the outputs of which are connected to the display unit 8, the second output of the unit 6 is connected to the power supply 9, and the third to the clock outputs of the address sockets 2 and the second input of the counter 7.

The information processing unit 6 consists of a divider by two 10, a driver 11 of a pulse for disabling clock cycles, and three two-input elements 2 AND 12, 13, 14. The output of the address socket 2 closest to the console is connected to the input of the divider 10 and the first input of circuit 14 12 are connected to the output of the clock generator 5 and through the former 11 with the first output of the divider 10. The inputs of the circuit 13 are connected to the output of the circuit 12 and the second output of the divider 10. The second input of the element 2I 14 is connected to the second output of the divider by two 10. The output of the element 2I 13 connected to address sockets m 2 and the counting input of counter 7, the output of the pulse generator 11 to the resetting input of the counter 7, the output of element 14 to the power supply 9. The address socket consists of two triggers 16, 15 with resistors that specify the initial state of element 2I 17 of the inverter 18. Inputs element 2I 17 is connected to the fire detector and the output of the previous address socket 2. The output of element 2I / 1 17 is connected to the information input of trigger 15. The output of which is connected to the information input of trigger 16. The output of trigger 16 is the output of the address socket. The clock input of the trigger 15 and through the inverter 18 the clock input of the trigger 16 is connected to the information processing unit 6.

The system operates as follows. In the initial state, at both outputs of the divider by two 10 there is always a logical unit supplied directly to the inputs of elements 2I, 13, 14 and through the pulse shaper 11 to the input of the element And 12. Clock pulses from the output of the generator 5 through the information processing unit 6 (circuits 21/12 and 13) are supplied to address sockets 2 of the linear part 1. Each clock pulse moves the logic level from the input of trigger 15 of address socket 2 to the output of trigger 16, which is the output of the socket and the input of the next. A unit is present at the input of trigger 15 only when the unit and detector are in standby mode at the outlet of the outlet. The same clock pulses from the output of block 6 (circuits 2I 13) are supplied to the counting input of the counter 7. If all the detectors are in standby mode, logical units are formed at the outputs of all outlets. The unit enters and at the input of the divider by two 10 and

element 2I 14 of block 6. Element 2I 14 generates at its output a single logic level that enters the power supply unit 9, while supplying power to the linear part 1 of the system.

. When any of the i-fuses is triggered, the logic zero is at the second input of element 2I 17 of the corresponding address socket 2, which, after the end of the next pulse, moves to the output of address socket 2. After a certain number of clock pulses, the logical zero reaches the receiver 4 and goes to the outputs of the divider 10 and element 21 / 1-14 of block 6. At the output of element 2I 14 and, accordingly, the input of power supply unit 9, a logical zero is formed, which leads to the removal of power from the linear part

) The arrival of a logical zero at the input of two 10 dividers leads to the appearance of a zero level at its first output, which ensures that the driver 11 produces a negative impulse blocking

element 2I 12 at a time corresponding to its duration. In this case, the supply of clock pulses to the address sockets 2 and to the counter 7 is stopped. The pulse duration from the shaper 11 is selected

longer time to remove power from the linear part 1. The counter 7 is reset by the same pulse. Immediately after removing the power from the linear part, the unit level at the input of the console 4 is restored, from the output

Element 2A and 14 are again fed unit.

 power supply unit 9 and power supply of the linear part

 restored. All detectors except

triggered form a unit on their

exits. At the input of trigger 15 in the address

socket 2 of the triggered detector is set to zero. After the end of the pulse, the locking element 2I 12, the clock pulses from the generator 5 begin to flow to the counter 7 and the linear part of the system.

; but now the passage of the zero level along the loop from the triggered detector to the input of the receiving console 4 is synchronized with the counter m 7. When the zero level reaches the divider 10 of block 6 a second time, a zero level is formed at the second output of the divider, interrupting the receipt of clock pulses to the counter through element 2I 13 7. The counter 7 is fixed in the state corresponding to the number of the activated detector. This state is fixed by an indication unit providing a warning of a fire that has begun and its location. In addition, the control signal from circuit 2i / l 14 turns off the power from the linear part.

Claims (1)

The claims A fire alarm device comprising a clock pulse generator, a pulse counter, the outputs of which are connected to an indicator, and fire detectors connected to a signal loop, the outputs of which are connected to the first inputs of addressable outlets, which is different in that is connected to the linear part of the receiving console. that, in order to increase the functional reliability of the device, a divider for two, a pulse shaper, the first second and third elements 2I, a controlled power supply unit, each address socket contains a 2I inverter element, the first and second triggers with installation resistors, the output of the first trigger of the address socket is the output of the address socket, the output of each address socket, except the last one, is connected to the second input of the subsequent address socket, the output of which is connected to the input of the receiver panel, one the input of the 2I element of the address socket is the first input of the address socket, the second input of the 2I element is the second input of the address socket, the output of the 2I element is boat it is connected to the installation input of the second trigger, the counting input of which is combined with the input of the inverter and is the third input of the address socket, the output of the second trigger is connected to the installation input of the first trigger, the output of the inverter is connected to the counting input of the first trigger, the divider input has two and If the input of the first element 2I is combined and is the input of the receiver, one output of the divider into two is connected to the input of the pulse shaper, the output of which is connected to one input of the second element 2I and the counting input of the counter pulses, the output of the clock generator is connected to another input of the second element 2I, the output of which is connected to one input of the third element 2I, the other output of the divider into two is connected to other inputs of the first and third elements 2I, the output of the first element 2I is connected to the control input power supply, the output of the third element 2I is the second output of the receiver and is connected to the third inputs of all address sockets, the second input of the first address socket is connected to the power bus, to which other ends are connected resistors, is propelling fourth inputs targeted outlets. Fie. 1 Figure 1 Fig.Z