RU1818667C - Device for control of static-induction metal-insulator-semiconductor transistor - Google Patents

Abstract

SUMMARY OF THE INVENTION: when control pulses are applied to the primary winding of transformer 2, control signals of the corresponding polarity are fed to the gate of the transistor with static induction 1 through transistors 3 and 4. In the absence of control signals, the MOS transistor 11 s is closed on the primary winding of the transformer and on an additional the secondary winding of the transformer due to the unlocking of the MOS transistor 12, a pulse is generated, locking the transistor with static induction. 1 ill.

Description

The invention relates to the field of electrical engineering and can be used to create high-frequency voltage converters for secondary power supplies (WPS).

The aim of the invention is to increase reliability by eliminating the possibility of high DC currents flowing in SIT in the absence of control signals.

The drawing shows a schematic diagram of a device for controlling a transistor with a static induction, containing SIT 1, transformer 2, pnpn transistor 3, pnpn transistor4, two resistors 5 and 6, four diodes 7, 8, 9, and 10, two MIS transistors with induced p-channel 11 and 12, two additional resistors 13 and 14. Transformer 2 has three windings: primary, primary secondary, and secondary secondary. The primary winding is connected to a source of input (control) pulses. The first terminal of the secondary winding of the transformer 2 is connected to the anode of the diode 7 and the cathode of the Diode 8. The second terminal of the secondary winding is connected to the source of SIT 1, the first terminals of the resistors 5, 6 and 14, the source with the substrate of the MOS transistor 11 and the negative terminal of the supply voltage. The positive terminal of the supply voltage is connected to the drain of the CIT 1, the first terminal of the additional secondary winding of the transformer 2 and the first terminal of the resistor 13, the second terminal of which is connected to the gate of the MOS transistor 12 and the drain of the MOS transistor 11. The second terminal of the additional winding is connected to the drain of the MOS transistor 12, the source with the substrate of which is connected to the second terminal of the resistor 14. The gate of the MOS transistor 11 is connected to the cathode of the diode 7 and the emitter of the transistor 3, the base of which is connected to the second terminal of the resistor 6, Transistor collector 3 is connected to the anode of diode 9, the cathode of which is connected to the anode of diode 10 and the gate of SIT 1. The anode of diode 8 is connected to the emitter of transistor 4, the base of which is connected to the second output of resistor 5. The collector of transistor 4 is connected to the cathode of diode 10.

The inventive device operates as follows. When a positive pulse arrives at the primary winding of the transformer 2, a positive voltage appears at the first terminal of the main secondary winding and a negative voltage at the second terminal. Through the diodes 7 and 9, as well as the transistor 3, this positive voltage is supplied to the gate of the SIT 1, which ensures its forced open state. Resistor 6 provides the necessary operating mode for transistor 3, both of which pnp junctions in this case are biased in the forward direction. In this case, transistor 4 will be closed, so that the positive gate voltage of CIT 1 (through diode 10), acting on the collector junction of transistor 4, will only bias it in the opposite direction.

When a negative pulse arrives at the primary winding of transformer 2, the signal (through diodes 8 and 10 and transistor 4) will go to the gate

5 SIT 1, locking it. Resistor 5 provides the necessary operating mode for transistor 4, both of which pnp junctions in this case are biased in the forward direction. The transistor 3 will be

0 is closed. We emphasize that the negative voltage at the gate of SIT 1 charges its gate-source capacitance. As a result, and upon termination of the action of the negative control pulse, CIT 1 will still be

5 be in a closed state (until the arrival of the next positive impulse). The above description of the operation is also true for the prototype. The main feature of the claimed device is to ensure that the CIT 1 is locked when voltage is applied to the terminals between the drain and the source of CIT 1 and no control signals are still fed to the input of the device (to the primary winding of transformer 2). Such conditions are often observed in the initial period of time when you turn on the entire system, which may include an existing device (and prototype), for example, VIET.

0 In the inventive device, the appearance of the supply voltage between the drain and the source of SIT 1 will lead to the appearance of a positive voltage at the drain of the closed MOS transistor 11, and, consequently, at the gate of the MOS transistor 12, As a result, the MIS transistor 12 will be opened and through an additional secondary winding of the transformer 2. current will flow. The resistor 14 forms a negative current feedback in the MOS transistor 12, ensuring its reliable operation. The current of the additional winding of the transformer 1 will provide a negative voltage at the first output of the main secondary winding, which will pass through diodes 8 and 10 and transistor 4 to the gate of SIT 1. This is a negative (emergency) voltage, the prohibition of SIT 1, charges its gate-source capacity, as a result of which a closed state will be maintained

SIT 1 for the required time (up to several minutes), determined by the elements of the circuit.

Thus, the inventive device eliminated the cause of the relatively long (uncontrolled) high current flow in the SIT 1, which could determine its overheating and failure, As a result of eliminating this reason, the reliability of the SIT 1 as a power converter item.

Upon receipt of control signals to the primary winding of transformer 2, positive pulses (through diode 7) will act on the gate of the MOS transistor 11, opening it. As a result, the voltage at the gate of the MOS transistor 12 will drop to almost zero and it will close, breaking the circuit of the (emergency) blocking of CIT 1 and the operation of the claimed device does not practically differ from the prototype.

A significant advantage of the claimed device over the prototype and analogs is the possibility of its reliable operation using only positive control pulses. As soon as the positive pulse on the gate of SIT 1 ceases, its action on the gate of the MOS transistor 11 also ceases, as a result of which MOS transistor 11 is closed. In this case, the positive voltage appears on the gate of the MOS transistor 12 (through the resistor 13) and it opens. A current will flow through the transistor 12, the resistor 14, and the additional winding of the transformer 2, forming a negative voltage at the first (upper) terminal of the primary secondary winding. This negative voltage acts (through diodes 8 and 10 and transistor 4) on the gate SIT 1, locking it.

Claims (1)

Thus, in the absence of a positive control pulse, CIT 1 will be closed, and in the presence of it, it will be open, i.e. The inventive device ensures its operation even in the presence of control pulses of only one (positive) polarity. This circumstance makes it possible to use simpler sources of control pulses with all the ensuing consequences (improvement of overall dimensions, cost reduction, reliability increase). The claims A device for controlling a transistor with static induction, the source and drain of which is connected to the positive and negative terminals of the supply voltage, comprising a transformer, the primary winding of which is intended to be connected to a source of control pulses, and the first diode, the anode of which is connected to the first terminal of the secondary winding of the transformer and the cathode the second diode, the anode of which is connected to the emitter of an n-p-n-transistor, the base of which is connected to the first terminal of the first resistor, the second terminal of which is connected to the second terminal of the secondary winding transformer, the first output of the second resistor, designed to connect to the source of the transistor with static induction, for connecting to the gate of which the atode of the third diode is intended and the anode of the fourth diode, the cathode of which is connected to the collector of the pnp transistor, the anode of the third diode is connected to the collector of the pnp transistor, the base of which is connected to the second output of the second resistor, and the transmitter is connected to the cathode of the first diode, characterized in that In order to increase reliability, two MIS transistors with an induced p-channel, two additional resistors were introduced, and the transformer is made with an additional secondary winding, the first terminal of which is designed to connect a static induction transistor to the drain and connected to the first terminal of the first additional resistor, the second terminal of which is connected to the drain of the first MOS transistor and the gate of the second MOS transistor, the drain of which is connected to the second terminal of the additional transformer winding, and the source to the first terminal of the second additional resistor, the second terminal of which designed to be connected to the source of the transistor with static induction and connected to the source of the first MOS transistor, the gate of which is connected to the emitter of a pnp transistor.