RU1815626C - Pulsed voltage regulator - Google Patents

Abstract

Usage: in power supplies, in particular for powering integrated circuits. The inventive device contains a MOS transistor 1 with an induced n-channel, a choke 2, a capacitor 3, a resistor 5 and an optocoupler, the LED 6 of which is used as a switching diode, and a photodiode 7 is connected between the source and the substrate of the MOS transistor 1. In the device reliable locking of the MOS transistor 1 is ensured and the possibility of a secondary breakdown in it is eliminated, which leads to increased reliability. Due to the small energy losses in both static and dynamic modes, an increased efficiency of the device is realized. 1 ill.

Description

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The invention relates to electrical engineering and can be used to stabilize voltages, for example, to power integrated circuits.

An object of the invention is to increase the efficiency and reliability of a switching voltage regulator.

The drawing shows a schematic diagram of a pulsed voltage regulator containing an MIS transistor with an induced p-channel 1, a choke 2, a capacitor 3 connected to a load 4, a resistor 5, an optocoupler, consisting of LED 6 and photodiode 7. Resistor 5 is a current limiting element. The positive output terminal is connected to the first plate of the capacitor 3, the cathode of the LED 6 and the positive input voltage bus / The negative output terminal is connected to the second plate of the capacitor 3 and the first terminal of the throttle 2, the second terminal of which is connected to the drain of the MOS transistor 1 and the anode of the LED 6. The negative input voltage bus is connected to the source of the MOS transistor 1 and the anode of the photodiode 7, the cathode of which is connected to the substrate of the MOS transistor 1 and the second output of the resistor 5. The control terminal is connected to the gate of the MOS transistor 1 and the first at the output of resistor 5.

It is necessary to supply control signals to the control terminal (as in the analogs and the prototype) from the control circuit (not shown in the drawing), the basis of which is 2.

The device operates as follows. When an input voltage is applied and a positive pulse Uynp is supplied to the control terminal, the MOS transistor 1 opens and the bipolar structure in it is opened. In this case, the current will flow through the inductor 2 to the load and capacitor 3. When the set value is reached, the output voltage of the device to the control terminal of the power supply (from the control circuit) negative (zero) voltage. In this mode, the MOS transistor 1 and its bipolar n-p-p structure are closed. The energy stored in the inductor reverses the voltage polarity across it, causing current to flow through the LED 6. The voltage at load 4 for a certain time will be almost equal to the set value, and with a slight decrease it will again lead to the appearance of a positive Uynp etc. .

When current flows through the LED 6, it emits light quanta that hit the photodiode 7 and generate a photo-emf in it, since it operates in the photovoltaic (gate) mode, i.e. how solar the battery is. This gate voltage on the silicon photodiode is approximately 0.7 V and a minus sign is applied to the substrate (base) of the MOS transistor 1, which provides its (and especially n-p-p structure) formed closure. The locked state of the bipolar p-p-p structure will be maintained for

the entire period of time when

LED current 6.

Since high-power MOS transistors have significantly higher speed than bipolar ones, first in

MOS transistor 1 will switch the MOS structure, and only then bipolar. As a result, the dynamic losses of the device will be determined by the MOS transistor and will be small. The main disadvantage of a high-power MOS transistor is the higher residual voltage in the open state (as compared with a bipolar transistor), which leads to increased static losses for MIS devices. In the proposed mustache. triple in a static open state

it is bipolar pH n-p-p structure will

to shunt the TIR structure as a result

of which only small losses will take place

energies due to the low residual voltage of the n-p-p transistor. Thus, due to small energy losses in both static and dynamic modes, an increased efficiency of the device is realized.

Since the gate voltage of the photodiode 7 biases in the opposite direction (closes) the pn junction the source-substrate junction of the MOS transistor 1, a closed state of bipolar pnp takes place in it

structure whose collector is

the region of the drain, the emitter is the region of the source, and the base is the substrate. The fact that in the device a negative voltage on the substrate (base) provides a locked state

5 n-p-p structure (when the MOS transistor 1 is locked), and, therefore, eliminates the possibility of secondary breakdown of the MOS transistor 1, and determines an increase in the reliability of the stabilizer,

Claims (1)

0 Claims A pulse voltage stabilizer comprising an MOS transistor with an induced n-channel, the source of which is connected to a negative input terminal, 5 a choke, the first terminal of which is connected to the first terminal of the capacitor and the negative output terminal, and the second terminal is connected to the drain of the MOS transistor and to the anode of the diode, the cathode of which and the second terminal of the capacitor are connected to the positive the output terminal connected to the positive side of the optical optocoupler, the anode of the photodiode of which has an input terminal, and the resistor, the first is connected to the source of the MOS transistor, and the water of which is connected to the terminal for the sub-cathode - to the substrate of the MOS transistor and to the source switching to the second output terminal a resistor, a gate of an MIS signal, characterized in that c5 of the transistor is connected to the terminal in order to increase the efficiency and reliability, an LED signal is used to close the source of the diode control.