RU160951U1 - DEVICE FOR FORMING AN INSTANT VOLTAGE VALUE SAMPLE - Google Patents

Abstract

A device for sampling an instantaneous voltage value, comprising: an operational amplifier (op amp); first comparator; a clock pulse generator, which is connected through a logical inverter to the control input of the second key, and through the first pulse shaper, connected to the unit input to the trigger single state; the trigger output is connected to the control input of the first key; the input voltage source, through the first resistor and the first key, is connected to the first terminals of the second key and the storage capacitor, characterized in that the second, third and fourth resistors, the second comparator, the second and third pulse shapers, the logical cell 2OR, a buffer repeater are introduced on the op-amp, moreover: the first output of the second resistor is connected to the first outputs of the second key and the storage capacitor, the second output of the first key and the non-inverting input of the op-amp; the second output of the second resistor is connected to the non-inverting input of the buffer follower at the op-amp, the output of the op-amp, and, through the fourth resistor, with the inverting input of the op-amp and the second output of the third resistor, the first output of which is grounded; the output of the buffer repeater at the op-amp is connected to its inverting input, the output of the device, the non-inverting input of the first comparator, the inverting input of the second comparator; the inverting input of the first comparator is connected to the non-inverting input of the second comparator, the input voltage source and the first output of the first resistor; the second terminals of the second key and the storage capacitor are grounded; the output of the first comparator, through the second pulse shaper, is connected to the first input

Description

The technical field to which the utility model relates.

The utility model relates to electrical engineering, in particular to devices for generating samples of instantaneous voltage values.

State of the art

A device for sampling and storage containing an analog key, two operational amplifiers, a storage capacitor, a feedback resistor, a limiting resistor, two on-board diodes (Zhavoronkova M.S., Bondar S.N. Development of a high-speed device for sampling and storage with increased accuracy / / Methods and technical means of increasing the efficiency of the use of electrical equipment in industry and agriculture: collection of scientific papers based on the materials of the 75th scientific and practical conference of the Electric Power Department SSAU. - Stavropol: AGRUS, 2011.S. 102, Fig. 3). A feature of this device is the fulfillment of the conditions:

where τ _p is the gating interval (sampling);

τ _s - charge time of the storage capacitor.

The disadvantage of this device is the occurrence of an error in the sampling of the analog voltage, due to the fact that the input voltage changes during the sampling interval (sampling), which leads to an ambiguity in the determination of the output voltage (within Δu (Fig. 1)), since it depends on the gate time. Moreover, the noted error is fundamentally unrecoverable due to the fulfillment of condition (1).

A device for sampling and storage containing a non-inverting voltage amplifier, the input of which is simultaneously the information input of the device for sampling and storage and the second input of the comparison circuit, the first input of which is connected to the output of the repeater on the operational amplifier and the output of the device for sampling and storage; the output of the comparison circuit is connected to the S-input of the trigger, the R-input of which serves as the control input of the sampling and storage device; the trigger output is connected to the control input of the analog switch, the input of which is connected to the output of a non-inverting voltage amplifier, and the output is connected to the inputs of the storage capacitor and repeater on the operational amplifier; the comparison circuit contains two comparators and an OR-NOT circuit, the inputs of which are the outputs of the comparators, and the output serves as the output of the comparison circuit; the opposite inputs of the comparators are interconnected and with the inputs of the comparison circuit (patent RU 63623, IPC H03K 17/60).

The disadvantage of this device is the low accuracy of storing the magnitude of the voltage of the input signal.

The closest analogue is the prototype of the claimed technical solution is a device for sampling instantaneous voltage values (patent RU 2230376, IPC G11C 27/02).

A device for sampling the instantaneous voltage value contains an operational amplifier (op-amp), the non-inverting input of which is grounded, and the inverting input is connected to the input voltage source through the first switch and resistor, and a storage capacitor is connected in the negative feedback circuit of the op-amp, in parallel with which the second switch is connected, and the output of the device is the op-amp output, which is connected through an analog inverter to the non-inverting input of the comparator, whose inverting input is connected to the input source voltage, and the output is with the input to the zero state of the trigger, the output of the latter is connected to the control input of the first key, and the input to the single state of the trigger, through a pulse shaper, is connected to the output of the clock generator, which is connected to the control input via a logic inverter second key.

Thus, in the prototype, the sampling of the instantaneous voltage value is carried out by an inverting integrator (made using an op-amp, a resistor with a resistance R, and a storage capacitor with a capacity of C), with a frequency response (2)

,

,

and the voltage at the output of the device, at the time of completion of sampling, defined by the expression (3)

Effective storage time (storage time Δt _storage during which condition (4)

where ξ is the permissible error in measuring the voltage value); is determined by the discharge constant of the integrator τ _bit made on the basis of the op-amp and loaded on the parallel connected input resistances of the analog inverter R _in.AI and the device load R _in.n

that is, the larger the τ _bit , the greater the _storage Δt for a given ξ.

Since, according to the prototype, an analog inverter can be made in the usual way based on an op-amp and two resistors (at the input and in the negative feedback circuit), its input resistance will not exceed hundreds of ohms, units of megohms, and even without taking into account the influence of the input load resistance Δt _storage will be small in comparison with known devices (Volovich GI, Ezhov VB. Microchips ADC and DAC. - M.: Publishing house "Dodeka-XXI", 2005. S. 40, Fig. 51, 52).

The disadvantages of this device are:

- limited functionality - the device provides a sample of the instantaneous voltage value only in the case of unipolar analog signals (signals of positive polarity);

- polarity inversion of the formed sample of the instantaneous voltage value of the input signal;

- the large value of the sample time Δt of the _sample ;

- the effect of load resistance on the value of the effective storage time Δt _storage .

Utility Model Disclosure

The technical result that can be achieved using the proposed utility model is to reduce the value of the sampling time and the influence of the load resistance on the value of the effective storage time of the sample of the instantaneous voltage value of the bipolar analog signals, moreover, with the polarity of the corresponding polarity of the input signal.

The technical result is achieved by the fact that in the device for forming a sample of the instantaneous voltage value containing: OS; first comparator; a clock pulse generator, which is connected through a logical inverter to the control input of the second key, and through the first pulse shaper, connected to the unit input to the trigger single state; the trigger output is connected to the control input of the first key; the input voltage source, through the first resistor and the first key, is connected to the first terminals of the second key and the storage capacitor, the second, third and fourth resistors, the second comparator, the second and third pulse shapers, a logical OR2 cell, a buffer repeater on the op-amp are introduced, whereby: the first the output of the second resistor is connected to the first outputs of the second key and the storage capacitor, the second output of the first key and the non-inverting input of the op-amp; the second output of the second resistor is connected to the non-inverting input of the buffer follower at the op-amp, the output of the op-amp, and, through the fourth resistor, with the inverting input of the op-amp and the second output of the third resistor, the first output of which is grounded; the output of the buffer repeater at the op-amp is connected to its inverting input, the output of the device, the non-inverting input of the first comparator, the inverting input of the second comparator; the inverting input of the first comparator is connected to the non-inverting input of the second comparator, the input voltage source and the first output of the first resistor; the second terminals of the second key and the storage capacitor are grounded; the output of the first comparator, through the second pulse shaper, is connected to the first input of the logic cell 2OR; the output of the second comparator, through the third pulse shaper, is connected to the second input of the logic cell 2OR; the output of the logic cell 2OR is connected to the input of the installation in the zero state of the trigger.

Brief Description of the Drawings

In FIG. 1, 3 ÷ 7 are time diagrams explaining the operation of the device.

In FIG. 2, a functional diagram of a device for sampling an instantaneous voltage value is shown.

In FIG. 8, a functional diagram of a non-inverting integrator is presented based on a two-terminal network with a negative input resistance.

Utility Model Implementation

A device for sampling an instantaneous voltage value contains an input voltage source 1, op-amp 2, a first key 3, a first resistor 4, a storage capacitor 5, a second key 6, a second resistor 7, a first comparator 8, a clock generator (GTI) 9, a logical inverter 10, a pulse shaper 11, a trigger 12, a third resistor 13, a fourth resistor 14, a second comparator 15, a second pulse shaper 16, a third pulse shaper 17, a logic cell 2 OR 18, a buffer repeater on the OS 18, and: non-inverting input of the OS 2 soy inen, through the first key 3 and the first resistor 4, with the output of the input voltage source 1, the inverting input of the first comparator 8, the non-inverting input of the second comparator 15, with the first outputs of the second key 6 and the storage capacitor 5, as well as through the second resistor 7, with a non-inverting input of the buffer follower on the OS 19, the output of the OS 2 and, through the fourth resistor 14, with an inverting input of the OS 2 and the second output of the third resistor 13, the first output of which is grounded; the output of the buffer repeater at the OS 19 is connected to its inverting input, the output of the device, the non-inverting input of the first comparator 8, the inverting input of the second comparator 15; the second terminals of the second key 6 and the storage capacitor 5 are grounded; the output of the clock pulse generator 9, through the logical inverter 10, is connected to the control input of the second key 6, and through the pulse shaper 11, it is connected to the input of the unit in the single state of trigger 12, the input of the zero state of which is connected to the output of the first comparator 8; the trigger output 12 is connected to the control input of the first key 3; the output of the first comparator 8, through the second pulse shaper 16, is connected to the first input of the logic cell 2 OR 18; the output of the second comparator 15, through the third pulse shaper 17, is connected to the second input of the logic cell 2 OR 18; the output of the logic cell 2 OR 18 is connected to the input of the installation in the zero state of the trigger 12.

The operation of the device is illustrated by time charts (Fig. 3 ÷ 7), which show:

- output voltage u ₉ GTI 9 (Fig. 3A);

- input voltage devices u _Rin (output voltage u ₁ input voltage source 1), the output voltage u ₂ OU 2, the output voltage u ₁₉ buffer repeater on the OS 19 (output voltage of the device u _O) (Figure 3b, Figure 4a, FIG.. 5a, 6a, 7a);

- the output voltage u _{18 of the} logic element 2 OR 18 (Fig. 3B, Fig. 4E, Fig. 5e, Fig. 6e, Fig. 7e);

- the output voltage u ₁₁ of the pulse shaper 11 (Fig. 3d).

- output voltage u _{10 of the} first logical inverter 10 (Fig. 3d);

- the output voltage u _{12 of the} trigger 12 (Fig. 3E);

- the output voltage u _{8 of the} comparator 8 (Fig. 4b, Fig. 5b, Fig. 6b, Fig. 7b);

- output voltage u ₁₆ of the pulse shaper 16 (Fig. 4c, Fig. 5c, Fig. 6c, Fig. 7c).

- the output voltage u _{15 of the} comparator 15 (Fig. 4g, Fig. 5g, Fig. 6g, Fig. 7g);

- the output voltage u ₁₇ of the pulse shaper 17 (Fig. 4d, Fig. 5d, Fig. 6d, Fig. 7d).

In FIG. 4 ÷ 7 show the output signals of comparators 8, 15, pulse shapers 16, 17 and logic cell 2OR 18, for various cases of input signal shape.

A device for sampling an instantaneous voltage value operates as follows.

The GTI 9 generates rectangular pulses (Fig. 3a) that control the operation of the device. Consider, for example, the i-th interval of the device, starting at time t _i (Fig. 3). The output voltage of the GTI 9 through the logical inverter 10 is supplied, firstly, to the control input of the second key 6, and in the time interval [t _i ; t _{i + 0.5} ] this voltage is zero (Fig. 3d), so the second switch 6 is open, and secondly, to the input of the pulse shaper 11, which generates a short pulse (Fig. 3d), which sets the trigger 12 to "1" (Fig. 3E), since it is fed to the input of the asynchronous installation of the trigger in a single state. This output signal of the trigger 12 is fed to the control input of the first key 3, which closes at time t _i .

The input voltage u _in (Fig. 3b) from the input voltage source 1 (Fig. 2) is supplied to a non-inverting integrator (Fig. 8), made on the basis of a two-terminal device with negative input resistance (Design of electronic devices on integrated circuits / Ed. C. Y. Shatz - M .: Sov. Radio, 1976, 312 pp. S. 158-163, Fig. 4.23, Fig. 4.24) consisting of OU 2, a storage capacitor 5 and resistors 4, 7, 13, 14. In view of the need to fulfill condition (7)

where R ₍₄₎ , R ₍₇₎ , R ₍₁₃₎ , R ₍₁₄₎ are the resistances of the resistors, respectively, 4, 7, 13 and 14,

determining the mode of optimal functioning of the integrator, its frequency response is described by the expression (8) (Negative resistance converter. [Electronic resource] html.cgi / txt / doc / op / funop_10_6.htm (accessed: 12.10.2015))

изменяется в соответствии с выражением (9) (фиг. 3б)The output voltage of the op-amp 2, the output voltage of the buffer repeater at the op-amp 19 (the output voltage of the device), in the interval

varies in accordance with the expression (9) (Fig. 3b)

Since the comparators 8 and 15 are connected in parallel, and their inputs are connected counterclockwise, the output signals will be out of phase (Fig. 4, b, d; Fig. 5, b, d; Fig. 6, b, d; Fig. 7, b , g).

(время выборки в i-м интервале) (фиг. 3б), напряжение u_вых будет равно мгновенному значению аналогового входного напряжения

устройстваAt time

(sampling time in the i-th interval) (Fig. 3b), the voltage u _o will be equal to the instantaneous value of the analog input voltage

devices

but, due to the finite response time of the key control circuit 3, that is, the fulfillment of condition (11)

at the output of the comparators 8 (for u _in > 0, Fig. 4b, Fig. 5b) and 15 (for u _in <0, Fig. 6d, Fig. 7d) there will be non-zero voltage levels, which through pulse shapers 16 (for u _in > 0, Fig. 4c, Fig. 5c), 17 (with u _in <0, Fig. 6d, Fig. 7d) and logical cell 2OR 18 (Fig. 4e, Fig. 5e, Fig. 6e, Fig. 7e) will ensure the flip-flop of the trigger 12 in the state of the logical "0" (Fig. 3E), which will lead to the disconnection of the first key 3.

, т.е. производится формирование выборки мгновенного значения. Время хранения равно

(фиг. 3б), в течение которого можно использовать полученную информацию о значении выборки в соответствии с решаемыми задачами. В течение интервала времени [t_i+0,5; t_i+1] второй ключ 6 замыкается (на его вход управления поступает единичный сигнал с выхода логического инвертора 10 (фиг. 3д)) и конденсатор 5 разряжается, а в момент времени t_i+1 (фиг. 3) начинается следующий цикл.As a result, the capacitor 5 stores the voltage, which is equal to the instantaneous value of the input voltage at a time

, i.e. sampling of instantaneous value is performed. Storage time is

(Fig. 3b), during which it is possible to use the obtained information about the value of the sample in accordance with the tasks being solved. During the time interval [t _{i + 0,5} ; t _{i + 1} ] the second switch 6 is closed (a single signal from the output of the logic inverter 10 (Fig. 3d) is supplied to its control input) and the capacitor 5 is discharged, and at the time t _{i + 1} (Fig. 3) the next cycle begins.

The pulse shapers 11, 16 and 17 can be performed according to the usual scheme based on a standby multivibrator or a single vibrator triggered by a voltage drop (pulse front).

Thus, in the case of the proposed device, taking into account expressions (3) and (9), it is valid to state that the sampling time is reduced, namely:

In addition, the proposed device has enhanced functionality - provides a sample of the instantaneous voltage value of bipolar analog signals, moreover, with the polarity of the corresponding polarity of the input signal.

Since, in the proposed device, the load of the integrator, made on the basis of OS 2, acts as a buffer repeater on OS 19, in which case the condition is true

where R in. _BP is the input resistance of the buffer repeater at OS 19, then, taking into account expressions (4), (5) and (6), the statement is valid

Given that in the proposed device, the load resistance of the device does not affect the value of R _{input BP} , it is legitimate to assert the formation of a sample of the instantaneous voltage value regardless of the load resistance of the device, and therefore reduce the effect of the load resistance on the value of the effective storage time of the sample instant value voltage.

Claims (1)

A device for sampling an instantaneous voltage value, comprising: an operational amplifier (op amp); first comparator; a clock pulse generator, which is connected through a logical inverter to the control input of the second key, and through the first pulse shaper, connected to the unit input to the trigger single state; the trigger output is connected to the control input of the first key; the input voltage source, through the first resistor and the first key, is connected to the first terminals of the second key and the storage capacitor, characterized in that the second, third and fourth resistors, the second comparator, the second and third pulse shapers, a logical OR2 cell, a buffer repeater are introduced into the device on the op-amp, moreover: the first output of the second resistor is connected to the first outputs of the second key and the storage capacitor, the second output of the first key and the non-inverting input of the op-amp; the second output of the second resistor is connected to the non-inverting input of the buffer follower at the op-amp, the output of the op-amp, and, through the fourth resistor, with the inverting input of the op-amp and the second output of the third resistor, the first output of which is grounded; the output of the buffer repeater at the op-amp is connected to its inverting input, the output of the device, the non-inverting input of the first comparator, the inverting input of the second comparator; the inverting input of the first comparator is connected to the non-inverting input of the second comparator, the input voltage source and the first output of the first resistor; the second terminals of the second key and the storage capacitor are grounded; the output of the first comparator, through the second pulse shaper, is connected to the first input of the logic cell 2OR; the output of the second comparator, through the third pulse shaper, is connected to the second input of the logic cell 2OR; the output of the logic cell 2OR is connected to the input of the installation in the zero state of the trigger.

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