RU157117U1 - ADAPTIVE CALCULATOR FOR SUPPRESSION OF INTERFERENCE - Google Patents

Abstract

An adaptive computer for suppressing interference, comprising the first, second and third main delay units, the first, second and third complex multipliers, a phase measuring unit, a main weight unit, a weighting unit, a main adder and a clock generator, wherein the inputs of the first main delay unit are connected to the first inputs of the phase measurement unit, the second inputs of which are connected to the outputs of the first main delay unit, the outputs of the phase measurement unit are connected to the first inputs of the first, second and third complex scissors, the outputs of the second main delay unit are connected to the second inputs of the second complex multiplier, the outputs of which are connected to the inputs of the third main delay unit, the outputs of which are connected to the second inputs of the third complex multiplier, the inputs of the second main delay unit are connected to the first inputs of the main adder, the outputs of the second complex multipliers are connected to the first inputs of the main weight unit, the outputs of which are connected to the second inputs of the main adder, the first output the weight coefficients are connected to the second input of the main weight block, the output of the sync generator is connected to the clock inputs of the first, second and third main delay blocks, the first, second and third complex multipliers, the phase measurement block, the main weight block, the weight coefficient block and the main adder, characterized in that the first and second additional delay units, an additional adder, an additional weight unit and a switch are introduced, while the inputs of the first main delay unit are connected to

Description

The device relates to computer technology and can be used in automated coherent-pulse systems to isolate the signals of moving targets against the background of passive interference during the wobble of the repetition period of the probe pulses.

A digital device for suppressing passive interference [1] is known, which contains two channels, each of which consists of three main and two additional multipliers, an adder and series-connected first and second memory blocks, as well as a computing unit and a series-connected phase measuring unit and a functional converter . However, this device when wobbling the repetition period due to the narrowing of the interference delay band has a low efficiency of signal extraction of moving targets.

Another known device is the correlation auto-compensator [2], which contains a number of delay units, two multipliers, an adder and a unit for estimating the parameters of the correlated noise. This device also has a number of drawbacks, among which the most significant are: low efficiency of signal extraction of moving targets due to narrowing of the passive jamming delay band during the wobble of the repetition period and poor suppression of extended interference edges, which is a consequence of the large time constant of the adaptive feedback circuit.

Closest to this device, a digital computer for adaptive interference suppression [3], selected as a prototype, contains the first, second and third main delay units, the first, second and third complex multipliers, a phase measurement unit, a main weight unit, a weight coefficient unit, main adder and sync generator. This device does not provide sufficient efficiency of signal extraction of moving targets due to the narrowing of the passive jamming delay band during the wobble of the repetition period.

The problem to be solved in the inventive device is to increase the efficiency of suppressing passive interference and highlighting signals of moving targets when the repetition period is wobbled against a background of passive interference with an a priori unknown Doppler speed.

To solve the problem, an adaptive computer for suppressing interference, containing the first, second and third main delay units, the first, second and third complex multipliers, a phase measuring unit, a main weight unit, a weight coefficient block, a main adder and a clock generator, introduced the first and second additional delay units, additional adder, additional weight unit and switch.

Additional blocks introduced into the proposed device are known. So, the first main delay unit, the first complex multiplier, the phase measuring unit, and the additional adder connected together are used to suppress passive interference, however, their application is not known together with the first and second additional delay units and the second and third complex multipliers for more accurate interference compensation. The links between the third complex multiplier, the additional weight block, the weight coefficient block, the main adder and the switch, as well as the links between the sync generator and other blocks of the adaptive calculator for noise suppression, which provide, respectively, optimal and consistent processing of the wobbled pulse sequence, which result in combined with more accurate compensation of interference to increase the efficiency of the selection of signals of moving targets during a wobble period against a background of passive interference with an a priori unknown Doppler velocity.

The technical result provided by the given set of features is to increase the efficiency of suppressing passive interference and highlighting the signals of moving targets when the repetition period is wobbled against the background of passive interference with an a priori unknown Doppler speed.

The claimed solution is technical in nature, feasible, reproducible and, therefore, is industrially applicable.

In FIG. 1 shows a block diagram of an adaptive calculator for suppressing interference; in FIG. 2 - the main block delay; in FIG. 3 - complex multiplier; in FIG. 4 - phase measurement unit; in FIG. 5 - weight block; in FIG. 6 - block weighting factors; in FIG. 7 - the main adder; in FIG. 8 - additional delay unit; in FIG. 9 - additional adder; in FIG. 10 - block complex conjugation; in FIG. 11 - drive; in FIG. 12 - module calculation unit; in FIG. 13 - complex adder; in FIG. 14 - integrated inverter; in FIG. 15 shows the dependencies of the gain in the signal-to-noise ratio coefficient of the proposed adaptive calculator, averaged over the Doppler phase of the signal, in comparison with the prototype.

The adaptive computer for suppressing interference (Fig. 1) contains the first, second, and third main delay units 1, the first, second, and third complex multipliers 2, the phase measurement unit 3, the main weight unit 4, the weighting unit 5, the main adder 6, and the clock generator 7, the first and second additional delay units 8, an additional adder 9, an additional weight unit 10, and a switch 11; the main unit 1 delay (Fig. 2) contain two random access memory (RAM) 12; complex multiplier 2, 17 (Fig. 3) contains two channels (I, II), each of which contains multipliers 13, 14 and the adder 15; the phase measuring unit 3 (Fig. 4) comprises a complex conjugation unit 16, a complex multiplier 17, a storage device 18, a module calculation unit 19, and two dividers 20; the weight unit 4, 10 (Fig. 5) contains two multipliers 21; block 5 weighting factors (Fig. 6) contains two blocks 22 of read-only memory (ROM); the main adder 6 (Fig. 7) contains two complex adders 23; additional block 8 delay (Fig. 8) contains two RAM 24; additional adder 9 (Fig. 9) contains a complex inverter 25 and a complex adder 26; block 16 complex interface (Fig. 10) contains an inverter 27; drive 18 (Fig. 11) contains two channels (I, II), consisting of n delay elements 28 for the interval t _d and n adders 29; the module calculation unit 19 (FIG. 12) comprises two multipliers 30, an adder 31 and a square root extraction unit 32; complex adder 23, 26 (Fig. 13) contains two adders 33; complex inverter 24 (Fig. 14) contains two inverters 34.

Adaptive calculator for suppressing interference works as follows.

A pack of coherent radio pulses, consisting of passive interference significantly exceeding the signal from the target, is fed to the input of the receiving device, in which it is amplified, is transferred to the video frequency in quadrature phase detectors, and then subjected to analog-to-digital conversion (the corresponding blocks in Fig. 1 are not shown) .

The readings are received at time instants separated by p non-equidistant or unequal time intervals T ₁ , T ₂ , ..., T _i , ..., T _p , and form the core of the wobble, repeating with a constant wobble period:

,

,

where p is the number of repetition periods in the core of the wobble.

Digital codes (x _kl , y _kl ) of both quadrature projections following through non-equidistant intervals T ₁ , T ₂ , ..., in each range resolution element (range ring) of each repetition period form a sequence of complex numbers

U _kl = x _kl + iy _kl = | U _kl | exp (iθ _kl ),

where k is the number of the current period, l is the number of the current range ring, θ _kl is the current phase (usually interference, due to its significant excess over the signal), and

,

,

where φ _0l is the initial phase; φ _jl is the Doppler phase shift of the interference over the period T _j equal to φ _jl = 2πf _jl T _j , here f _jl is the Doppler frequency of the interference.

Digital readings in the inventive adaptive calculator (Fig. 1) are supplied to the inputs of the first main delay unit 1 and to the inputs of the first additional delay unit 8 and the first inputs of the phase measurement unit 3 connected to them, the second inputs of which receive delayed digital samples corresponding to the previous period sounding.

In block 3 of the phase measurement (Fig. 4), the estimates of the Doppler phase shift of the interference for the k-th repetition period (k = 1, 2, ...) for each l-th element of the range resolution (l = 1, 2, ...) are calculated. At the same time, in block 16 of complex conjugation using an inverter 27 (Fig. 10), the sign of imaginary projections is inverted. In the complex multiplier 17, the multiplication of the corresponding complex numbers occurs, realized by operations with the projections of these numbers in accordance with FIG. 3. Formed values

с n+1 смежных элементов разрешения по дальности временного строба, кроме элемента с номером n/2+1, для чего выходные величины элемента 28 задержки с номером n/2 поступают только на последующий элемент 28 задержки (фиг. 11). При этом на выходах накопителя 18 (фиг. 11) образуются величиныenter the drive 18 (Fig. 11), which, using delay elements 28 and adders 29, summarizes the products sliding along the range in each repetition period

from n + 1 adjacent resolution elements according to the range of the temporary strobe, except for the element with the number n / 2 + 1, for which the output values of the delay element 28 with the number n / 2 go only to the subsequent delay element 28 (Fig. 11). Thus at the outputs of the drive 18 (Fig. 11) values are formed

- оценка сдвига фазы помехи за период T_k, усредненная по n смежным элементам разрешения по дальности.Where

- an estimate of the phase shift of the interference over a period T _k averaged over n adjacent range resolution elements.

, поступающие на первые входы всех комплексных перемножителей 2.In block 19 for calculating the module (Fig. 12), the values | Y _k | are determined, and then at the outputs of the dividers 20 (Fig. 4), the values

entering the first inputs of all complex multipliers 2.

Each of the main blocks 1 delay (Fig. 2) consists of parallel-connected random access memory (RAM) 12. Moreover, each RAM 12 is used to store the values of the samples from the rings of the range of one quadrature channel for a period.

In the main delay units 1, each RAM 12 is used to store only the first N samples in each repetition period, where N = (T _min + τ) / t _d is the number of range rings corresponding to the interval T _min + τ, and T _min = min (T ₁ , T ₂ , ...) is the minimum repetition period, τ is the interval equal to the evaluation delay with respect to the middle element of the training sample, excluded in drive 18 (Fig. 11) in accordance with expression (1), t _d is the interval (period) time sampling.

The value of the interval τ is determined by the expression

where t _at is the calculation time of the estimation of the phase of the interference, n is the number of elements of the training sample.

перемножается с отсчетами, соответствующими предыдущему периоду зондирования T_k-1, задержанными во втором дополнительном блоке 8 задержки с целью временного согласования вводимых и компенсируемых фазовых сдвигов на интервал τ.The value formed in block 3 of the phase measurement

multiplied with samples corresponding to the previous sounding period T _k-1 , delayed in the second additional delay unit 8 in order to temporarily coordinate the introduced and compensated phase shifts for the interval τ.

The first additional delay unit 8 also serves to coordinate the arrival time of direct and delayed samples, respectively, at the first and second inputs of the additional adder 9. Each of the additional delay units 8 (Fig. 8) consists of RAM 24 connected in parallel.

Additional blocks 8 delay (Fig. 1, 8) delay the input samples in real time on the interval τ, determined from expression (2). Moreover, each RAM 24 is used for “sliding” storage of τ / t _d samples.

приводит к синфазности отсчетов помехи на входах дополнительного сумматора 9, на первые входы которого поступают отсчеты U_kl, задержанные в первом дополнительном блоке 8 задержки. В дополнительном сумматоре 9 (фиг. 1) происходит раздельное вычитание (фиг. 9, 13, 14) одноименных проекций последовательности обрабатываемых отсчетов и образование на выходе дополнительного сумматора 9 величиныThe sequential complex multiplication of the delayed in the first primary 1 and second additional 8 blocks of delay samples U _{k-1, l} by

leads to common-mode interference samples at the inputs of the additional adder 9, the first inputs of which receive samples U _kl , delayed in the first additional block 8 delay. In the additional adder 9 (Fig. 1), a separate subtraction (Fig. 9, 13, 14) of the same projection of the sequence of processed samples and the formation at the output of the additional adder 9 of the value

.

.

на величину

достигается синфазность отсчетов помехи на входах основного сумматора 6, на первые входы которого поступают отсчеты V_kl. В основном 4 и дополнительном 10 весовых блоках (фиг. 1) осуществляется скалярное умножение проекций на весовые коэффициенты g₁ и g₂ (фиг. 5), поступающие соответственно с первого и второго выходов блока 5 весовых коэффициентов (фиг. 1, 6). В основном сумматоре 6 (фиг. 1) происходит раздельное суммирование (фиг. 7, 13) одноименных проекций взвешенной последовательности обрабатываемых отсчетов и образование выходной величины фильтраThen, by sequential complex multiplication of the delayed in the second and third main blocks 1 delay samples U _{k-1, l} and

by the amount

the common mode of the interference samples at the inputs of the main adder 6 is achieved, the first inputs of which receive samples V _kl . Basically 4 and an additional 10 weight blocks (Fig. 1), the projections are scalarly multiplied by the weighting coefficients g ₁ and g ₂ (Fig. 5), coming respectively from the first and second outputs of the weighting block 5 (Figs. 1, 6). In the main adder 6 (Fig. 1), there is a separate summation (Fig. 7, 13) of the same projections of the weighted sequence of processed samples and the formation of the output filter value

.

.

позволяет адаптироваться к аргументу реальной корреляционной функции помехи. Последовательный двумерный поворот поступающих отсчетов в комплексных перемножителях 2 (фиг. 1) на угол

компенсирует межпериодные доплеровские сдвиги фазы помехи и обеспечивает синфазность входных величин основного 6 и дополнительного 9 сумматоров, что приводит к смещению зон подавления на величину доплеровской частоты помехи, являющимся необходимым условием ее эффективного режектирования.Using current ratings

allows you to adapt to the argument of the real correlation function of the noise. Sequential two-dimensional rotation of the incoming samples in the complex multipliers 2 (Fig. 1) by an angle

it compensates for inter-period Doppler phase shifts of the interference and ensures that the input values of the main 6 and additional 9 adders are in phase, which leads to a shift of the suppression zones by the value of the Doppler frequency of the interference, which is a necessary condition for its effective rejection.

When weighting a wobbled pulse train with constant coefficients, due to the narrowing of the delay band, interference suppression is reduced. In order to eliminate this phenomenon, weight processing with time-varying weighting factors is used. So, for a system of double inter-period compensation, the weight coefficients are determined in accordance with the expressions

where k is the number of the current period.

хранятся в соответствующих ячейках двух блоков 22 ПЗУ (фиг. 6) блока 5 весовых коэффициентов. Как видно из выражения (3), коэффициент g₂ отличен от единицы, что объясняет необходимость введения дополнительного весового блока 10. Кроме того, весовые коэффициенты являются переменными во времени в соответствии с законом вобуляции, что приводит к необходимости их коммутации.Thus, in accordance with the number of repetition periods in the wobble core p pairs of weight coefficients

stored in the corresponding cells of the two blocks 22 of the ROM (Fig. 6) block 5 weighting factors. As can be seen from expression (3), the coefficient g ₂ is different from unity, which explains the need for the introduction of an additional weight block 10. In addition, the weight coefficients are variable in time in accordance with the law of wobble, which leads to the need for their switching.

The selection of the required pair of weights is carried out by the switch 11, forming in each repetition period the address of the corresponding cells of the ROM blocks 22 (Fig. 1, 6) using pulses from the radar synchronizer (not shown in Fig. 1).

The adaptive computer is synchronized to suppress noise by applying to all the blocks of the computer a sequence of synchronizing pulses generated by the synchro-generator 7 (Fig. 1), controlled by the pulses of the radar synchronizer, alternating at intervals T ₁ , T ₂ , .... The repetition period of the synchronizing pulses is equal to the time sampling interval t _d selected from the condition of the required range resolution.

In FIG. Figure 15 shows the dependences of the gain Δµ in the signal-to-noise ratio averaged over the Doppler phase of the signal of the proposed adaptive calculator compared to the prototype versus the normalized noise spectrum width β = ΔfT _sr for two values of the wobble depth (12.5% - curve 1; 25%. - curve 2). The curves are plotted for the case p = 2. The magnitude of the gain depends on the parameters of the wobble law and the width of the interference spectrum.

Thus, an adaptive computer for suppressing interference increases the efficiency of suppressing passive interference and highlighting the signals of moving targets when the repetition period is wobbled against a background of passive interference with an a priori unknown additional effect.

1. A.S. 743208 USSR, IPC G01S 7/36. Digital device for suppressing passive interference / D.I. Popov. - No. 2540079/09; declared 11/03/1977; publ. 06/25/1980, Bull. Number 23. - 4 p.

2. Radio-electronic systems: the fundamentals of the constructions theory. Reference book / Ya.D. Shirman, S.T. Baghdasaryan, A.S. Malyarenko, D.I. Lekhovitsky [et al.]; edited by Y.D. Shirman. - 2nd ed., Revised. and add. - M: Radio engineering, 2007; from. 439, fig. 25.22.

3. A.S. 934816 USSR, IPC G01S 7/36, G01S 13/52. Notch filter / D.I. Popov. - No. 2999628/09; declared 10/30/1980; publ. 11/27/1998, Bull. No. 33. - 20 s.

Claims (1)

An adaptive computer for suppressing interference, comprising the first, second and third main delay units, the first, second and third complex multipliers, a phase measuring unit, a main weight unit, a weighting unit, a main adder and a clock generator, wherein the inputs of the first main delay unit are connected to the first inputs of the phase measurement unit, the second inputs of which are connected to the outputs of the first main delay unit, the outputs of the phase measurement unit are connected to the first inputs of the first, second and third complex scissors, the outputs of the second main delay unit are connected to the second inputs of the second complex multiplier, the outputs of which are connected to the inputs of the third main delay unit, the outputs of which are connected to the second inputs of the third complex multiplier, the inputs of the second main delay unit are connected to the first inputs of the main adder, the outputs of the second complex multipliers are connected to the first inputs of the main weight unit, the outputs of which are connected to the second inputs of the main adder, the first output the weight coefficients are connected to the second input of the main weight block, the output of the sync generator is connected to the clock inputs of the first, second and third main delay blocks, the first, second and third complex multipliers, the phase measurement block, the main weight block, the weight coefficient block and the main adder, characterized in that the first and second additional delay units, an additional adder, an additional weight unit and a switch are introduced, while the inputs of the first main delay unit are connected to the strokes of the first additional delay unit, the outputs of which are connected to the first inputs of the additional adder, the outputs of the first main delay unit are connected to the inputs of the second additional delay unit, the outputs of which are connected to the second inputs of the first complex multiplier, the outputs of which are connected to the second inputs of the additional adder, the outputs of the additional adder connected to the inputs of the second main delay unit, the outputs of the third complex multiplier are connected to the first inputs an additional weight block, the outputs of which are connected to the third inputs of the main adder, the second input of the additional weight block is connected to the second output of the weight coefficient block, the output of the switch is connected to the address input of the weight coefficient block, the output of the clock generator is connected to the clock inputs of the first and second additional delay blocks, additional adder and an additional weight unit, the inputs of the adaptive computer for suppressing interference are the inputs of the first main delay unit and, and outputs are the outputs of the main adder.

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