RU1285954C - Device for cycle programming control - Google Patents

Abstract

The invention relates to the field of automation and computer engineering and may find application in the automation of production processes, in particular, multi-cycle strength tests of aircraft objects. The purpose of the invention is to expand the scope of application of the device by reducing the time spent on testing while maintaining the specified accuracy of the program signal and maintaining the power consumed by the following drive at the maximum available power supply. The device contains a program block, an extrema correction block, a servo-drive approximator, a controlled frequency generator, a power supply unit, a power sensor, a maximum determination unit, a subtraction unit, a residual value unit, a drive, an analog-to-digital converter, an adder, a frequency code register , key is a load cell sensor. The introduction of a maximum determination unit, a subtraction unit, a power value settings unit, a drive, an analog-to-digital converter, a key, and a power sensor allows achieving the set goal. 7 ill.

Description

The invention relates to automation and computer engineering and may find application in the aotomatization of production processes, in particular, multi-cycle strength tests of aircraft objects.

. The aim of the invention is to expand the scope of the device by reducing the test time while maintaining the specified accuracy of the program signal and maintaining the power (consumed by the servo drive) at ..1 the maximum level available by the power supply.

On Fig, 1 presents a block diagram of a device; figure 2 - diagram of the approximator; on Fig, 3 is a block diagram of the correction of extrema; figure 4 - diagram of the extremator; on the. Fig. B is a drive diagram: Fig. b is a timing diagram of the operation of an extremator; on Fig, 7 - timing diagrams of the drive.

The device comprises a program block 1, an extremum correction block 2, a follower of nature 3, an approximator 4, a controlled frequency generator 5, a power supply unit 6, a sensor 7 (POWER, maximum determination unit 8, a subtraction unit 9, a power value setting unit 10, drive 11, analog-to-digital converter 12, adder 13, frequency code register 14, key 15, load parameter sensor 15,

Approximator 4 (figure 2) contains a resistor matrix 17, a switch 18, a reversible pulse counter 19 ,. Shred. 2 corrections of extrema (Fig. 3) contain an extremator20, comparators 2Ti, 212, drives 22i, 222, adders 23i, 232,

The extremator (FIG. 4), the input w, nd into the correction unit 2, contains a determinant 24 of the derivative character, diodes 25i, 252., element HE 26, single-vibrators 27i, 272, b.locks 28i, 28i of sampling and storage (UVX1, UGZH2 )

The drive 11 (FIG. 5) comprises an adder 29, a pulse shaper 30i including a differentiator 302, a single-oscillator ZOz, sampling and storage units 311, 31 2, an amplifier 32,

The device operates as follows,

At the beginning of each loading stage, the frequency code register 14 sets the initial frequency through a digital adder 13 to the input of the controlled frequency generator 5. The other adder / a 13 input is reset at this moment. Block (job steps) of program 1 sets the input) of correction block 2 (extrema) to the initial extrema of this step. Since the cyclic loading function has not yet reached its first extremum, at the output of block 2 there will be extrema equal to the initial values. Thus, the inputs of the maximum and minimum of the approximator 4 will

set the initial (program) values of the extrema, and the clock input will come to egr from the generator 5 of the initial frequency. sweep frequency of the program signal, therefore, at the output of the approximator

4, an analog signal corresponding to the original (software) parameters will be generated. The operation of approximator 4 (3) is carried out as follows. The analog inputs of the approximation TOpaBxl and Bx 2 are fed from the correction unit of 2 extrema of the potential p l (pi. Corresponding to the extreme values of the cyclic function at this stage of the program. These potentials come to

tops of the resistive matrix 17, consisting of a series of series-connected resistances. The points between each of the resistances are output to the connector of the resistor matrix,

the key inputs of the switch 18 are connected to these points, and the key outputs are combined into one point, which is the output of the approximator.

The clock pulses arriving at the clock input of the approximator 4 are fed to a reversible counter 19, which changes the state of its digital output as a result of the pulses and thereby controls the sequential switching of the keys of the switch 18 from the 1st to the 5th, and then from the 1st to the 1st. Thus, a cyclic function is generated at the output of the switch 18. The period of the cyclic function depends on the frequency of the clock pulses arriving at the clock input. When moving to another program step, the analog inputs of the approximator are set to new potential values and 4 and. etc. Next drive 3 will track this

the signal coming from the output of approximator 4, If the extrema of the adjustable parameter do not correspond to program values, then the correction unit of 2 extrema, measuring these values, changes the signals at their outputs so that approximator 4 generates an output signal that compensates for the error of the next drive 3 , At the same time, the power sensor 7 measures the power consumed by the drive 3, and transmits a signal to the exit of the maximum detection unit 8, Block 8 extracts the maximum power value for a given cycle and the same value the inu passes to the input of the subtraction unit 9, which subtracts this value from the allowable value set by the set of settings 10. The resulting difference goes to (until this 0 is reset to zero via the key 15 with the signal for the sign of switching stages) drive 5 11.8 then through the analog-to-digital Converter 12 to another input of the adder 13. The code at the output of the adder 13 changes and, therefore, the frequency at the output of the generator 5 and at the output of the approximator 10 changes 4.

Depending on the sign of the accumulated difference at the output of the drive 11, the frequency of the program signal will increase or decrease. 15

In accordance with the measurement (frequency introduction, the follower drive 3 (for given amplitude signal) will change the power consumption taken from block 6. This change, measured by the sensor 7, through 20 block 8 will go to the subtraction block 9, which will determine the new difference This operation is repeated until the difference becomes equal to zero, i.e. until the power taken by drive 3 becomes equal to the maximum allowable 25 determined by block 10 ,.

Thus, at each stage of the program, not only the amplitude value of the cyclic load signal is corrected, but also the frequency change, aimed at 4 maximum permissible power take-off from the power source. The indicated 1st frequency change automatically compensates for non-deterministic changes in the efficiency of the next direct water and the stiffness of the sample, since the frequency correction loop is constructed according to the feedback principle, where the adjustable value is ultimately the set value of the initial power .

Extremator 20 included in the block; ka correction, operates as follows. The measured input signal is received simultaneously at the input; determine 45 l of the sign of the derivative and the inputs of two I / O devices. Depending on the sign of the derivative, at the output of the determinant 24 of the sign there will be either a positive or a negative potential (see Fig. 6). A positive potential through a 50 diode 25i is fed to the input of a single-shot 27, which is triggered by the trailing edge of the indicated potential signal and in a normalized time charges the UVX1 unit to the signal level Y at the moment, 55 Extreme times (see Fig. B) correspond to the trailing edges of the signals at the inputs of single vibrators 27i, 27i. UVX1 remembers the minimum of Ymin. If the derivative of the sign 24 of the sign is a derivative of a negative signal, then it is fed through the diode 25 to the input of the element HE 26. made on the operational amplifier, and then to the input of the single-vibrator 272. At the trailing edge of this signal, a single-vibrator 272 is launched, the output of which is B2 on UVX2 the next maximum of the Umax input signal is memorized. The drive 11 (Fig. 5) is designed to sum the signals that vary in time over time and operates as follows. In the initial position, UVX1 311, UVX2 312 are reset to zero.

 when a jump signal A i appears at the input of the accumulator, the latter arrives at the input of the adder 29 and the pulse shaper. At the adder, the signal is summed with the previous signal at the output of the drive and through a normally open switch K2 (UVX2) 312 is fed to the output of the storage amplifier. At the same time, the signal is input to the differentiator 30t of the pulse shaper 30. The differentiator generates a pulse signal at the output when switching from one stage to another, taking into account the sign of the change in speed. The rectifier 302 converts an alternating signal at the output of the differentiator 30i. Into an alternating sign. The final pulse signal is then normalized by the duration of the ZO3 mini-vibrator. The normalized pulse signal d closes the K2 key of UVX2, and the signal from the output of adder 2 (during the pulse (5 |) is accumulated at the output of (UVX2) 312 and is fed to the output of drive 11 through the amplifier. When the pulse i starts, the key K1 (UVX1) 31 g is open and the signal from the output of the amplifier does not accumulate at the output (UVX1) 311.

At the end of the pulse action, the key K2 (UVX2) 312 opens. The key K1 (UVXT) 311 closes and the signal accumulated at the output of the amplifier 32 is accumulated at the output (UVX1) 311. When the signal D 2 appears, a second pulse dg at the output shaper 30 pulses. The signal D2 on the adder 29 is summed with the signal Ai, and during step 1, the pulse 62UVX2 is charged by the signal Ai + A2, which is fed to the drive through amplifier 32. At the end of the action of signal 32 (UVX1) 311, it is charged by the signal A i + A 2, which is fed to the second input of the adder 29.

Thus, the output of the drive And with each step change in the input signal A; (t) a signal is generated 2) equal to the sum of the step signals 1

small arriving at its entrance. The capacitances C1 and C2 (SEC) 311 and (SEC) 312 are selected such that the delay time of the SEC is less than the duration of the action, the value of which is constant.

The drive 11 is a similar element of the system, and the knowledge of the accumulated differences at its output is determined by the sign of the potential of these differences about / relative to the zero potential of the system.

An analog-to-digital converter 12 (e.g., Ф7077 / 1) has a bipolar input, with a positive signal at the input of the converter corresponding to a direct code at the output, and a negative signal to a reverse code.

The digital adder 13 is assembled on K155IMZ digital circuits. If on his

two terms in the direct code appear, then the addition operation occurs, if one of the terms is specified in the reverse code, then the subtraction operation occurs.

(56) Testing technique. - M.: Mechanical Engineering, 1982, book 2, p. 508-510.

USSR Copyright Certificate No. G 06 G 7/26, 1979.

USSR copyright certificate N5 1120308, class O 06 G 7/26, 1983.

Electronic circuits on operational amplifiers x. - Kiev: Technique, 1983, p. 173,

Claims (1)

The claims DEVICE FOR CYCLIC SOFTWARE CONTROL, holding a frequency code register, program block connected to the information inputs of the maximum and minimum of the extrema correction unit, respectively, connected to the correction input with the output of the load parameter sensor and with the information input of the drive, and the reset input. the control output of the program block, and the outputs of the maximum and - with the inputs of the same name of the 1mztor app, connected by the clock path to the output of the controlled generator frequency, and the output - with the control input of the drive, with a blunt input of which is connected to the output of the power supply unit, different, "oo, in order to expand the scope of the device by reducing the test period of time provided that .20 accuracy and maintaining power at the maximum level, it includes a maximum determination unit, a subtraction unit 2g of power, a unit of settings for the power value, a drive, an analog-to-digital converter, a key and a power sensor connected to the input of the power supply by the input, and the output to the input of the unit determining a max30 maximum connected by the output to the first input of the subtraction unit, connected by the second input to the output of the settings block, and by the output to the drive input connected to the zeroing input with one key output; 35 and the output - with the input of an analog-to-digital converter, connected by the output to the first input of the adder, connected by the second input to the output of the frequency code register, and the output - with the input of the controlled frequency generator controlling input 0, moreover, the control input and the second output the key is associated with control, respectively. output of the program block and with zero device bus. 45 the minimum Mur "fi f y - r ,. -: A: / ll-- m. . 1 rrtii- .. - And w l / / ;,:; w B.;, -},:. (. L  0 VynodVlod (maximum reset AJw / fw - (tfus.3 eleven 12 i rr eat:. .... ,,. .: jj .., ;; . thirteen еШ (") ::; - .- :; , /,: “Vi4 I  sht . I Shhod-a - L  ..:; “Hh. i; fenciato r 3rc34 if, V t) .. H /: 1 . If c ;; -;.;.,; ::;. KifiwaMU -y , UH ..: J -... i /neywa.oi fi ;: & (g: ..;,: - lg:. , -; ; Zhu; :.;: -; th ;; Th Shod ror S. .: .., 7 .. IMuftoOdme LO-YA Y1 // 1Lf jiv . :: ii; i-l .: . 1.- :: Sh1-b: v v-v;: - V ::.;.: - fi SHLSH1  :.  i & m1585954 14 ; 4f;:; i: ||; jjf I; ; iv  {-; ф - Ji it i ;; -  , Sh shsh .- :: vi%:.-oH Vt, -p  I s; , iii.iri..uiiiiiit | r h: U GuShShShh -: - ;. I Ш1Ш - li ::;: :: l n -. § - / -,:. r -: .... - v: - -i  li- -. I Tc -. D & - | d ". t,;: t