RU115986U1 - 180 ° Coherent Signal Detector with Absolute Phase Manipulation - Google Patents

Abstract

Coherent signal detector with 180 ° absolute phase shift keying, consisting of a frequency divider by 2 times, a carrier frequency separator divided by 2 times, two frequency doublers, a 90 ° phase shifter, a time delay block, a phase detector, and the output of the frequency divider is 2 times connected to the reference input of the phase detector through a series-connected separator of the carrier frequency component divided by 2 times, the first frequency doubler, a phase shifter by 90 °, and in parallel - to its information input through a series-connected time delay unit and a second frequency doubler, characterized by that for the first time a structure of a divider of 2 times the phase and frequency of a signal with an absolute phase shift keying by 180 ° was proposed, consisting of a signal adder, a constant voltage source connected to its second input, a square root extraction unit connected to its output, and the first input of the adder is the input of the entire phase detector.

Description

The utility model (PM) relates to the field of receiving radio signals.

Known coherent signal detectors with absolute phase shift keying (PSK) at 180 °, described in sources, for example in:

1. RF patent for the invention No. 2113062. Shock reference oscillator for detecting phase-shift keyed signals / A.A. Volkov. Priority from September 28, 1994

2. Gorelov G.V., Volkov A.A., Shelukhin V.I. Channel-forming devices of railway telemechanics and communications. - M .: GOI, 2007 .-- S.224-226. By technical nature, the device closest to PM is the device described in the first source, which for this reason is taken as its prototype. The second source describes an analogue of PM.

The prototype detector consists of a series of n times connected to the reference input of the phase detector of the frequency divider, a carrier frequency oscillator isolator divided by n times, a frequency multiplier n times, a phase shifter 90 ° and connected in parallel to the output of the frequency divider of the second frequency multiplier times connected through the delay unit to the signal input of the phase detector. Such a structure of a coherent detector, starting with a frequency divider, eliminates jumps in the phase of the reference oscillation by 180 °, when units are taken as zeros and zeros as units, i.e. vice versa (reverse detector operation). To avoid reverse operation, the information and reference inputs of the detector are connected to the output of the frequency divider through the corresponding blocks. However, the structure of the frequency divider is not known, which does not allow using this stable method for stable detection of signals with absolute QPSK by 180 ° and thereby increase the noise immunity of signal reception by 2 dB compared to the most noise-resistant type of manipulation - relative QPSK by 180 ° (GPS).

The main disadvantage of the prototype PM is the inability to increase the noise immunity of signal reception by 2 dB due to the fact that the structure of the frequency divider is unknown.

The technical result of PM is to increase the noise immunity of signal reception by 2 dB due to the use of the developed structure of the signal frequency divider with absolute PSK by 1800.

The essence of PM consists in the fact that in a coherent signal detector with an absolute FMN of 180 °, consisting of a 2-fold frequency divider, a carrier frequency isolator divided by 2 times, two frequency doublers, a 90 ° phase shifter, a time delay unit, a phase detector moreover, the output of the frequency divider is 2 times connected to the reference input of the phase detector through a series-connected isolator of the component of the carrier frequency, divided by 2 times, the first frequency doubler, phase shifter 90 °, and in parallel to its information input h a time delay unit and a second frequency doubler connected in series, the structure of the signal divider 2 times the phase and frequency of the signal with absolute phase shift by 180 ° was introduced for the first time, consisting of a signal adder, a constant voltage source connected to its second input, square root block, connected to its output, and the first adder input is the input of the entire phase detector.

A significant difference between PM is the developed structure of the divider in 2 times the phase of the input signal and the connection between its elements.

PM is illustrated in the drawing.

Figure 1 presents the structural diagram of the proposed coherent detector, where indicated:

1 - signal adder;

2 - a constant voltage source;

3 - block extraction of the square root of the signal at its input;

3 - source of constant voltage;

4 - filter oscillations of the carrier frequency, divided by 2 times;

5 - block time delay;

6, 7 - signal phase doublers (quadrants);

8 - phase shifter 90 °;

9 - phase detector.

Blocks 1, 2, 3 form a divider 2 times the phase of the input signal with an absolute PSK by 180 °.

The operation of the circuit is as follows.

An input signal with an absolute QPS at 180 ° u _in (t) = Ucos [ωt + γ (t) Δφ], which does not contain a carrier frequency component, is fed to one input of the adder 1, the other input of which is supplied with a constant voltage E from block 2. Since the constant voltage E from block 2 is equal to the amplitude of the input signal U, then at the output of the adder, the oscillation is the square of the voltage with a phase divided by 2 times:

u ₁ (t) = E + Ucos [ωt + γ (t) Δφ] = U [1 + cos [ωt + γ (t) Δφ] = 2Ucos ² 0,5 [ωt + γ (t) Δφ]

The signal u ₁ (t) from block 1 enters the input of block 3 of extracting the square root, the output of which fluctuates

Given that the cosine is even and the sine are odd functions, γ (t) = ± 1 is the law of phase change by Δφ = 90 °, we have

Here, the first term is the unmodulated reference oscillation with the carrier frequency ω / 2 divided by a factor of 2, which appeared due to the division of the input signal phase by 2 times. The second term is two side frequency bands symmetrically located relative to the carrier frequency ω / 2. Filter 4 passes on its output only the first term, which is then multiplied in frequency by 2 times in quadrator 6, where it also transforms ± before the root to +:

.

From the output of block 6, the signal u ₆ (t) = 0.5Ucosωt is rotated 90 ° in phase in block 8, so that at the reference input of the phase detector 9 there is an oscillation u ₈ (t) = 0.5Usinωt.

From the output of block 3, the oscillation u ₃ (t) is simultaneously fed to the information input of the phase detector 9 through the time delay block 5 and the second doubler of phase 7, connected in series, i.e. at the information input of block 9 there will be an input signal u _in (t) with an absolute PSK of 180 °. The phase detector 9 consists of a signal multiplier and a low-pass filter at its output. The output of the multiplier block 9 oscillation

u _n9 (t) = u _in (t) u ₈ (t) = Ucos [ωt + γ (t) Δφ] Usinωt = 0.5U ² sin (γ (t) Δφ) + h

The low-pass filter of block 9 passes only the first term to its output, and since the sine is an odd function and Δφ = 90 °, then

U ₉ (t) = 0.5U ² γ (t) is the transmitted digital signal.

Note that at the output of block 3, there are 2 signs ± in front of the square root, which, in the presence of external influences (interference), can be a source of detector feedback. In order to avoid this, oscillation from the output of the phase divider is applied to the reference and information inputs by a factor of 2 via quadrators and other blocks.

The technical and economic effect of PM is to increase the noise immunity of signal reception by 2 dB due to the proposed structure of the phase divider by 2 times.

Claims (1)

A coherent signal detector with 180 ° absolute phase shift keying, consisting of a 2-fold frequency divider, a 2-fold carrier frequency isolator, two frequency doublers, a 90 ° phase shifter, a time delay unit, a phase detector, and the output of the frequency divider is 2 times connected to the reference input of the phase detector through a series-connected isolator of the component of the carrier frequency, divided by 2 times, the first frequency doubler, phase shifter 90 °, and in parallel to its information input through the serial newly connected time delay unit and second frequency doubler, characterized in that the structure of the signal and frequency divider 2 times the signal with absolute phase shift keying by 180 ° is first proposed, consisting of a signal adder, a constant voltage source connected to its second input, extraction unit square root connected to its output, and the first adder input is the input of the entire phase detector.