JP6274818B2 - Characteristic measuring device with surface acoustic wave sensor - Google Patents

Description

  The present invention relates to a characteristic measuring apparatus that measures a characteristic of an object, and more particularly, to a characteristic measuring apparatus that includes a surface acoustic wave (SAW) sensor.

  A surface acoustic wave sensor is a sensor in which an interdigital transducer (IDT) electrode and a surface acoustic wave element are arranged on a piezoelectric substrate such as quartz, and includes, for example, liquid concentration, viscosity, conductivity, dielectric It is used to measure characteristics such as rate (see, for example, Patent Document 1). In other words, the liquid that is the object is dropped on the surface acoustic wave sensor, the input signal is input to the surface acoustic wave sensor, and the amplitude and phase of the output signal from the surface acoustic wave sensor are detected, so that the characteristics of the liquid can be improved. taking measurement.

  Specifically, for example, as shown in FIG. 6, the digital circuit 120 and the analog circuit 130 are provided, and the output signal from the oscillator 140, which is the source oscillation of the entire apparatus, is used as a clock source in the digital circuit 120. The circuit 130 is used as a reference signal for the PLL circuit (phase synchronization circuit) 131. The PLL circuit 131 is an oscillator that generates and outputs a local carrier signal used for modulation / demodulation of transmission / reception in the analog circuit 130. That is, it is composed of a phase comparator and a voltage controlled oscillator, and is used as an oscillation circuit for a high-frequency signal using a stable signal having a low frequency as a reference signal. Here, a case where a signal having a local frequency of 261.5 MHz is output will be described. The local carrier signal from the PLL circuit 131 is input to the quadrature modulator 134 and the mixer circuit (mixer) 137.

  On the other hand, a baseband unit (10 MHz CW Baseband Signal) 121 of the digital circuit 120 is a binary (I value) of a 10 MHz complex baseband signal based on a 10 MHz complex carrier signal generated by an NCO (Numerically Controlled Oscillator) 122. And Q value). Only the 10 MHz signal, which is the fundamental wave, is passed through each of the output signals by the first LPF (low-pass filter) 132 and the second LPF 133 of the analog circuit 130, and the 10 MHz sine wave and the cosine wave are orthogonal to each other. It is input to the modulator 134.

  The quadrature modulator 134 multiplies the complex baseband signal of 10 MHz by the local carrier signal, that is, changes the baseband signal to a frequency of 251.5 MHz by the difference between the two. The output signal from the quadrature modulator 134 is amplified by the power amplifier 135 and input to the SAW sensor 150. The SAW sensor 150 is a SAW filter as a device, and is configured and designed to pass only a signal in the vicinity of 251.5 MHz. Therefore, by combining with a narrow band inspection signal as a sensor, noise in a frequency band other than the inspection signal can be suppressed, and a high SN ratio (signal noise ratio) can be obtained.

  The output signal from the SAW sensor 150 is amplified by the LNA 136 and then input to the mixer circuit 137. The mixer circuit 137 multiplies the 261.5 MHz local carrier signal from the PLL circuit 131 by the 251.5 MHz signal from the LNA 136, that is, depending on the difference between the 10 MHz baseband signal and the harmonic component. Divide into Thus, in order to generate the 251.5 MHz signal that is the inspection signal of the SAW sensor 150 and the 10 MHz signal that is the baseband signal in the digital circuit 120, the PLL circuit 131 generates the 261.5 MHz local carrier signal. It is generated or multiplied by the mixer circuit 137.

  Subsequently, after the harmonic component is removed by the third LPF 138, it is input to the A / D converter 139 for conversion into a digital signal. The sample rate of the A / D converter 139 is normally required to be at least twice the frequency of the input signal according to the Nyquist sampling theorem. That is, when the input signal is 10 MHz, a high sample rate of 20 MHz or higher is required. The inspection signal converted into a digital signal by the A / D converter 139 is multiplied by the 10 MHz complex carrier signal generated by the NCO 122 by the multiplication circuits 123 and 124 of the digital circuit 120, and includes amplitude information and phase information. It is decomposed into DC components and harmonic components. Subsequently, the harmonic component is removed by the fourth LPF 125 and the fifth LPF 126 to extract the DC component.

  Here, each data (DC component) contains noise, and a sufficient amount of data is stored and saved in the RAM 127 in order to satisfy the required accuracy. Thereafter, the upper control unit (CPU) 160 collects data stored in the RAM 127 and performs an averaging process, and calculates and acquires the amplitude and phase of the inspection signal that has passed through the SAW sensor 150. Then, the amplitude and phase of the acquired inspection signal are converted into density and other various information according to the type of the SAW sensor 150.

JP 2010-181178 A

  By the way, when a characteristic measuring apparatus is commercialized as a battery-driven portable type, it is required to reduce the circuit scale to reduce power consumption, size, and price. However, in the characteristic measuring apparatus as described above, the A / D converter 139 having a high sample rate (20 MHz or higher), the quadrature modulator 134 in the analog circuit 130, the mixer circuit 137, and the digital circuit 120 are used. An NCO 122, multiplication circuits 123 and 124, a RAM 127, and the like are required. For this reason, it is difficult to reduce power consumption, size and price.

  Accordingly, an object of the present invention is to provide a characteristic measuring apparatus including a surface acoustic wave sensor that can reduce power consumption and size.

In order to achieve the above object, the invention according to claim 1 is characterized in that an input signal generating means for inputting an input signal of a predetermined frequency to the surface acoustic wave sensor, and the predetermined frequency output from the surface acoustic wave sensor A conversion means for undersampling the output signal to convert it to a digital signal at a predetermined sample rate, a digital signal output from the conversion means based on the phase, and a positive in- phase component signal according to the predetermined sample rate , A quadrature detection unit that divides the signal into a positive quadrature component signal , a negative in-phase component signal, and a negative quadrature component signal, and integrates the in-phase component signal and the cross-component signal for a predetermined time, respectively, The frequency and the predetermined sample rate are:
Positive integer x predetermined sample rate + predetermined sample rate ÷ 4
= A characteristic measuring device having a surface acoustic wave sensor characterized by having a relationship of a predetermined frequency.

According to the present invention, when an input signal having a predetermined frequency is input to the surface acoustic wave sensor by the input signal generating means, an output signal having a predetermined frequency is output from the surface acoustic wave sensor. This output signal is undersampled by the conversion means and converted into a digital signal at a predetermined sample rate. That is, digital conversion is performed at a sample rate lower than the frequency of the output signal from the surface acoustic wave sensor. Subsequently, the converted digital signal is detected by the quadrature detection means based on the phase thereof, in accordance with a predetermined sample rate, a positive in- phase component signal, a positive quadrature component signal , a negative in-phase component signal, and a negative quadrature component. The in-phase component signal and the quadrature component signal are each integrated for a predetermined time. Based on the in-phase component signal and the quadrature component signal for a predetermined time, the amplitude and phase of the output signal from the surface acoustic wave sensor are calculated and acquired.

  According to the first aspect of the present invention, since the output signal from the surface acoustic wave sensor is undersampled and converted into a digital signal, the conversion means can be configured with an A / D converter having a low sample rate. In addition, the amplitude and phase of the output signal from the surface acoustic wave sensor can be acquired without a mixer circuit, quadrature modulator, NCO, multiplier circuit, etc., which simplifies the configuration and reduces power consumption. It is possible to reduce the size and the price. In addition, since the signal frequency for the surface acoustic wave sensor and the sample rate of the conversion means only need to satisfy a predetermined relational expression, the degree of freedom in selection between the frequency and the sample rate is high, and the degree of freedom in design can be increased. .

1 is a configuration block diagram showing a characteristic measuring apparatus including a surface acoustic wave sensor according to an embodiment of the present invention. It is an image figure which shows the undersampling in the characteristic measuring apparatus of FIG. FIG. 2 is a block diagram of a quadrature detection circuit in the characteristic measurement apparatus of FIG. 1. It is a figure which shows the calculation result (truth value) by the quadrature detection circuit of FIG. 3, (a) shows I value, (b) shows Q value. It is a block diagram of the other quadrature detection circuit in the characteristic measuring apparatus of FIG. It is a block diagram which shows the characteristic measuring apparatus provided with the conventional surface acoustic wave sensor.

  The present invention will be described below based on the illustrated embodiments.

  FIG. 1 is a block diagram showing a characteristic measuring apparatus (hereinafter referred to as “characteristic measuring apparatus”) 1 provided with a surface acoustic wave sensor according to an embodiment of the present invention. The characteristic measuring apparatus 1 is an apparatus for measuring characteristics of a measurement object, for example, liquid concentration, viscosity, conductivity, dielectric constant, etc., and mainly includes an oscillator 2, an analog circuit 3, and a SAW sensor. (Surface acoustic wave sensor) 4, a digital circuit 5, and a host control unit (CPU) 6.

  The oscillator 2 is a source oscillation of the entire characteristic measuring apparatus 1, and its output signal is input as a reference signal to the PLL circuit (phase synchronization circuit) 31 of the analog circuit 3 and used as a clock source of the digital circuit 5. The Here, since the oscillator 2 is required to have high accuracy, a crystal oscillator is desirable.

  The analog circuit 3 includes a PLL circuit (input signal generation means) 31, a power amplifier 32, an LNA (low noise amplifier) 33, a BPF (bandpass filter) 34, an A / D converter (conversion means) 35, It has.

  The PLL circuit 31 is a circuit that generates an inspection signal (input signal) having a predetermined frequency and inputs it to the SAW sensor 4. That is, it is composed of a phase comparator and a voltage-controlled oscillator, functions as a high-frequency signal oscillation circuit using a low-frequency stable signal input from the oscillator 2 as a reference signal, and an inspection signal (RF signal) of a predetermined frequency In this embodiment, a test signal of 250 MHz is generated. This inspection signal is input to the power amplifier 32, amplified by the power amplifier 32, and input to the SAW sensor 4.

  In this embodiment, the SAW sensor 4 is a SAW filter as a device, and is configured and designed to pass only a signal in the vicinity of 250 MHz. Therefore, by combining with a narrow band inspection signal as a sensor, noise in a frequency band other than the inspection signal can be suppressed, and a high SN ratio (signal noise ratio) can be obtained. Such an input signal, which is an inspection signal input to the SAW sensor 4, and an output signal, which is an inspection signal output from the SAW sensor 4, have the same frequency, but are dropped on the SAW sensor 4. Depending on the characteristics of the object, the amplitude and phase differ (change) or delay occurs. Here, the SAW sensor 4 may not be a SAW filter, but may be any sensor / characteristic that can be converted into the amplitude, phase, or delay of an electrical signal. In addition, a reference channel (path for passing the inspection signal from the power amplifier 32 to the LNA 33) is provided in parallel with the SAW sensor 4, and the inspection signal is allowed to pass through the SAW sensor 4 or not by switching the switch. Thus, the characteristics of the measurement object may be measured (comparative measurement).

  The inspection signal that has passed through the SAW sensor 4 is input to the LNA 33 as an output signal having a predetermined frequency, that is, as an inspection signal of 250 MHz, and is amplified by the LNA 33 and then input to the BPF 34. The BPF 34 is a filter that passes a signal in a predetermined frequency band, and improves the SN ratio by passing only a signal in the vicinity of 250 MHz. Therefore, the BPF 34 may not be provided when the predetermined SN ratio is satisfied. The inspection signal that has passed through the BPF 34 is input to the A / D converter 35.

The A / D converter 35 is an analog-digital converter that undersamples the 250 MHz inspection signal output from the SAW sensor 4 and converts it into a digital signal at a predetermined sample rate. Here, the frequency of the inspection signal and the sample rate of the A / D converter 35 need to satisfy the following relational expression K.
F = N × SR + SR ÷ 4 or SR = F ÷ (N + 0.25)
N: positive integer SR: sample rate F: frequency of inspection signal

  In this embodiment, the case where the sample rate (SR) is 8 MHz and the positive integer (N) is 31 will be described below. That is, as shown in FIG. 2, the 250 MHz inspection signal is undersampled to 1/31 and converted to a digital signal of 2 MHz (= 8 MHz × 4) at a sample rate of 8 MHz. Here, if the above relational expression K is satisfied, the sample rate may not be 8 MHz, and the frequency of the inspection signal may not be 250 MHz. That is, the sample rate and the frequency of the inspection signal may be determined so as to satisfy the above relational expression K.

  In the above relational expression K, “SR ÷ 4” is included so as to satisfy the relationship that the frequency of the inspection signal is larger (deviation) by 1/4 of the sample rate than the integer multiple of the sample rate. This is because the inspection signal is orthogonally modulated as described later. That is, one wavelength is sampled four times so as to be divided into an in-phase component signal (I value) and a quadrature component signal (Q value). In this embodiment, one wavelength is 2 MHz and a quarter wavelength (one quadrant, 90 °) is 8 MHz, and an in-phase component signal and a quadrature component signal are acquired and calculated every 8 MHz. .

  Here, the undersampling will be briefly described. First, when sampling is performed, higher frequency components overlap at a sample rate interval. In other words, when sampling is performed at the sampling rate of the frequency fs, the frequency before the A / D conversion is output as it is for an input signal having a frequency of 1/2 fs or less, but for an input signal having a frequency higher than 1/2 fs, the A / D conversion is performed. When D conversion is performed, the frequency is converted to a frequency lower than the input signal. Such a phenomenon is called aliasing. For this reason, normally, sampling is performed at a frequency that is twice or more the desired frequency signal, and further, noise, interference waves, and the like are previously removed with an LPF or the like so as not to superimpose noise at higher frequencies. Undersampling, on the other hand, does not remove the desired wave that exists in the high-frequency region, but dares to sample at a low frequency sample rate (thinning and sampling), and obtain the desired wave using superposition. This is a technique for lowering the sample rate of an A / D converter or digital signal processing. That is, by using aliasing, an input signal having a predetermined frequency with a high frequency is sampled at a sample rate with a predetermined frequency fs having a low frequency, thereby converting the frequency of the input signal into the frequency fs of the sunplate. Therefore, by appropriately selecting the frequency fs of the sunplate, frequency conversion can be performed simultaneously with sampling (digital conversion) without performing frequency conversion externally. Also, frequency information is lost due to undersampling, but amplitude information and phase information are maintained.

  In addition, the analog driver (amplifier) band built in the A / D converter 35 can input a test signal, which is a high-frequency signal, without distortion or with low distortion according to the required accuracy.

  The digital circuit 5 is a circuit that digitally processes a test signal from the analog circuit 3 and includes a 2-bit counter 51 and a quadrature detection circuit (orthogonal detection means) 7. The 2-bit counter 51 counts at a predetermined sample rate, that is, every 8 MHz, and controls signals (count values) “0”, “1”, “2”, “3”, “0”, “1”. Is a counter that repeatedly outputs.

  The quadrature detection circuit 7 divides the digital signal output from the A / D converter 35 into an in-phase component signal and a quadrature component signal according to a predetermined sample rate, and each of the in-phase component signal and the quadrature component signal for a predetermined time. It is a circuit to integrate. Specifically, in this embodiment, as shown in FIG. 3, a first logic circuit 71, a second logic circuit 72, a first flip-flop 73, and a second flip-flop 74 are provided. I have.

  The first logic circuit 71 is a logic circuit that integrates the in-phase component signal of the inspection signal output from the A / D converter 35 and converted into a digital signal according to a control signal of the 2-bit counter 51 for a predetermined time. That is, the digital signal (output signal) ADO from the A / D converter 35 and the I value stored and accumulated in the first flip-flop 73 are input, and as shown in FIG. In the case of “0” (0 °), the digital signal ADO is added to the I value of the first flip-flop 73 and output to the first flip-flop 73. When the control signal is “1” (90 °), the I value of the first flip-flop 73 is output as it is to the first flip-flop 73, and the control signal is “2” (180 °). The digital signal ADO is divided from the I value of the first flip-flop 73 and output to the first flip-flop 73. When the control signal is “3” (270 °), the first flip-flop The I value of the group 73 is output to the first flip-flop 73 as it is.

  Similarly, the second logic circuit 72 integrates a quadrature component signal of the inspection signal output from the A / D converter 35 and converted into a digital signal in accordance with a control signal of the 2-bit counter 51 for a predetermined time. It is. That is, the digital signal (output signal) ADO from the A / D converter 35 and the Q value stored and accumulated in the second flip-flop 74 are input, and as shown in FIG. In the case of “0” (0 °), the Q value of the second flip-flop 74 is output to the second flip-flop 74 as it is. When the control signal is “1” (90 °), the digital signal ADO is added to the Q value of the second flip-flop 74 and output to the second flip-flop 74, and the control signal is “2”. ”(180 °), the Q value of the second flip-flop 74 is output to the second flip-flop 74 as it is, and when the control signal is“ 3 ”(270 °), the second flip-flop 74 The digital signal ADO is divided from the Q value of the group 74 and output to the second flip-flop 74.

  Thus, when the control signal is “0” (0 °) according to the control signal (control timing) every 8 MHz that is the sample rate, the digital signal ADO is divided into “+” in-phase component signals, and the control signal Is “1” (90 °), the digital signal ADO is divided into “+” orthogonal component signals, and when the control signal is “2” (180 °), the digital signal ADO is “−”. When the control signal is “3” (270 °) when the control signal is “3” (270 °), the digital signal ADO is divided into “−” quadrature component signals, and the in-phase component signals and the quadrature component signals are respectively integrated for a predetermined time. , To accumulate.

  The first flip-flop 73 and the second flip-flop 74 are logic circuits / registers configured by a plurality of bits and holding and storing data (1, 0). The output value from the logic circuit 71 is stored, and the second flip-flop 74 stores the output value from the second logic circuit 72. In both of these flip-flops 73 and 74, only DC components and complex numbers (direct current components of Fourier transform) including amplitude information and phase information are stored and accumulated, and noise and interference components are suppressed. Yes. Further, if the integration time, that is, the number of bits of both flip-flops 73 and 74 is increased, the SN ratio deteriorated by undersampling can be improved, and the noise contained in each digital signal (sample) is suppressed to satisfy the required accuracy. It is set to the optimal time.

  The I and Q values stored and accumulated in both flip-flops 73 and 74 are input to the upper control unit 6 and cleared to zero when the integration time is reached. That is, integration and dump (Integrate and Dump) are repeated for each integration time. Here, since the output values of the flip-flops 73 and 74 have already been averaged, the transfer of the output value (measurement result) to the upper control unit 6 may be performed at a relatively low rate.

  The host control unit 6 calculates the amplitude and phase of the inspection signal output from the SAW sensor 4 based on the I value and Q value output from both flip-flops 73 and 74, and measures the characteristics of the measurement object. It is an arithmetic processing unit. That is, the amplitude and phase of the inspection signal passing through the SAW sensor 4 are converted into density and other information according to the type of the SAW sensor 4. Here, the host control unit 6 only needs to play the role of such host control, and may be configured by a smartphone (multifunctional mobile phone) or a personal computer. Further, it may be implemented in the digital circuit 5 as hardware.

  Next, the operation and characteristic measurement method of the characteristic measurement apparatus 1 having such a configuration will be described. Here, it is assumed that a measurement object is dropped on the SAW sensor 4 and the SAW sensor 4 is exposed to the measurement object.

  First, a test signal of 250 MHz is generated by the PLL circuit 31 of the analog circuit 3, amplified by the power amplifier 32, and input to the SAW sensor 4. Next, the inspection signal that has passed through the SAW sensor 4 and whose amplitude or phase has changed is power amplified by the LNA 33, and only a signal in the vicinity of 250 MHz is input to the A / D converter 35 by the BPF 34. Subsequently, the 250 MHz inspection signal is undersampled to 1/31 by the A / D converter 35 and converted into a digital signal at a sample rate of 8 MHz.

  On the other hand, the digital signal counted by the 2-bit counter 51 of the digital circuit 5 every 8 MHz and output from the A / D converter 35 according to the control signal (count value) is orthogonal to the in-phase component signal by the quadrature detection circuit 7. It is divided into component signals and each is integrated for a predetermined time. That is, as described above, when the control signal is “0” (0 °), the digital signal ADO is added to the I value of the first flip-flop 73, and the control signal is “1” (90 °). In this case, the digital signal ADO is added to the Q value of the second flip-flop 74, and when the control signal is “2” (180 °), the digital signal ADO is calculated from the I value of the first flip-flop 73. When division is performed and the control signal is “3” (270 °), the calculation process of dividing the digital signal ADO from the Q value of the second flip-flop 74 is repeated for a predetermined integration time.

  Thereafter, the integrated I value and Q value are input to the host controller 6, and the host controller 6 calculates the amplitude and phase of the inspection signal output from the SAW sensor 4 based on the I value and the Q value. As a result, the characteristics of the measurement object are measured.

  As described above, according to the characteristic measuring apparatus 1 having such a configuration, the A / D converter converts the 250 MHz inspection signal output from the SAW sensor 4 into a digital signal by undersampling it to 1/31. The sample rate of 35 can be as low as 8 MHz. Further, since digital conversion and frequency conversion can be performed simultaneously by the A / D converter 35, it is not necessary to provide a frequency converter separately.

  Further, the conventional mixer circuit becomes unnecessary due to undersampling, and the output signal of the PLL circuit 31 is input to the SAW sensor 4 as it is as an inspection signal, so that a conventional quadrature modulator is also unnecessary. The elimination of the mixer circuit and the quadrature modulator in this way is a characteristic effect of the present characteristic measuring apparatus 1 that extracts information as a sensor from the amplitude and / or phase of a single carrier signal. Further, when undersampling is performed, the frequency F of the inspection signal and the sample rate SR satisfy the above relational expression K (the baseband signal frequency (2 MHz) of the digital circuit 5 is set to 1 of the sample rate SR (8 MHz)). / 4), the conventional NCO and multiplier are not required, and the quadrature detection circuit 7 having the simple configuration as described above can be used, and is equivalent to the case where the NCO or multiplier is used. Calculation accuracy can be obtained, and the amplitude and phase of the inspection signal from the SAW sensor 4 can be appropriately acquired. In this way, the configuration of the characteristic measuring apparatus 1 is simplified, and low power consumption, size reduction, and price reduction are possible.

  In addition, since the frequency F of the inspection signal for the SAW sensor 4 and the sample rate SR of the A / D converter 35 need only satisfy the above relational expression K, the degree of freedom in selecting the frequency F and the sample rate SR is high. , Can increase the degree of design freedom. Therefore, it can be applied to various SAW sensors 4 and measurement objects.

  Although the embodiment of the present invention has been described above, the specific configuration is not limited to the above embodiment, and even if there is a design change or the like without departing from the gist of the present invention, Included in the invention. For example, in the above embodiment, the I value and the Q value are integrated for a predetermined time in the quadrature detection circuit 7 and then input to the upper control unit 6, but the I value and the Q value are input to the upper control unit for each sample rate. 6 may be entered. That is, as shown in FIG. 5, logic circuits 75 and 76 equivalent to multiplication and integrators (or LPFs) 77 and 78 are separated, and first-order IIR (Infinite Impulse Response) and infinite impulse response are used as the integrators 77 and 78. ) Continuous integration using a digital filter. Each time the output value (I value) from the first logic circuit 75 is input to the first integrator 77, the I value in the first integrator 77 is input to the upper control unit 6, and Each time an output value (Q value) from the second logic circuit 76 is input to the second integrator 78, the Q value in the second integrator 78 is input to the upper control unit 6. As a result, the integral value can be output in real time, and not only the characteristics are measured by the SAW sensor 4, but also a device suitable as a high-speed control device can be achieved.

DESCRIPTION OF SYMBOLS 1 Characteristic measuring apparatus provided with surface acoustic wave sensor 2 Oscillator 3 Analog circuit 31 PLL circuit (input signal generation means)
35 A / D converter (conversion means)
4 SAW sensor (surface acoustic wave sensor)
5 Digital circuit 51 2-bit counter 6 Host control unit (CPU)
7 Quadrature detection circuit (orthogonal detection means)

Claims (1)

An input signal generating means for inputting an input signal having a predetermined frequency to the surface acoustic wave sensor;
A conversion means for undersampling the output signal of the predetermined frequency output from the surface acoustic wave sensor and converting it to a digital signal at a predetermined sample rate;
The digital signal output from the conversion means is divided into a positive in- phase component signal, a positive quadrature component signal , a negative in-phase component signal, and a negative quadrature component signal according to the predetermined sample rate based on the phase , Quadrature detection means for integrating each of the in-phase component signal and the quadrature component signal for a predetermined time;
With
The predetermined frequency and the predetermined sample rate are:
Positive integer x predetermined sample rate + predetermined sample rate ÷ 4
A characteristic measuring device having a surface acoustic wave sensor characterized by having a predetermined frequency relationship.