PT91534A - Processo e circuito para o desfasamento de um sinal - Google Patents

Processo e circuito para o desfasamento de um sinal

Info

Publication number
PT91534A
PT91534A PT91534A PT9153489A PT91534A PT 91534 A PT91534 A PT 91534A PT 91534 A PT91534 A PT 91534A PT 9153489 A PT9153489 A PT 9153489A PT 91534 A PT91534 A PT 91534A
Authority
PT
Portugal
Prior art keywords
disassembly
circuit
signal
Prior art date
Application number
PT91534A
Other languages
English (en)
Other versions
PT91534B (pt
Inventor
Josef Sperlich
Heinz Thier
Original Assignee
Ant Nachrichtentech
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ant Nachrichtentech filed Critical Ant Nachrichtentech
Publication of PT91534A publication Critical patent/PT91534A/pt
Publication of PT91534B publication Critical patent/PT91534B/pt

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/16—Networks for phase shifting
    • H03H11/20—Two-port phase shifters providing an adjustable phase shift
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019—Variable delay
    • H03K2005/00026—Variable delay controlled by an analog electrical signal, e.g. obtained after conversion by a D/A converter
    • H03K2005/00052—Variable delay controlled by an analog electrical signal, e.g. obtained after conversion by a D/A converter by mixing the outputs of fixed delayed signals with each other or with the input signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015—Layout of the delay element
    • H03K2005/00234—Layout of the delay element using circuits having two logic levels
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00286—Phase shifter, i.e. the delay between the output and input pulse is dependent on the frequency, and such that a phase difference is obtained independent of the frequency
PT91534A 1988-08-25 1989-08-24 Processo e circuito para o desfasamento de um sinal PT91534B (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE3828840A DE3828840A1 (de) 1988-08-25 1988-08-25 Verfahren und schaltungsanordnung zur phasenverschiebung

Publications (2)

Publication Number Publication Date
PT91534A true PT91534A (pt) 1990-03-08
PT91534B PT91534B (pt) 1995-07-06

Family

ID=6361574

Family Applications (1)

Application Number Title Priority Date Filing Date
PT91534A PT91534B (pt) 1988-08-25 1989-08-24 Processo e circuito para o desfasamento de um sinal

Country Status (7)

Country Link
EP (1) EP0355329B1 (pt)
DE (2) DE3828840A1 (pt)
DK (1) DK417589A (pt)
ES (1) ES2034520T3 (pt)
FI (1) FI893975A (pt)
NO (1) NO174409B (pt)
PT (1) PT91534B (pt)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19506543C1 (de) * 1995-02-24 1996-05-09 Siemens Ag Takterzeugungsschaltung
EP1560333A3 (en) * 2004-02-02 2007-06-20 Synthesys Research, Inc. A method and apparatus for generating variable delay

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2089609A (en) * 1980-12-12 1982-06-23 Philips Electronic Associated Clock pulse phase shifter
US4811254A (en) * 1985-12-17 1989-03-07 Nippon Gakki Seizo Kabushiki Kaisha Displacement detector for an encoder
JPS62281506A (ja) * 1986-05-29 1987-12-07 Victor Co Of Japan Ltd 可変移相回路

Also Published As

Publication number Publication date
DE3828840C2 (pt) 1991-07-04
FI893975A0 (fi) 1989-08-24
NO893417D0 (no) 1989-08-24
DE58902197D1 (de) 1992-10-08
EP0355329A3 (en) 1990-08-22
FI893975A (fi) 1990-02-26
DK417589D0 (da) 1989-08-24
EP0355329B1 (de) 1992-09-02
DE3828840A1 (de) 1990-03-08
NO174409B (no) 1994-01-17
PT91534B (pt) 1995-07-06
EP0355329A2 (de) 1990-02-28
ES2034520T3 (es) 1993-04-01
NO893417L (no) 1990-02-26
DK417589A (da) 1990-02-26

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Legal Events

Date Code Title Description
MM3A Annulment or lapse

Free format text: LAPSE DUE TO NON-PAYMENT OF FEES

Effective date: 19960831