PL445432A1 - Sposób modyfikacji podłoża z monokrystalicznego SiC, zmodyfikowane podłoże, urządzenie zawierające takie podłoże i zastosowanie takiego urządzenia - Google Patents

Sposób modyfikacji podłoża z monokrystalicznego SiC, zmodyfikowane podłoże, urządzenie zawierające takie podłoże i zastosowanie takiego urządzenia

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Publication number
PL445432A1
PL445432A1 PL445432A PL44543223A PL445432A1 PL 445432 A1 PL445432 A1 PL 445432A1 PL 445432 A PL445432 A PL 445432A PL 44543223 A PL44543223 A PL 44543223A PL 445432 A1 PL445432 A1 PL 445432A1
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PL
Poland
Prior art keywords
substrate
modifying
modified
monocrystalline sic
sic substrate
Prior art date
Application number
PL445432A
Other languages
English (en)
Inventor
Tymoteusz Ciuk
Roman Kozłowski
Agata Romanowska
Karolina Piętka-Jurczak
Beata Stańczyk
Krystyna Przyborowska
Artur Dobrowolski
Jakub Jagiełło
Dariusz Czołak
Paweł Kamiński
Original Assignee
Sieć Badawcza Łukasiewicz - Instytut Mikroelektroniki I Fotoniki
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Sieć Badawcza Łukasiewicz - Instytut Mikroelektroniki I Fotoniki filed Critical Sieć Badawcza Łukasiewicz - Instytut Mikroelektroniki I Fotoniki
Priority to PL445432A priority Critical patent/PL445432A1/pl
Publication of PL445432A1 publication Critical patent/PL445432A1/pl

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02167—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02293—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process formation of epitaxial layers by a deposition process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Organic Chemistry (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Hall/Mr Elements (AREA)

Abstract

Niniejsze zgłoszenie ujawnia sposób modyfikacji podłoża z monokrystalicznego SiC, w którym strona krzemowa SiC jest poddawana implantacji przez bombardowanie jonowe dawką jonów wodoru H+ lub helu He+. Niniejsze rozwiązanie dotyczy również zmodyfikowanego podłoża z monokrystalicznego SiC otrzymanego takim sposobem, jak również urządzenia zawierającego takie podłoże, w szczególności czujnika efektu Halla, oraz zastosowania takiego urządzenia w wysokotemperaturowej detekcji pola magnetycznego.
PL445432A 2023-06-30 2023-06-30 Sposób modyfikacji podłoża z monokrystalicznego SiC, zmodyfikowane podłoże, urządzenie zawierające takie podłoże i zastosowanie takiego urządzenia PL445432A1 (pl)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PL445432A PL445432A1 (pl) 2023-06-30 2023-06-30 Sposób modyfikacji podłoża z monokrystalicznego SiC, zmodyfikowane podłoże, urządzenie zawierające takie podłoże i zastosowanie takiego urządzenia

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PL445432A PL445432A1 (pl) 2023-06-30 2023-06-30 Sposób modyfikacji podłoża z monokrystalicznego SiC, zmodyfikowane podłoże, urządzenie zawierające takie podłoże i zastosowanie takiego urządzenia

Publications (1)

Publication Number Publication Date
PL445432A1 true PL445432A1 (pl) 2025-01-07

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Family Applications (1)

Application Number Title Priority Date Filing Date
PL445432A PL445432A1 (pl) 2023-06-30 2023-06-30 Sposób modyfikacji podłoża z monokrystalicznego SiC, zmodyfikowane podłoże, urządzenie zawierające takie podłoże i zastosowanie takiego urządzenia

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PL (1) PL445432A1 (pl)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5318915A (en) * 1993-01-25 1994-06-07 North Carolina State University At Raleigh Method for forming a p-n junction in silicon carbide
EP1816672A1 (de) * 2006-02-02 2007-08-08 Siltronic AG Halbleiterschichtstruktur und Verfahren zur Herstellung einer Halbleiterschichtstruktur
US20140187020A1 (en) * 2012-12-28 2014-07-03 Sunedison, Inc. Method for low temperature layer transfer in the preparation of multilayer semicondutor devices

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5318915A (en) * 1993-01-25 1994-06-07 North Carolina State University At Raleigh Method for forming a p-n junction in silicon carbide
EP1816672A1 (de) * 2006-02-02 2007-08-08 Siltronic AG Halbleiterschichtstruktur und Verfahren zur Herstellung einer Halbleiterschichtstruktur
US20140187020A1 (en) * 2012-12-28 2014-07-03 Sunedison, Inc. Method for low temperature layer transfer in the preparation of multilayer semicondutor devices

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