PL3869350T3 - Pakietowanie oparte na jednostkach flit - Google Patents
Pakietowanie oparte na jednostkach flitInfo
- Publication number
- PL3869350T3 PL3869350T3 PL21168276.0T PL21168276T PL3869350T3 PL 3869350 T3 PL3869350 T3 PL 3869350T3 PL 21168276 T PL21168276 T PL 21168276T PL 3869350 T3 PL3869350 T3 PL 3869350T3
- Authority
- PL
- Poland
- Prior art keywords
- flit
- based packetization
- packetization
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Quality & Reliability (AREA)
- Communication Control (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201962812507P | 2019-03-01 | 2019-03-01 | |
| US16/439,582 US10997111B2 (en) | 2019-03-01 | 2019-06-12 | Flit-based packetization |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| PL3869350T3 true PL3869350T3 (pl) | 2025-06-23 |
Family
ID=67985184
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PL21168276.0T PL3869350T3 (pl) | 2019-03-01 | 2020-01-27 | Pakietowanie oparte na jednostkach flit |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US10997111B2 (pl) |
| EP (2) | EP3869350B1 (pl) |
| CN (1) | CN111638992A (pl) |
| PL (1) | PL3869350T3 (pl) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10784986B2 (en) | 2017-02-28 | 2020-09-22 | Intel Corporation | Forward error correction mechanism for peripheral component interconnect-express (PCI-e) |
| US10771189B2 (en) | 2018-12-18 | 2020-09-08 | Intel Corporation | Forward error correction mechanism for data transmission across multi-lane links |
| US11637657B2 (en) | 2019-02-15 | 2023-04-25 | Intel Corporation | Low-latency forward error correction for high-speed serial links |
| US11249837B2 (en) | 2019-03-01 | 2022-02-15 | Intel Corporation | Flit-based parallel-forward error correction and parity |
| US11296994B2 (en) | 2019-05-13 | 2022-04-05 | Intel Corporation | Ordered sets for high-speed interconnects |
| US11740958B2 (en) | 2019-11-27 | 2023-08-29 | Intel Corporation | Multi-protocol support on common physical layer |
| US11520517B2 (en) * | 2020-02-28 | 2022-12-06 | Micron Technology, Inc. | Data logging sub-system for memory sub-system controller |
| US12189470B2 (en) | 2020-09-18 | 2025-01-07 | Intel Corporation | Forward error correction and cyclic redundancy check mechanisms for latency-critical coherency and memory interconnects |
| US11481270B1 (en) * | 2021-06-16 | 2022-10-25 | Ampere Computing Llc | Method and system for sequencing data checks in a packet |
| JP2025505328A (ja) * | 2022-01-27 | 2025-02-26 | インテル・コーポレーション | ダイツーダイインターコネクトを拡張するリタイマ |
| CN114826995A (zh) * | 2022-04-22 | 2022-07-29 | 电子科技大学 | 一种基于UVM的支持PCIe的千兆以太网芯片的验证平台 |
| JP7642696B2 (ja) * | 2023-03-20 | 2025-03-10 | アンリツ株式会社 | 誤り率測定装置及び誤り率測定方法 |
| JP7642695B2 (ja) * | 2023-03-20 | 2025-03-10 | アンリツ株式会社 | 誤り率測定装置及び誤り率測定方法 |
| US12381579B2 (en) * | 2023-03-20 | 2025-08-05 | Anritsu Corporation | Error rate measurement apparatus and error rate measurement method |
| CN116483288A (zh) * | 2023-06-21 | 2023-07-25 | 苏州浪潮智能科技有限公司 | 内存控制设备、方法、装置以及服务器内存模组 |
Family Cites Families (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100375393C (zh) | 1998-04-27 | 2008-03-12 | 松下电器产业株式会社 | 卷积交错装置、方法、卷积解交错装置、方法 |
| US6400728B1 (en) | 1998-09-09 | 2002-06-04 | Vlsi Technology, Inc. | Method and system for detecting user data types in digital communications channels and optimizing encoding-error correction in response thereto |
| US7047437B2 (en) * | 2001-12-12 | 2006-05-16 | Hewlett-Packard Development Company, L.P. | Method and system for detecting dropped micro-packets |
| US7970279B2 (en) * | 2002-11-05 | 2011-06-28 | Lightfleet Corporation | N-way serial-channel interconnect |
| US7272310B2 (en) | 2003-06-24 | 2007-09-18 | Intel Corporation | Generic multi-protocol label switching (GMPLS)-based label space architecture for optical switched networks |
| US20050063701A1 (en) | 2003-09-23 | 2005-03-24 | Shlomo Ovadia | Method and system to recover resources in the event of data burst loss within WDM-based optical-switched networks |
| JP4349114B2 (ja) | 2003-12-10 | 2009-10-21 | ソニー株式会社 | 送信装置および方法、受信装置および方法、記録媒体、並びにプログラム |
| US20050172091A1 (en) * | 2004-01-29 | 2005-08-04 | Rotithor Hemant G. | Method and an apparatus for interleaving read data return in a packetized interconnect to memory |
| JP2010514348A (ja) * | 2006-12-21 | 2010-04-30 | トムソン ライセンシング | インターネットプロトコルネットワークでのリアルタイムのオーディオ及びビデオデータの前方誤り訂正をサポートする方法 |
| US9015399B2 (en) | 2007-08-20 | 2015-04-21 | Convey Computer | Multiple data channel memory module architecture |
| US8787153B2 (en) | 2008-02-10 | 2014-07-22 | Cisco Technology, Inc. | Forward error correction based data recovery with path diversity |
| US8307265B2 (en) * | 2009-03-09 | 2012-11-06 | Intel Corporation | Interconnection techniques |
| US9237105B2 (en) | 2009-12-08 | 2016-01-12 | Microsoft Technology Licensing, Llc | Data communication with compensation for packet loss |
| JP2012199724A (ja) * | 2011-03-19 | 2012-10-18 | Fujitsu Ltd | データ送信装置、データ受信装置、データ送受信装置及びデータ送受信装置の制御方法 |
| US9229897B2 (en) | 2012-06-29 | 2016-01-05 | Intel Corporation | Embedded control channel for high speed serial interconnect |
| US9479196B2 (en) * | 2012-10-22 | 2016-10-25 | Intel Corporation | High performance interconnect link layer |
| EP2926341B1 (en) | 2012-11-30 | 2020-02-19 | Hewlett-Packard Enterprise Development LP | Memory controllers to form symbols based on bursts |
| US9306863B2 (en) | 2013-12-06 | 2016-04-05 | Intel Corporation | Link transfer, bit error detection and link retry using flit bundles asynchronous to link fabric packets |
| JP6260360B2 (ja) | 2014-03-07 | 2018-01-17 | 富士通株式会社 | 光伝送装置および光伝送システム |
| US9747048B2 (en) * | 2014-06-02 | 2017-08-29 | Micron Technology, Inc. | Systems and methods for packing data in a scalable memory system protocol |
| US20160099795A1 (en) | 2014-10-02 | 2016-04-07 | Kent C. Lusted | Technologies for exchanging host loss and forward error correction capabilities on a 25g ethernet link |
| US9940287B2 (en) | 2015-03-27 | 2018-04-10 | Intel Corporation | Pooled memory address translation |
| US10097203B2 (en) * | 2015-11-12 | 2018-10-09 | Nvidia Corporation | Lane-striped computation of packet CRC to maintain burst error properties |
| US20170270062A1 (en) | 2016-03-21 | 2017-09-21 | Intel Corporation | In-band retimer register access |
| US11144691B2 (en) | 2016-06-02 | 2021-10-12 | Siemens Industry Software Inc. | Virtual Ethernet mutable port group transactor |
| US10771189B2 (en) | 2018-12-18 | 2020-09-08 | Intel Corporation | Forward error correction mechanism for data transmission across multi-lane links |
| US11693813B2 (en) * | 2018-12-18 | 2023-07-04 | Ati Technologies Ulc | Alternative protocol over physical layer |
| US11249837B2 (en) | 2019-03-01 | 2022-02-15 | Intel Corporation | Flit-based parallel-forward error correction and parity |
| US11444829B2 (en) * | 2019-09-09 | 2022-09-13 | Intel Corporation | Link layer communication by multiple link layer encodings for computer buses |
-
2019
- 2019-06-12 US US16/439,582 patent/US10997111B2/en active Active
-
2020
- 2020-01-27 EP EP21168276.0A patent/EP3869350B1/en active Active
- 2020-01-27 EP EP20153760.2A patent/EP3702926B1/en active Active
- 2020-01-27 PL PL21168276.0T patent/PL3869350T3/pl unknown
- 2020-02-28 CN CN202010131253.8A patent/CN111638992A/zh active Pending
-
2021
- 2021-04-02 US US17/221,428 patent/US11429553B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| EP3702926B1 (en) | 2023-02-15 |
| EP3702926A1 (en) | 2020-09-02 |
| EP3869350C0 (en) | 2025-02-12 |
| EP3869350A1 (en) | 2021-08-25 |
| US20190294579A1 (en) | 2019-09-26 |
| US10997111B2 (en) | 2021-05-04 |
| US11429553B2 (en) | 2022-08-30 |
| US20210224215A1 (en) | 2021-07-22 |
| EP3869350B1 (en) | 2025-02-12 |
| CN111638992A (zh) | 2020-09-08 |
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