PL3543845T3 - Wielordzeniowy procesor, każdy rdzeń posiada niezależną ścieżkę danych zmiennoprzecinkowych i całkowitych - Google Patents

Wielordzeniowy procesor, każdy rdzeń posiada niezależną ścieżkę danych zmiennoprzecinkowych i całkowitych

Info

Publication number
PL3543845T3
PL3543845T3 PL19166050T PL19166050T PL3543845T3 PL 3543845 T3 PL3543845 T3 PL 3543845T3 PL 19166050 T PL19166050 T PL 19166050T PL 19166050 T PL19166050 T PL 19166050T PL 3543845 T3 PL3543845 T3 PL 3543845T3
Authority
PL
Poland
Prior art keywords
datapath
core
integer
multicore processor
point
Prior art date
Application number
PL19166050T
Other languages
English (en)
Inventor
Elmoustapha OULD-AHMED-VALL
Barath LAKSHMANAN
Tatiana Shpeisman
Joydeep RAY
Ping T. Tang
Michael Strickland
Xiaoming Chen
Anbang YAO
Ben J. Ashbaugh
Linda L. Hurd
Liwei MA
Original Assignee
Intel Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corporation filed Critical Intel Corporation
Publication of PL3543845T3 publication Critical patent/PL3543845T3/pl

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Classifications

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    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
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    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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    • G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
    • G06F9/3891—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters
    • G—PHYSICS
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    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
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    • G06N20/00—Machine learning
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    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
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    • G06N20/10—Machine learning using kernel methods, e.g. support vector machines [SVM]
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    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
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    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
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  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
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  • Evolutionary Computation (AREA)
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  • General Health & Medical Sciences (AREA)
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  • Pure & Applied Mathematics (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Medical Informatics (AREA)
  • Multimedia (AREA)
  • Neurology (AREA)
  • Databases & Information Systems (AREA)
  • Image Processing (AREA)
  • Image Generation (AREA)
  • Advance Control (AREA)
  • Transition And Organic Metals Composition Catalysts For Addition Polymerization (AREA)
  • Ceramic Products (AREA)
  • Executing Machine-Instructions (AREA)
PL19166050T 2017-04-24 2018-03-14 Wielordzeniowy procesor, każdy rdzeń posiada niezależną ścieżkę danych zmiennoprzecinkowych i całkowitych PL3543845T3 (pl)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/494,773 US10409614B2 (en) 2017-04-24 2017-04-24 Instructions having support for floating point and integer data types in the same register
EP18161820.8A EP3396530B1 (en) 2017-04-24 2018-03-14 Mixed inference using low and high precision
EP19166050.5A EP3543845B1 (en) 2017-04-24 2018-03-14 Multicore processor each core having independent floating-point datapath and integer datapath

Publications (1)

Publication Number Publication Date
PL3543845T3 true PL3543845T3 (pl) 2022-03-07

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ID=61655684

Family Applications (2)

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PL21202337.8T PL3958116T3 (pl) 2017-04-24 2018-03-14 Graficzna jednostka obliczeniowa ogólnego przeznaczenia oraz sposób wykonywania instrukcji o mieszanej precyzji
PL19166050T PL3543845T3 (pl) 2017-04-24 2018-03-14 Wielordzeniowy procesor, każdy rdzeń posiada niezależną ścieżkę danych zmiennoprzecinkowych i całkowitych

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PL21202337.8T PL3958116T3 (pl) 2017-04-24 2018-03-14 Graficzna jednostka obliczeniowa ogólnego przeznaczenia oraz sposób wykonywania instrukcji o mieszanej precyzji

Country Status (8)

Country Link
US (5) US10409614B2 (pl)
EP (5) EP3958116B1 (pl)
CN (6) CN116777728A (pl)
DK (1) DK3958116T3 (pl)
ES (2) ES2960064T3 (pl)
FI (1) FI3958116T3 (pl)
PL (2) PL3958116T3 (pl)
TW (3) TWI790410B (pl)

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