PL131069B1 - Expanded linking equipment,especially for telephone exchange - Google Patents

Description

* ***** * ***** 1 Int. Cl.3 H04Q 3/52 Inventors: Kenneth Frank Giesken, John Michael Cotton Patent holder: International Standard Electric Corporation, New York (United States of America) Extended switching device, especially for a telephone exchange The subject of the invention is an extended switching device, especially for a telephone exchange, and in particular a multiple transmission switching device with spatial and time division, used to implement a continuously extended switching device in a telephone exchange, in a private interconnected telephone exchange. with a municipal telephone network, in a circuit reducer, in a data transmission system, or in any other device in which multiple terminal interconnections are required. Known time-division transmission switching devices employ time-slot exchange systems or space-division interconnect systems, typically two of the former and one of the latter systems, or two of the latter and one of the former systems. U.S. Patent No. 3,961,805 describes a time-slot exchange system. U.S. Patent No. 3,961,802 describes a multistage switching device. These known switching devices are generally not suitable for modification without extensive rewiring to accommodate the dimensions of the main system to the expanded form. Known switching devices are designed to accommodate dimensions within a specified range, i.e., a specified number of lines that can be connected. Known switching devices, particularly for telephone exchanges, for interconnecting multiple lines and trunks include a plurality of lines and trunks, each having at least two inlets and at least two outlets, and being capable of reflecting telephone traffic arriving thereon through one of its inlets and back to any other of its inlets. The links are arranged into a plurality of individual lower and higher order stages. The device according to the invention comprises a first data circuit having a series of consecutive logical elements and a shift register. The output of the first logical element is coupled to the input of the shift register. The output of the shift register is coupled to the input of the next logical element. The last logical element is coupled to the last shift register, the output of which is coupled to an output logical element for transmitting a digital signal or receiving a digital signal. The output of the output logical element is coupled to a first shift register, the output of which is coupled to the input of the first logical element. The second input of each logic element is adapted to receive a digital signal from the corresponding input. The other end of each logic element is coupled to an output line. The device includes a data transfer circuit carrying a plurality of control logic elements, the outputs of which are connected to subsequent logic elements for reflecting the digital signal back to the output terminal of each of the subsequent logic elements coupled to the output line. The data transfer circuit includes a control memory coupled to a shift register coupled to the control logic elements via a series of leads of subsequent logic elements selectively coupled to any of the outputs of these subsequent logic elements. The device also includes a circuit feeding signals from the outputs of the aforementioned successive logical elements in one circuit to the outputs of any other higher-order links, a reservation circuit preferably containing AND logic elements and detection circuits for feeding a digital signal from the output to the output of the higher-order links. Preferably, the aforementioned links are spatially divided links. In another embodiment, the links are time-division links. In yet another embodiment, the links are combined spatially divided and time-division links. The device according to the invention preferably includes a control and selection circuit for the telephone traffic path for digital signals and a memory circuit. A data link is connected to the control and selection circuit of the telephone traffic path so that the signal is routed in the same path as the digital signals. The digital signals comprise a sequence of digitally encoded samples representing the speech signal. The encoded digital signals are preferably linear pulse code modulation signals. The digital signals are preferably composed of digitally encoded analog signals. Each of the leads and outputs of the links has an input and an output, and each of the inputs and outputs of each lead is adapted to receive time-division multiplied signals in multiple channels. The control circuit for reflecting the digital signals constitutes partial periodic coupling for the device. An advantage of the switching device according to the invention is its adaptation to receive dimensions within a wide range. The invention enables the device to be expanded without redesigning it to support an increased number of lines and long-distance links. A small switching device can be easily constructed, i.e., for several hundred lines, because there is no specific number of stages required to implement such a small system. There is also no upper limit to the device configuration as to its expansion, i.e., the device can easily be expanded from several hundred lines requiring a small number of stages to a large number of lines, e.g., 90 lines requiring many stages. Moreover, a small operating circuit can be easily expanded into a large operating circuit without changing the wiring, which was required in known devices. In the continuously expanded switching device according to the invention, the terminals of the terminals containing the individual circuits are connected only to the links in the higher-order stages, thereby eliminating the need for changing the wiring when the device is expanded. Connections between the terminals are achieved by utilizing the reflection and connection properties of the individual switching elements. The reflection properties determine the interconnection capability of two leads in a link. This device can be used with both analog and digital transmission systems with two- or four-wire telephone traffic paths with spatial and time connections, or a combination thereof. In a preferred embodiment of the invention, a multi-stage spatial connection device and a time-slot exchange connection device are used, using as individual connecting elements an integrated link and a control circuit, by means of which telephone traffic can be directed to another lead or output. The described device finds application in both analog and digital telephone traffic switching devices and is particularly advantageous when used in a four-wire device as a ginip link, reducer, dereducer or other pulse code modulation switching unit with a defined spatial and temporal combining capability for combining any time interval of any input multiplex line with any other time interval of any other output multiplex line. The described link can be used in an arrangement for connecting tracks both in one direction and in reverse in the case of four-wire interconnections, using controlled reflection point techniques and track selection control with access to control commands for digitally encoded speech and control commands for direct control of the speech track, thereby eliminating additional control lines. An advantage of the invention is that the switching device can be continuously expanded. A further advantage of the invention is that for the expanded switching device, modification of the internal and external switching lines is not required in order to implement this expansion. (The subject of the invention is shown in 60 embodiments in the drawing, in which Fig. 1A shows a simplified known connection using reflection, Fig. 1 and 2B shows a known connection device using vertical reflection and connection, Fig. 2A, 2 and 3B, 2C and 2D show simplified connection devices using the reflection technique according to the invention in more detail, wherein one-, two-, three- and eight-block connection devices are shown as examples, Fig. 3 shows connections in the Mu feed, also using the reflection technique, Fig. 4 shows blocking curves as a function of the number of connection degrees for different levels of telephone traffic intensity, Fig. 5 and 6B shows connection matrices using the reflection/connection leads, wherein Fig. 5iA shows a single switching device, and Fig. 5iB shows an extended switching device, Fig. 6A^6'E shows a multi-stage, extended switching device according to the invention, Fig. 7A shows a four-wire delay line, Fig. 7B shows a control logic circuit for a single inlet or outlet, Fig. 1C shows a logic circuit equivalent to that shown in Fig. 7B, Fig. 8 shows a timed switching control circuit for a switching device with a four-wire delay line, using the logic circuit of Fig. 7B, Fig. 9 shows a logic and block diagram of a cross-circuit circuit, and Fig. 10 shows a fault diagram of a circuit with Fig. 10 cooperating with a matrix. Reflection technology has been used in known cross-array systems, such as cross-array switching devices, by closing two horizontal branches with one vertical branch. This is illustrated in Fig. 1A, where telephone traffic from line units 10 and 12 is routed to link 14 via horizontal matrix lines 16 and 18 to vertical line 20. Each line unit 10 and 12 may contain a small arrangement of cross-array switches, which are well known, and is connected to a plurality of input/output lines 15. The idea of reflection is to route telephone traffic on line 16 to link 14. 14, where it is reflected from the vertical line 20 and exits the link through the horizontal line 18. The improved device of Fig. 1A is shown in a simplified position in Fig. 1B, which also utilizes the idea of reflection. In this device, the vertical lines are incorporated between links of the same row, which consequently limits the maximum dimensions to which the device can be extended. A plurality of linear units 22, 24, 26, and 30 are incorporated in individual horizontal lines 32, 34, 36, and 38 and are connected to links 40 and 42. Link 40 serves to connect linear units 22 and 24 by reflection, and link 42 serves to connect linear units 26 and 30 by as a result of reflection, wherein links 40 and 42, together with link 44, serve to connect line units 22 and 24 with line units 26 and 30. The numerical designations \ on lines 32 and 34 are equivalent to interconnecting telephone traffic on lines 32 and 34. Under these conditions, intersections 46 and 48 are closed. The numerical designations -2 on lines 34, 38, and 44 are equivalent to interconnecting telephone traffic on lines 34 and 38. Under these conditions, intersections 48 and 50 are closed, while intersection 52 is open. The known device of Fig. 1B uses a basic reflection technique in which a vertical line of one link is connected to another link of the same order, i.e. to a connection level of the same order, which limits the maximum dimensions to which the device can be extended. In contrast to known devices, the invention provides a continuously extended switching device using reflection/connection of vertical lines only to horizontal lines of higher order links, with higher order links also using reflection. The terms used herein: input, output, feed-in and lead-out are defined as follows. An input is an element connected to a link or a bundle of links, which element carries signals from outside the link, while an output A link is a component on a link that carries signals from the link. A link is a connection to the link, having both an input element and an output element, carrying signals associated with two transmission directions, forming a full duplex communication path, and connected to one side of the link. A lead is a connection to the link, having both an input element and an output element, carrying signals associated with two transmission directions, forming a full duplex communication path, and connected to the side of the link opposite the lead. Figures 2A to 2D show a device that illustrates the termination technique of the invention, in which the lead from any link of a particular degree is never connected to of the same or lower stage and in which the numbering of stages is from the final stage to a specified position in the order of increasing.[ Q It should be understood that the configuration of the device is greatly simplified when presenting an extended device. More precisely, each connecting matrix consists of a number of connecting stages through which a path connecting two terminals must pass. In one device, this connecting path crosses each stage only once, and the connection from the output terminal to the terminating terminal always crosses any stage in only one direction. In this device, the connection between the output terminal and the terminating terminal can cross any stage in any direction and will cross at least one stage at least twice, once in each direction. According to the invention, the pins of the highest-order connection stage are used for reflection, but these pins are always available for connection to a still higher-order stage without modification of the device. The pins are used for connection to another link, or may be considered as composite elements. A composite element may be defined as that element in the device in which the signal changes direction, i.e., ceases to propagate in the direction of the higher-order stage. Furthermore, the reflective and combining capabilities of the link can be utilized under varying conditions. Fig. 2A shows a 2x12 line link having two leads 100 and 102 and two reflection lines 104 and 106. The reflection lines 104 and 106 are also vertical connections. In the case where feeds 100 and 102 are each a 24-line time-division multiplex line, feed 108 can provide the capacity to connect 150' lines when properly concentrated on one feed and up to 24 link lines on a single feed when fully interconnected. Another example of the de-linking technique is where feed 100 is connected to a circuit having six lines concentrated on it, while feed 102 contains a duplex link line leading to another location, the connection being in an analog and non-multiple configuration. By using only one reflection line 104 and 106, both line-to-line (reversible) and line-to-link connections can be made at the same time. This device can be further expanded, for example to 12 lines and 2 links, as shown in Fig. 2b, where additional links 110, 112 and 113 of identical configuration to link 108 are added, so that two steps are achieved by black. The link added in the second end link extension section is designated as 2. If interconnections between channels in link 108 are required, the pins of link 108 are used as reflection lines 104 and 106, that is, for telephone connections between the output lines and the links. The reflection properties of link 108 are used when calls are also connected in a similar manner on the new pins. However, for connections between a terminal formed by link 108 and a terminal formed by link 110 to which the same number of lines and links as are connected to link 108 are connected, the leads of links 108 and 110, i.e. both first stages, are connected via a common second stage connection, i.e. link 112 or 113. Reflection lines 114, 116, 118 and 120 of the second stage are used to complete the connection. In order to connect channels or/and primary links 108 and 110, the lead of each of said links is used as a connection to a common higher order connecting stage, where it is used as a reflection ion. 2C and 2D show further expansion of the switching device to three and eight primary links, respectively. This expansion technique of rearranging internal or external connections can be achieved for spatial and temporally partitioned connections and for any connecting element of the required dimensions. Fig. 2 illustrates the application of spatial partitioning. The configuration with three primary links shown in Figure 2C provides the capacity to connect six additional lines and another duplex link via the third link 126. Two-thirds of the incoming telephone traffic from link 126 will be allocated to the first two links 128 and 130, if two-thirds of the incoming lines and switching device links are connected to links 128 and 130. Therefore, if each inlet provides one unit of telephone traffic, then two-thirds of the two links 128 and 130 constitute four-thirds of the telephone traffic capacity, which exceeds the telephone traffic capacity of one link. connection pinout, with two secondary links 132 and 134 being provided for the third primary link 126. As can be seen in Fig. 2D, the addition of a fourth link will not alter the connection arrangement of the existing Hnii. Second-degree links 136 and 138 and third-degree links 140 and 142 have the same configuration as the links of the primary station. Expansion of the device without altering the arrangement of the existing line connections is shown to provide up to eight primary links, each of which can receive, for example, six lines and a duplex line connection, as shown in Fig. 2D. The eight primary connections 150 to 164 of the first stage of the switching device may be identical in configuration to the switching device of Figures 2A to 2C. Compared to a single-stage arrangement, the configuration of the switching device according to the invention is more economical because the cost of the single-stage device increases linearly with the number of terminals, i.e., leads or lines, whereas in the device according to the invention it increases approximately as the base 2 logarithm of the number of terminals. The relationship is illustrated in the following table for the eight-block circuit of Fig. 2D. Primary links (2N) r 2 3 4 19 8 7 a 16 30 Number of added links I 3 15 3 7 ;5 5 3 Total links in device - 1 4 ¦ 9 ia |19i 24 .29 32 W 192 Number of links in device per primary link ii 2 3 3 3.8 4 4.1 tf 3 6 N N, = stage number - 0 1 2 3 4 5 Links added to the circuit in stages 2, 3 and 4 are designated by numbers . corresponding to the addition of a primary link, the addition of which requires the addition of a corresponding higher-order connection stage. Thus, for example, the addition of a fifth primary link 158 results in the addition of second-order links 166 and 168, third-order links 170 and 172, and fourth-order links 174 and 176. The plurality of these constitutes the entire switching device shown in the preferred embodiment. Each primary link must function as a spatial link capable of connecting m leads to n outputs. Furthermore, each basic link must contain at least one time-slot exchange unit for each input or output, where m corresponds to the number of inputs and n to the number of outputs. It should be understood that the input and output designations are only examples and the number of exchange units will correspond to the smaller of m or n. If the number of exchange units is equal to the larger of m or n, or in any case, if it is greater than the smaller of m or n, the device will still operate; however, it will have reduced performance. Finally, each basic link must contain control elements for signal reflection, which is critical to a four-wire system. The connection/disconnection controls are shown in Fig. 3 in a simplified form, however, it should be understood that each of the control elements mentioned corresponds to a logical element described in the section relating to Fig. 7A. The spatial link, the use of which is also required, is capable of connecting m x n lines. * High concentration capability can be obtained when m is greater than n, and device expansion capability can be obtained when n is greater than m. Furthermore, in the case of concentration, when a symmetrical link (n x n) is required, only n of the m leads need be used, since failure to use the remaining leads will only result in the failure to use a small number of inexpensive control elements. Furthermore, the link m x 2n can be obtained by connecting the necessary additional leads to leads 234 and 236. Of course, the value of m can be varied over a wide range, where m is any number of leads and n is the number of pins. Figure 4 shows the blocking curves B as a function of the number of connection stages N for four and five levels. The term blocking, as used here, can mean the inability to interconnect unloaded lines or links connected to the system, due to any cause. The term non-blocking system means here that in this system there is at all times at least one successful connection between any pair of unloaded lines or links connected to the system, regardless of the number of connections already in existence. Two important characteristics of the device's operation are the ability to respond to changing levels of telecommunication traffic and the phenomenon of increased operating characteristics. According to the invention, if the number of stages of the device increases, each stage containing a plurality of links, each of which has an identical parallel function relative to another link in the same order of connection stage, the blocking does not increase continuously but reaches an asymptotic value between zero and one, depending on the dimensions of the link and the volume of telephone traffic. The term traffic volume as used here may be defined as the amount of telephone traffic in one or more telephone traffic paths per unit of time and is usually measured in erlangs, where one erlang is the volume of telephone traffic in a path, occurring continuously or in one or more paths carrying concentrated telephone traffic - one hour of call per hour, one minute of call per minute, and so on. According to the invention, the blocking characteristic B for a given number of connection stages N for low, medium, and high levels of telephone traffic is such that there is a relationship between the blocking characteristic and N, where N is the number of stages, such that once the maximum blocking level is reached, the blocking of the system will not increase further, i.e. the curve device blocking in function. N becomes asymmetric at maximum blocking level. This is illustrated in Fig. 4 for four levels of telephone traffic load, with curve 1 representing low telephone traffic load, curve 2 representing low to medium telephone traffic load, curve 3 representing medium to high telephone traffic load, and curve 4 representing high telephone traffic load. If the link dimensions are increased by any degree, the probability of blocking becomes lower for a given telephone traffic load, and the device's output terminals of the link/connection are connected. Call connections on link 300 are provided by a spatially partitioned connection matrix 302 and exemplary channel exchange units 304, 306, and 308. Each lead (of which leads 310, 312, 314 are three examples) and each lead (of which leads 322, 324, 326 are three examples) has inputs and outputs that carry the input and output paths of a four-wire connection. The terms channel exchange units and time-slot exchange units are used interchangeably here. Each connection matrix 302 provides thirty-two channels on each of eight leads, of which only three leads 310, 312, and 314 (leads 0, 2, and 7, respectively) are shown for simplicity of description. Data from leads 310, 312, and 314 on inputs 311, 313, and 315, designated leads 0, 2, and 7, respectively, of the eight leads, can be supplied to channel exchange units 304, 306, and 308 via spatially partitioned connection matrix 302 to leads 316, 318, and 320, respectively. Thus, data from any of the The inputs of the switching device may be selectively coupled to any one of the inputs of the channel exchange units for each of the channel periods. Three channel exchange units 304, 306, and 308, one for each of the illustrated pins 322, 324, and 326 of the switching device, introduce a predetermined delay, effectively coupled data from a time channel at the input to another time channel at the output, so that no two channels occupy the same time space at any of the channel exchange outputs. For example, data from input 313 of lead 312 is applied via intersection 354 to input 244 of lead 318 of channel exchange unit 306. The channel 15 data at input 313 is effectively converted to channel 21 data at output 3Z8. Output 328 of lead 324 of channel exchange unit 306 may be used to change the impedance state of the connection to input 330 of lead 324 of channel exchange unit 306, as shown in the drawing. Channel exchange may cause, for example, data at input 330 to channel 21 to be converted into data on time channel 9 at output 334 of feed 318. Connection matrix 302, via intersection 340, applies data from output 334 to output 338 of feed 314 of device. This defines a data path corresponding to two wires of a four-wire path. The second half of the data path is described as follows. Data at input 315 of feed 314 on time channel 9 is applied via intersection 342 to input 244 of feed 318 of channel exchange unit 306. Channel exchange unit 306 time-transfers data from channel 9 to channel 15 at output 334 of feed 318 and feeds it to an intersection 350 which routes data from channel 15 to output 352 of feed 312. Control is such that each of feeds 310, 312, 314, etc., of the connection matrix has independent access to the channel exchange feeds, all in a predetermined format. Fig. 5B shows an expanded apparatus of Fig. 5A which has an exemplary new telephone traffic path and corresponding connections and in which a plurality of similar switching arrangements are combined into a multi-stage switching apparatus. The telephone traffic path is obtained from input channel 15 of lead 2 of link 300 to output channel 21 of lead 6 of link 300. Pin 6 of link 300 is connected to the neutral lead of link 300A. Input channel 21 of the neutral lead of link 300A is connected to the output channel 30 of lead 25 30 35 40 45 7 of link 300A. Thus, channel 30 of pin 7 of link 300A provides reflection for the described connection, as shown in Figure*. The connection is achieved via input channel 30 of pin 7 of link 300A, which is connected to output channel 17 on lead 7 of link 300A. Lead 7 of link 300A is connected to pin 6 of link 300B, which connects input channel 17 of pin 6 to output channel 9 of lead 7 of link 300B. This represents the connection of input channel 15 of lead 2 of link 300 to output channel 9 of lead 7 of link 300B by reflection in channel 30 of lead 7 of link 300A. The return half of the four-wire connection is a supplement to the above. The path selected by link 300, as described in Fig. 5A before the device expansion, is also selectable by link 300 after the expansion shown in Fig. 5B. The choice of reflection or transmission on pin 6 of link 300 will depend on the required path. It is shown that the switching device with fi. 5iA' is developed into a modular, multi-stage device employing a technique to provide any required input connection while still allowing for further expansion of the reflection output by connection to a higher order stage. The remaining links 300C, 300D have a configuration similar to the links described. In Figs. 6A and GE, distribution switching devices are shown in which each connection block contains 2x12 links and which constitute several embodiments of the invention. In practice, larger links of the order of 8x8, 10x6, 32x32 can also be used, depending on the density, waveforms, and other economic considerations. For 192 lines in a thirty-two-channel device carrying 1 erlang/line of telephone traffic, the resulting telephone traffic intensity is 6 erlangs for each of the thirty-two channels. Assuming that fifty percent of the telephone traffic is internal, the telephone traffic on the link is 1-9.2 erlangs divided by two, or 9.6 erlangs per 19(2-line system. If the telephone traffic on the link is a single path through one set in each direction, each set of links requires the capacity to carry 4.8 erlangs on 192 lines. The following table relates to the assumed space-time device according to the invention of Figs. 6A to 6»E. Fig. AA 6B 00 6iD GE Number of lines 3184 570 7183 960 Erilangi friniii 19.2' 38.4 5f7.6' 7i6.8 96.0 Telephone traffic 9.6 19.2 28.® 38.4 48i0l Single-path telecommunication traffic 4j8 9^6 14.4 19.2 24^qv Number of links (1*/o blocking probability) 11 18 25 3J1 3T Total volt number of links 22 36 50 62 74 .. Number of links 1' 4 7 9 12131 ( 13 The connection according to the invention in a preferred embodiment can be made on a single board, combining both spatial and temporal functions, and can be cascaded and interconnected to create a device continuously expanded, for example from two thousand to one hundred thousand lines. The functional unit for exchanging channels of the link may be a delay line made of charge-coupled devices or dynamic MOS shift registers 10 and providing the additional delay required to form a four-wire path as shown in Fig. 7A, which shows two input signals S1 and S2 on lines 700 and 702. Signals S1 and S2 have variable delays, shown for signal S2 by 706 and 708, typically from 5 to 12.5 microseconds, with the delay of signal S1 being shown by 709. The total delay 706 plus 708 plus 709 is typically equal to 12.5 microseconds. The logic for achieving this delay is shown in Fig. 7B. Each signal input is capable of receiving and transmitting the currently existing signal through the link. The time slot exchange control signal C on line 710 is applied to logic elements IJ712 and 714 and to logic elements IJ716 via inverter 718. The digital speech signal S1 is combined with control signal C in element IJ712, while signal S2 is combined with control signal C in element IJ714. Digital speech signal S2 is coupled from shift register 70 to AND elements 714 and 716 and combined with the inverted control signal in AND element 716. The output of AND element 716 (signal S2) is combined with the output of AND element 712 (signal S1) in OR element 722. Both S1 and S2 are passed through shift register 724. The simplified logic circuit of Fig. 7C shows shift registers 720 and 724 and the previously described logic circuit 726 and will be used hereinafter. When the described control logic is used to input a signal, the control signal on line 710 is a selected, stored control signal, however, when the described control logic is used to output a signal, the control signal is a reflection control signal. Fig. 8 shows a timing link and associated control logic, as described in Fig. 71B, for a multi-channel, four-wire device. The input signal S1 is supplied to pin 800 of input line 802, while the output signal S2 in the return path of the four-wire connection is received from output line 804 of the link pin 806. Pin 806 comprises input line 816 and output line 818. The delay of signal S1 between input 802 to lead 800 and output 818 of pin 818 is selectively varied by selecting inputs 802, 808, 810, 812, and so on, of the desired signal or other inputs (not shown) in the time link of the delay line, with programmable control of control memory 814, which contains the addresses of the signal inputs in a predetermined and variable order. By accessing the address of the required signal input from control memory 814, signal S1 enters it and signal S2 is received from the selected access location on the delay line. Control memory 814 is synchronized by synchronization circuit 820 to synchronize with the delay line so that the address selected for each input point of signal S1 is directed from control memory 814 via line 822 to series-parallel shift register 824. The output signal of shift register 824 is used to select and control one of the control logic circuits that are applied to each of the thirty-two selected input control channels 802, 810, 812, and so on. These control logic elements are shown for channels one, two, three, thirty, and thirty-one and designated 826 accordingly; 828, 830, and 834. The output of parallel shift register 824 is coupled to logic elements 826 to 834 via lines 836 to 844. Line 846 acts as a delay line returning from logic element 848. A synchronization signal coupled to synchronization circuit 820 serves to time-align the speech sample frequency and the encoded control signal frequency of control pair 824. These two frequencies need not be bit-synchronized because the two codes may differ; i.e., a speech sample may contain eight bits while the control code may contain five bits. Each signal injection, reception, and transition through the link with elements 850, 852, 854, 856, and 858 between input and output shift registers 860 and 870 provides for the selection of the injection and return locations of signals S1 and S2 to provide the required input and output delay of signal S1 and the complementary return delay of signal S2. Logic element 848 enables the signal to be reflected at the output of the link when the selected path between the calling and called subscribers requires a path to be established at that point in the circuit. Reflection of a particular call, if required, is achieved by energizing control input 872 of logic element 848 at the appropriate time. For example, a sample of signal S1 enters input 802 of lead 800 and is to be reflected back from output 804 of lead 800 at a predetermined later time, so that the two channel loads are later than the signal S1* occurring at the same time on the same channel when the complementary signal S2* (which is a sample of the signal at another call direction) enters input 802 of lead 800 and exits output 804 of lead 800. Signal S2 occurs on channel 30 at a later time, which represents times of channel thirty-two, at the same time on the same channel when the next sample of signal S1 enters input 802. To achieve the above, logic element 826 excites input/output logic element 858 to input signal S1 to a delay line, and signal input 872 of logic element 848 is excited on a predetermined basis on one channel, subsequent to reflection of signal S1 on line 846. Logic element 834 is excited to apply a signal to control input/output logic element 850 to receive signal S1 and apply it as signal S1* to output 804, while simultaneously inputting signal S2* to delay line of shift register 862. After After thirty additional channel times have elapsed, logic element 826 will again excite input/output logic element 858 to receive signal S2* at output 804 as signal S2. Simultaneously with this, the next sample S1 from input 802 is input to delay circuit shift register 870. This link transmits and reflects signals S1 and S2 in accordance with the requirements of a particular switching path, as determined by control memory 814. Digitally encoded speech signals and commands controlling the selection of switching element interconnections are encoded for each channel in sixteen serially transmitted bits. Typically, 8k frames per second are transmitted with 32 channels per frame and 16 bits per channel. Synchronization is ensured so that, for example, channel 0 occupies the same period (or period) on the input and output connections. Channel exchange ensures that 1<6 bits contained in each channel are transmitted to the other channel by introducing a delay into the bit stream. This delay (in the case of 32 channels) is the minimum period of one channel and the maximum period of 31 channels. Reflection is achieved by a controlled change in the impedance pins of the link, which corresponds to the exchange of channels to a high-impedance state and the connection together the outputs and inputs of the mentioned selected channel output. Fig. 9 shows a typical matrix (intersection 900 of XY space locations with time division, used in the previously described time link, where the intersection point is designated as the intersection of the X feed containing the lines, input line 902 and output line 9, input line 906 and output line 908, which is associated with the channel intersection. The link 910 is fed to one input the connection selection signal from the control memory and the output signal from line 906 from the channel exchange unit, where the output of the link 910 is connected to input line 904 of lead X. Link 912 is connected to a connection selection signal from the control memory and a signal from input line 902 of lead X, the output of link 912 being connected to line 908 leading to the associated channel exchange unit. To lines 906 and 908 at positions 924 and 926 are connected input and output links similar to links 910 and 912 (and seven other leads). Input and output lines 902 and 904 of lead X are also connected to a circuit for fault detection and redundancy checking of the connection recognition and to and an unloaded channel detection circuit 916 via logical elements 918 and 920, and other inputs are connected to logical elements 918 and 920 being indicative of the activation of the logical elements at the required times. The detection circuit 914, which may be of conventional construction, is used to detect instructions at input 902 that are directed to the siting circuits associated with output Y, to check the instruction encoding to determine that such instructions are not erroneous, and to detect unloaded channels at input 902 and to provide signals at output 904 to indicate a busy/free state on input Y. The circuit Detection circuit 914 receives commands, such as transmitted busy commands, from control circuits associated with pin Y and, as a result, provides a signal representing a busy/free command to output line 904. When detection circuit 914 recognizes a select command at input 902 that is routed to pin Y, detection circuit 914 routes the priority selection signal to the intersection priority control circuit, which circuit controls, on a simultaneous basis, more than one lead driving a signal to the output of pin Y. The removal of the unloaded channel detection circuit 916 is coupled to the free selection circuit. channel via line 922. The matrix of 900 XY intersections described in connection with Figure 9 is illustrated in Figure 10, which shows one exemplary pin 960 and its control circuitry, including eight other pins in a matrix with eight leads and eight leads, zero through seven, connected to two pins 962 and 964. The XY intersection of matrix 900 corresponds to the intersection described in connection with Figure 9. Also similar to Figure 9, eight such intersections may be connected to time link 928 (channel exchange) via lines 906 and 908. Time link 928 is described in connection with Fig. 8. Detection circuits 930 and 932 operate in a similar manner to detection circuit 914 described in connection with Fig. 9, and detection circuits 934 and 936 operate in a similar manner to detection circuit 916, also described in connection with Fig. 9. Signals from outputs 922, 938, and 940 of detection circuits 914, 930, and 932 indicate a set of commands in those respective circuits, forcing connection to channel exchange unit 928, and are separately connected to intersection priority control circuit 942. After receiving simultaneous commands on two or more lines, control circuit 942 operates to select one of the required leads 25, 30, 35, 40, 45, 50, 55, 60/ ' 17 and sends commands to send busy signals to the other, unselected, required leads by means of signals on lines 944, 946, or 948, to the individual detection circuits 914, 930, and 932, and to the individual output lines on the intersection location leads, as described with reference to Fig. 9. Intersection location selection circuit 950 receives and stores the intersection location in its control delay line of a construction similar to control pad 814 described in connection with Fig. 9. 8, the intersection point is selected by control circuit 942 and opens and closes the selected intersection point by applying signals to the appropriate siting lines 952, 954, and so on. The signals at input 956 of pin 960 may include path selection control signals received from a higher-order link after reflection, which signals are recognized by the previously described detection circuit 932. As a result, pin 960 forms one of the leads of such a higher-order link. Unloaded channel detection circuits 934 and 936 perform the same function as unloaded channel detection circuit 916 - described in 9. It should be understood that the matrix shown in Fig. 10 is only exemplary. Seven additional matrices identical to those described with reference to Fig. 10 may be connected to leads 962 and 964 at positions 966 and 968. Up to six additional leads may be provided having circuits and connections identical to those corresponding to leads 962 and 964. Claims II. Extended switching device, especially for a telephone exchange, comprising a number of lines, links and switches connected in a plurality of stages, characterized in that it comprises a first data circuit having a sizer of consecutive logical elements and a shift register/tree, wherein the output of the first logical element (850) is connected to the input of the shift register (862), the output of the shift register (862) is connected to the input of the next logical element (852), and the last logical element (858) is connected to the last shift register (870), the output of which is connected to the output of a logical element (848) for transmitting a digital signal (SI) or receiving a digital signal (S2), while the output of the output logical element (848) is connected to the first shift register (860), the output of which is connected to the input of the first logical element (850), and the second input of each logical element (850, 852, 854, 856, 858) is connected for 1. receiving a digital signal at an input (802, 808, 810, 812) and the other end of each logic element (850, 852, 854, 856, 858) being coupled to an output line (804), and comprising a data transfer circuit comprising a plurality of control logic elements (826, 828, 830, 832, 834), the outputs of which are coupled to subsequent logic elements (850, 852, 854, 856, 858) for reflecting the digital signal back to the output end of each of the subsequent logic elements (850, 852, 854, 856, 858) coupled to the output line (804), (804), and the data transfer circuit also includes a control memory (814) connected to a shift register (824) connected to the control logic elements (826, 828, 830, 822, 834) via a series of leads of further logic elements (850, 852, 854, 856, 858) selectively connected to any of the leads of said logical elements (850, 852, 854, 856/858), and links (912, 910) for connecting signals from the leads of said further logic elements in one stage to the leads of the links of another arbitrary higher order stage, and a reservation circuit preferably comprising logical elements AND (918, 920) and detection devices' (914, 916), for feeding the digital signal from the pin to the pin of the higher-order connections. 25 2. The apparatus of claim 1, wherein said links are space-division links. 3. The apparatus of claim 1, wherein said links are time-division links. 4. The apparatus of claim 1, wherein said links are combined space-division and time-division links. and 5. The apparatus of claim 1, wherein said links comprise a telephone traffic path selection control circuit for digital signals and a data storage circuit connected to the telephone traffic path selection control circuit so that the control signal is conducted in the same tier as the digital signals. 5. The apparatus of claim 5, wherein the digital signals comprise a sequence of digitally encoded samples representing a speech signal. 7. The apparatus of claim 6, wherein the encoded digital signals are linear pulse code modulation signals. 8. The apparatus of claim 6, wherein the digital signals are composed of digitally encoded analog signals. 9. The apparatus of claim 1, wherein each of the leads and outputs of the connectors has an input and an output, and each of the inputs and outputs of each of the leads and outputs is adapted to receive time-division multiplied signals in wM channels. 131 069 20 t ¦*, U X FIG. 1A 22 -L ,32 2t 31 1,2 ,26 ^36 ^30 38) rL0 L6 RG. IB ,Ul 50 52 FIG. 3 230 23d iffl TSI c232 TSI -236 FIG.2A 1°^ 1027 L109 106 FIG.2B 2 MU 116 lii* no 120 FIG, 2C 131 069 FIG. A 131 069 FIG. 5B 300C 300A CH30 FIG. 6A 192L 22T FIG.6B <192L 1BT 192 L FIG.6D 31T 192 L J1I 1 2 (S 2 2 3 __] FIG.6C r 192L 1 J5lM_ 192L, 1 \m\_J_ 192 L, , ^\ 3 T2 "t X. 1 " I3j_ J -192 L, , 25T 1 FIG.6E T" 192L, ^Nj , 25T 2 T92L, , 192 L 3 2 __] L 3 192l,—y\—, m. b k 5 b131 069 FIG. 7A .702 706. SI 7nn «709 t S2 ^708 r700_X tS2 x- FIG. 7B c716 r722 []_7I< r720 FIG. 7C 7267|C 1$2 fsi *72L 820 -YNC B3V S.R. v860 804- (sn|s2 832 30 . S.R.-BU 3L 836-, 838 _BdK_ 842- T84U 830- (B22 828' -846 rx! ti^; he02 800 ,B24 826 852 MJ64 1^654 v866 rp656^-BB8 B48-kA 816 S.R.S2 Sil 806 W 672 810 FIG, 8 812 858131 069 902; r - V L < < ^ -901 910^ V and —^ V FIG. 9 XY ^~ 1 ^918 ) y i ^920 ¦ ? ) * y 916- __f_*Vn 9,12 i „ 926 ^ ! V 1 V< 9U^ *-¦ 908 ^906 n ——-i i A B -4- 922! j fc- ,V * 968 90i. 902 I92B ,_ -B16 M ,956 t r: ¦*-*—=; * |. m '[f-srjw FIG.10 DN-3, order 129/87 Price PLN 100 PL PL PL PL PL PL PL PL PL

Claims (1)

1.