OA18065A - Series-resonance oscillator - Google Patents

Abstract

An oscillator circuit (100) comprises a first tank circuit (T1) comprising an inductive element (L) and a capacitive element (C) coupled in series between a first voltage rail (14) and a first drive node (12). A feedback stage (F) is coupled to a first tank output (13) of the first tank circuit (T1) and to the first drive node (12). The feedback stage (F) is arranged to generate, responsive to a first oscillating tank voltage present at the first tank output (13), a first oscillating drive voltage at the first drive node (12) in-phase with a first oscillating tank current flowing in the inductive element (L) and the capacitive element (C), thereby causing the oscillator (100) to oscillate in a series resonance mode of the inductive element (L) and the capacitive element (C).

Description

The présent disclosure relates to an oscillator circuit, a method of operating an oscillator circuit, and a wireless communication device comprising an oscillator circuit.

Background to the Disclosure

Harmonie oscillators known in the art, and implemented in an integrated circuit chip, comprise an inductor and a capacitor, generally known as a tank, operating at a résonance frequency of the tank. Typically, such an oscillator injects a puise waveform into the tank, which filters out higher current harmonies and generates a sinusoïdal voltage waveform at its output. The tank comprises the inductor and capacitor coupled in parallel, and opérâtes in a parallel résonance mode, where the parallel impédance, that is, the impédance of the inductor and capacitor coupled in parallel, is high, generating a relatively high oscillation voltage from a relatively low bias current.

In some applications, for example, in wireless communication apparatus, an oscillator is required that has an extremely low phase noise in combination with a low power consumption. Such a combination is difficult to achieve, particularly if the available power supply voltage V_dd is low, as is often the case with present-day nanometre complementary métal oxide semiconductor (CMOS) processes. Increasing the oscillation voltage swing can reduce the phase noise of an oscillator. However, conventional oscillators are limited by the maximum voltage swing they can provide, which ranges from a peak single-ended voltage of 2V_dd, to 3V_dd, the latter being possible in so-called class-D oscillators. Reducing the inductance of the inductor and increasing the capacitance of the capacitor can also decrease the phase noise. However, if the required inductance is very small, for example, a few tens of picoHenrys, this approach can become difficult to manage due to parasitic inductances and résistances of the integrated circuit that start playing a dominant rôle. Furthermore, the quality factor of very small inductors is lower than for larger inductors, resulting in a higher power consumption for a given phase noise level.

Figure 1 illustrâtes a typical Clapp oscillator employing a parallel résonance mode. Referring to Figure 1, the Clapp oscillator has a first tank T_A comprising a first inductor L_A and a first capacitor C_A. The first inductor L_A and the first capacitor C_A are coupled in sériés to a drain of a first transistor Q_A. For providing a différentiel tank voltage V_0UT, the

-2Clapp oscillator also has a second tank T_B comprising a second inductor L_B and second capacitor C_B. The second inductor L_B and the second capacitor C_B are coupled in sériés to a drain of a second transistor Q_B. The first and second transistors Q_A, Qb hâve theirs gates biased by a constant bias voltage V_DC. The Clapp oscillator is a current-mode oscillator, which means that the first and second transistors Q_A, Qb operate as transconductors, providing voltage-to-current conversion, and delivering a large current to their respective first and second tanks T_A, T_B without loading the tanks. Therefore, each transconductor must hâve high parallel impédance. Although the first and second tanks T_A, T_B hâve sériés coupled inductors and capacitors, the Clapp oscillator does not oscillate at the sériés résonance frequency of the sériés coupled inductors and capacitors. Instead, the Clapp oscillator oscillâtes at a frequency that is determined by ail reactive components in the tanks, including the capacitances between the drain and source, and the source and ground, of the first and second transistors Q_A, Q_B. These capacitances are also represented in Figure 1. For a given bias current supplied to sources of the first and second transistors Q_A, Q_B, the oscillation amplitude is proportional to the bias current and an équivalent parallel tank résistance. Therefore, for the current-mode Clapp oscillator with a bias current l_BIAS provided by first and second current sources l_A, l_B illustrated in Figure 1, the amplitude of the tank voltage V_0UT can be expressed as

VoüT ⁼ k.l_B|_As.RpEQ (1 ) where R_PEQ is the équivalent parallel résistance of each of the tanks, which is proportional to the quality factor Q of each of the tanks, and k is a proportionality factor. In the Clapp oscillator, the parallel résistance of each of the tanks is deteriorated by the feedback at the transistor source through the capacitive tap between drain and source and source and ground.

There is a requirement for an improved oscillator.

Summary ofthe Preferred Embodiments

According to a first aspect there is provided an oscillator circuit comprising: a first tank circuit comprising an inductive element and a capacitive element coupled in sériés between a voltage rail and a first drive node; and a feedback stage coupled to a first tank output ofthe first tank circuit and to the first drive node;

wherein the feedback stage is arranged to generate, responsive to a first oscillating tank voltage présent at the first tank output, a first oscillating drive voltage at the first drive node in-phase with an oscillating tank current flowing in the inductive

-3element and the capacitive element, thereby causing the oscillator circuit to oscillate in a sériés résonance mode of the inductive element and the capacitive element.

According to a second aspect there is provided a method of operating an oscillator circuit, the oscillator circuit comprising a first tank circuit comprising an inductive element and a capacitive element coupled in sériés between a voltage rail and a first drive node, the method comprising generating, responsive to a first oscillating tank voltage présent at a first tank output, a first oscillating drive voltage at the first drive node, wherein the first oscillating drive voltage is in-phase with an oscillating tank current flowing in the inductive element and the capacitive element, thereby causing the oscillator to oscillate in a sériés résonance mode of the inductive element and the capacitive element.

Therefore, the oscillator circuit is voltage driven and oscillâtes in a sériés résonance mode. This enables a high amplitude of oscillation with only a low power supply voltage, which enables a low phase noise.

The following embodiments provide different low complexity solutions for implementing the oscillator circuit and method of operating an oscillator circuit.

The feedback stage may be arranged to generate the first oscillating drive voltage having a substantially rectangular waveform. This feature enables a switching device to be used, thereby enabling low power consumption.

In a first preferred embodiment of the oscillator circuit, the first tank circuit may arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage in-phase with the first oscillating drive voltage, and the feedback stage may comprise a first driver arranged to generate, responsive to the first oscillating tank voltage, the first oscillating drive voltage in-phase with the first oscillating tank voltage. Likewise, a first preferred embodiment of the method may comprise generating the first oscillating tank voltage in-phase with the first oscillating drive voltage, and generating, responsive to the first oscillating tank voltage, the first oscillating drive voltage in-phase with the first oscillating tank voltage. The first preferred embodiment enables a single-ended oscillating signal to be generated in a low complexity manner.

In a variant of the first preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage one hundred and eighty degrees out-of-phase with the first oscillating drive voltage, and the feedback stage may comprise a first driver arranged to generate, responsive to the first oscillating tank voltage, the first oscillating drive voltage one hundred and eighty degrees out-of-phase with the first oscillating tank voltage by applying signal inversion to the first oscillating tank voltage. Likewise, a variant of the first preferred embodiment of the method may comprise generating, responsive to the first

-4oscillating drive voltage, the first oscillating tank voltage one hundred and eighty degrees out-of-phase with the first oscillating drive voltage, and generating, responsive to the first oscillating tank voltage, the first oscillating drive voltage one hundred and eighty degrees out-of-phase with the first oscillating tank voltage by applying signal inversion to the first oscillating tank voltage. This variant enables a single-ended oscillating signal to be generated in a low complexity manner.

In a second preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage in-phase with the first oscillating drive voltage, and the feedback stage may comprise:

a second driver arranged to generate a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

a second tank circuit arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage in-phase with the second oscillating drive voltage; and a first driver arranged to generate the first oscillating drive voltage by applying signal inversion to the second oscillating tank voltage.

Likewise, a second preferred embodiment of the method may comprise: generating, responsive to the first oscillating drive voltage, the first oscillating tank voltage in-phase with the first oscillating drive voltage, generating a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage in-phase with the second oscillating drive voltage; and generating the first oscillating drive voltage by applying signal inversion to the second oscillating tank voltage.

The second preferred embodiment enables a balanced oscillating signal to be generated in a low complexity manner. The use of first and second tank circuits enables an accurate phase différence to be provided in a low complexity manner.

In a first variant of the second preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage one hundred and eighty degrees out-of-phase +with the first oscillating drive voltage, and the feedback stage may comprise:

a second driver arranged to generate a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

-5a second tank circuit arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage in-phase with the second oscillating drive voltage; and a first driver arranged to generate the first oscillating drive voltage in-phase with the second oscillating tank voltage.

Likewise, a first variant of the second preferred embodiment of the method may comprise:

generating, responsive to the first oscillating drive voltage, the first oscillating tank voltage one hundred and eighty degrees out-of-phase with the first oscillating drive voltage;

generating a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

generating, responsive to the second oscillating drive voltage, a second oscillating tank voltage in-phase with the second oscillating drive voltage; and generating the first oscillating drive voltage in-phase with the second oscillating tank voltage.

This first variant enables a balanced oscillating signal to be generated in a low complexity manner, and an accurate phase différence to be provided with low complexity.

In a second variant of the second preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage one hundred and eighty degrees out-of-phase with the first oscillating drive voltage, and the feedback stage may comprise:

a second driver arranged to generate, responsive to the first oscillating tank voltage, a second oscillating drive voltage in-phase with the first oscillating tank voltage;

a second tank circuit arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage one hundred and eighty degrees out-ofphase with the second oscillating drive voltage; and a first driver arranged to generate, responsive to the second oscillating tank voltage, the first oscillating drive voltage in-phase with the second oscillating tank voltage.

Likewise, a second variant of the second preferred embodiment of the method may comprise:

generating, responsive to the first oscillating drive voltage, the first oscillating tank voltage one hundred and eighty degrees out-of-phase with the first oscillating drive voltage;

generating, responsive to the first oscillating tank voltage, a second oscillating drive voltage in-phase with the first oscillating tank voltage;

-6generating, responsive to the second oscillating drive voltage, a second oscillating tank voltage one hundred and eighty degrees out-of-phase with the second oscillating drive voltage; and generating, responsive to the second oscillating tank voltage, the first oscillating drive voltage in-phase with the second oscillating tank voltage.

This second variant enables a balanced oscillating signal to be generated in a low complexity manner, and an accurate phase différence to be provided with low complexity.

In the first and second preferred embodiments of the oscillator circuit, and their variants, the first tank circuit may comprise a sensor device arranged to generate the first oscillating tank voltage responsive to the first oscillating tank current. Likewise, the first and second preferred embodiments of the method, and their variants, may comprise generating in a sensor device the first oscillating tank voltage responsive to the first oscillating tank current. The sensor device may comprise one of a résistive element and a transformer coupled in sériés with the first inductive element and the first capacitive element between the voltage rail and the first drive node. Alternatively, the sensor device may be magnetically coupled to the first inductive element for generating by magnetic induction the first oscillating tank voltage responsive to the first oscillating tank current. These features enable feedback to be provided in a low complexity manner.

In a third preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage, and the feedback stage may comprise a phase shifting stage arranged to generate a first intermediate oscillating voltage by applying a phase lag of ninety degrees to the first oscillating tank voltage, and a first driver arranged to generate the first oscillating drive voltage by applying signal inversion to the first intermediate oscillating voltage.

Likewise, a third preferred embodiment of the method may comprise: generating, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage;

generating a first intermediate oscillating voltage by applying a phase lag of ninety degrees to the first oscillating tank voltage; and generating the first oscillating drive voltage by applying signal inversion to the first intermediate oscillating voltage.

The third preferred embodiment enables quadrature-related signais to be generated in a low complexity manner.

-7In a fourth preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage, and the feedback stage may comprise a phase shifting stage arranged to generate a first intermediate oscillating voltage by applying a phase lag of ninety degrees to the first oscillating tank voltage, and a first driver arranged to generate the first oscillating drive voltage in response to, and in-phase with, the first intermediate oscillating voltage.

Likewise, a fourth preferred embodiment of the method may comprise: generating, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage;

generating a first intermediate oscillating voltage by applying a phase lag of ninety degrees to the first oscillating tank voltage; and generating the first oscillating drive voltage in response to, and in-phase with, the first intermediate oscillating voltage.

The fourth preferred embodiment enables quadrature-related signais to be generated in a low complexity manner.

In a fifth preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage, and the feedback stage may comprise:

a first phase shift circuit arranged to generate a first intermediate oscillating voltage by applying a phase lag of ninety degrees to the first oscillating tank voltage;

a second driver arranged to generate, responsive to the first intermediate oscillating voltage, a second oscillating drive voltage in-phase with the first intermediate oscillating voltage, a second tank circuit arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of a second oscillating drive voltage;

a second phase shift circuit arranged to generate a second intermediate oscillating voltage by applying a phase lag of ninety degrees to the second oscillating tank voltage; and a first driver arranged to generate, responsive to the second intermediate oscillating voltage, the first oscillating drive voltage in-phase with the second intermediate oscillating voltage.

- 8Likewise, a fifth preferred embodimentof the method may comprise:

generating, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage;

generating a first intermediate oscillating voltage by applying a phase lag of ninety degrees to the first oscillating tank voltage;

generating, responsive to the first intermediate oscillating voltage, a second oscillating drive voltage in-phase with the first intermediate oscillating voltage, generating, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of a second oscillating drive voltage;

generating a second intermediate oscillating voltage by applying a phase lag of ninety degrees to the second oscillating tank voltage; and generating, responsive to the second intermediate oscillating voltage, the first oscillating drive voltage in-phase with the second intermediate oscillating voltage.

The fifth preferred embodiment enables a balanced oscillating signal to be generated in a low complexity manner.

In a sixth preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage, and the feedback stage may comprise:

a first phase shift circuit arranged to generate a first intermediate oscillating voltage by applying a phase lag of ninety degrees to the first oscillating tank voltage;

a second driver arranged to generate a second oscillating drive voltage by applying signal inversion to the first intermediate oscillating voltage;

a second tank circuit arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase leading by ninety degrees a phase of the second oscillating drive voltage;

a second phase shift circuit arranged to generate a second intermediate oscillating voltage by applying a phase lag of ninety degrees to the second oscillating tank voltage; and a first driver arranged to generate, responsive to the second intermediate oscillating voltage, the first oscillating drive voltage in-phase with the second intermediate oscillating voltage.

Likewise, a sixth preferred embodiment of the method may comprise:

-9generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage, and the feedback stage may comprise:

a first phase shifter arranged to generate a first intermediate oscillating voltage by applying a phase lag of ninety degrees to the first oscillating tank voltage;

a second driver arranged to generate a second oscillating drive voltage by applying signal inversion to the first intermediate oscillating voltage;

a second tank circuit arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase leading by ninety degrees a phase of the second oscillating drive voltage;

a second phase shifter arranged to generate a second intermediate oscillating voltage by applying a phase lag of ninety degrees to the second oscillating tank voltage; and a first driver arranged to generate, responsive to the second intermediate oscillating voltage, the first oscillating drive voltage in-phase with the second intermediate oscillating voltage.

The sixth preferred embodiment enables a balanced oscillating signal to be generated in a low complexity manner.

In a seventh preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage, and the feedback stage may comprise:

a second driver arranged to generate a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

a second tank circuit arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of the second oscillating drive voltage; and a first driver arranged to generate, responsive to the second oscillating tank voltage, the first oscillating drive voltage in-phase with the second oscillating tank voltage.

Likewise, a seventh preferred embodiment of the method may comprise: generating, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage;

generating a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

-10generating, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of the second oscillating drive voltage; and generating, responsive to the second oscillating tank voltage, the first oscillating drive voltage in-phase with the second oscillating tank voltage.

The seventh preferred embodiment enables a balanced oscillating signal to be generated in a low complexity manner.

In an eighth preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage, and the feedback stage may comprise:

a second driver arranged to generate a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

a second tank circuit arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase leading by ninety degrees a phase of the second oscillating drive voltage; and a first driver arranged to generate, responsive to the second oscillating tank voltage, the first oscillating drive voltage in-phase with the second oscillating tank voltage.

Likewise, an eighth preferred embodiment of the method may comprise: generating, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage;

generating a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

generating, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase leading by ninety degrees a phase of the second oscillating drive voltage; and generating, responsive to the second oscillating tank voltage, the first oscillating drive voltage in-phase with the second oscillating tank voltage.

The eighth preferred embodiment enables quadrature-related signais to be generated in a low complexity manner.

In a ninth preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage, and the feedback stage may comprise:

-11 a second driver arranged to generate, responsive to the first oscillating tank voltage, a second oscillating drive voltage in-phase with the first oscillating tank voltage;

a second tank circuit arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of the second oscillating drive voltage; and a first driver arranged to generate, responsive to the second oscillating tank voltage, the first oscillating drive voltage in-phase with the second oscillating tank voltage.

Likewise, a ninth preferred embodiment of the method may comprise:

generating, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage;

generating, responsive to the first oscillating tank voltage, a second oscillating drive voltage in-phase with the first oscillating tank voltage;

generating, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of the second oscillating drive voltage; and generating, responsive to the second oscillating tank voltage, the first oscillating drive voltage in-phase with the second oscillating tank voltage.

The ninth preferred embodiment enables quadrature-related oscillating signais to be generated in a low complexity manner.

In a tenth preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage, and the feedback stage may comprise:

a second driver arranged to generate, responsive to the first oscillating tank voltage, a second oscillating drive voltage in-phase with the first oscillating tank voltage;

a second tank circuit arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of the second oscillating drive voltage;

a third driver arranged to generate, responsive to the second oscillating tank voltage, a third oscillating drive voltage in-phase with the second oscillating tank voltage;

a third tank circuit arranged to generate, responsive to the third oscillating drive voltage, a third oscillating tank voltage having a phase lagging by ninety degrees a phase of the third oscillating drive voltage;

a fourth driver arranged to generate, responsive to the third oscillating tank voltage, a fourth oscillating drive voltage in-phase with the third oscillating tank voltage;

- 12a fourth tank circuit arranged to generate, responsive to the fourth oscillating drive voltage, a fourth oscillating tank voltage having a phase lagging by ninety degrees a phase of the fourth oscillating drive voltage; and a first driver arranged to generate, responsive to the fourth oscillating tank voltage, the first oscillating drive voltage in-phase with the fourth oscillating tank voltage.

Likewise, a tenth preferred embodiment of the method may comprise: generating, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage;

generating, responsive to the first oscillating tank voltage, a second oscillating drive voltage in-phase with the first oscillating tank voltage;

generating, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of the second oscillating drive voltage;

generating, responsive to the second oscillating tank voltage, a third oscillating drive voltage in-phase with the second oscillating tank voltage;

generating, responsive to the third oscillating drive voltage, a third oscillating tank voltage having a phase lagging by ninety degrees a phase of the third oscillating drive voltage;

generating, responsive to the third oscillating tank voltage, a fourth oscillating drive voltage in-phase with the third oscillating tank voltage;

generating, responsive to the fourth oscillating drive voltage, a fourth oscillating tank voltage having a phase lagging by ninety degrees a phase of the fourth oscillating drive voltage; and generating, responsive to the fourth oscillating tank voltage, the first oscillating drive voltage in-phase with the fourth oscillating tank voltage.

The tenth preferred embodiment enables quadrature-related balanced oscillating signais to be generated in a low complexity manner.

In an eleventh preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage, and the feedback stage may comprise:

a second driver arranged to generate, responsive to the first oscillating tank voltage, a second oscillating drive voltage in-phase with the first oscillating tank voltage;

-13a second tank circuit arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase leading by ninety degrees a phase of the second oscillating drive voltage;

a third driver arranged to generate, responsive to the second oscillating tank voltage, a third oscillating drive voltage in-phase with the second oscillating tank voltage;

a third tank circuit arranged to generate, responsive to the third oscillating drive voltage, a third oscillating tank voltage having a phase leading by ninety degrees a phase of the third oscillating drive voltage;

a fourth driver arranged to generate, responsive to the third oscillating tank voltage, a fourth oscillating drive voltage in-phase with the third oscillating tank voltage;

a fourth tank circuit arranged to generate, responsive to the fourth oscillating drive voltage, a fourth oscillating tank voltage having a phase leading by ninety degrees a phase of the fourth oscillating drive voltage; and a first driver arranged to generate, responsive to the fourth oscillating tank voltage, the first oscillating drive voltage in-phase with the fourth oscillating tank voltage.

Likewise, an eleventh preferred embodiment of the method may comprise: generating, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage;

generating, responsive to the first oscillating tank voltage, a second oscillating drive voltage in-phase with the first oscillating tank voltage;

generating, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase leading by ninety degrees a phase of the second oscillating drive voltage;

generating, responsive to the second oscillating tank voltage, a third oscillating drive voltage in-phase with the second oscillating tank voltage;

generating, responsive to the third oscillating drive voltage, a third oscillating tank voltage having a phase leading by ninety degrees a phase of the third oscillating drive voltage;

generating, responsive to the third oscillating tank voltage, a fourth oscillating drive voltage in-phase with the third oscillating tank voltage;

generating, responsive to the fourth oscillating drive voltage, a fourth oscillating tank voltage having a phase leading by ninety degrees a phase of the fourth oscillating drive voltage; and generating, responsive to the fourth oscillating tank voltage, the first oscillating drive voltage in-phase with the fourth oscillating tank voltage.

- 14The eleventh preferred embodiment enables quadrature-related balanced oscillating signais to be generated in a low complexity manner.

In the tenth and eleventh preferred embodiment of the oscillator circuit, the first driver may comprise:

a first transistor having a drain coupled to a first power supply rail, a source coupled to an output of the first driver, and a gâte coupled to an input of the first driver by a first coupling capacitor, and a second transistor having a drain coupled to the output of the first driver, a source coupled to a second power supply rail, and a gâte coupled to the first power supply rail by a first resistor;

and the third driver may comprise:

a third transistor having a drain coupled to the first power supply rail, a source coupled to an output of the third driver, and a gâte coupled to an input of the third driver by a second coupling capacitor, and a fourth transistor having a drain coupled to the output of the third driver, and a source coupled to the first power supply rail by a second resistor;

wherein the gâte of the first transistor is coupled to a gâte of the fourth transistor, and the gâte of the third transistor is coupled to the gâte of the second transistor; and wherein the first, second, third and fourth transistors are n-channel complementary métal oxide silicon, CMOS, transistors.

The use of n-channel CMOS transistors, rather than p-channel CMOS transistors, for coupling the first and third tank circuits to the third power supply rail enables the transistors to be implemented with less integrated circuit chip area and less parasitic capacitance.

In a twelfth preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage, and the feedback stage may comprise:

a second driver arranged to generate a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

a second tank circuit arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of the second oscillating drive voltage;

a third driver arranged to generate a third oscillating drive voltage by applying signal inversion to the second oscillating tank voltage;

-15a third tank circuit arrangée! to generate, responsive to the third oscillating drive voltage, a third oscillating tank voltage having a phase lagging by ninety degrees a phase of the third oscillating drive voltage;

a fourth driver arranged to generate a fourth oscillating drive voltage by applying signal inversion to the third oscillating tank voltage;

a fourth tank circuit arranged to generate, responsive to the fourth oscillating drive voltage, a fourth oscillating tank voltage having a phase lagging by ninety degrees a phase of the fourth oscillating drive voltage; and a first driver arranged to generate the first oscillating drive voltage by applying signal inversion to the fourth oscillating tank voltage.

Likewise, a twelfth preferred embodiment of the method may comprise: generating, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage;

generating a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

generating, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of the second oscillating drive voltage;

generating a third oscillating drive voltage by applying signal inversion to the second oscillating tank voltage;

generating, responsive to the third oscillating drive voltage, a third oscillating tank voltage having a phase lagging by ninety degrees a phase of the third oscillating drive voltage;

generating a fourth oscillating drive voltage by applying signal inversion to the third oscillating tank voltage;

generating, responsive to the fourth oscillating drive voltage, a fourth oscillating tank voltage having a phase lagging by ninety degrees a phase of the fourth oscillating drive voltage; and generating the first oscillating drive voltage by applying signal inversion to the fourth oscillating tank voltage.

The twelfth preferred embodiment enables quadrature-related balanced oscillating signais to be generated in a low complexity manner.

In a thirteenth preferred embodiment of the oscillator circuit, the first tank circuit may be arranged to generate, responsive to the first oscillating drive voltage, the first

- 16oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage, and the feedback stage may comprise:

a second driver arranged to generate a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

a second tank circuit arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase leading by ninety degrees a phase of the second oscillating drive voltage;

a third driver arranged to generate a third oscillating drive voltage by applying signal inversion to the second oscillating tank voltage;

a third tank circuit arranged to generate, responsive to the third oscillating drive voltage, a third oscillating tank voltage having a phase leading by ninety degrees a phase of the third oscillating drive voltage;

a fourth driver arranged to generate a fourth oscillating drive voltage by applying signal inversion to the third oscillating tank voltage;

a fourth tank circuit arranged to generate, responsive to the fourth oscillating drive voltage, a fourth oscillating tank voltage having a phase leading by ninety degrees a phase of the fourth oscillating drive voltage; and a first driver arranged to generate the first oscillating drive voltage by applying signal inversion to the fourth oscillating tank voltage.

Likewise, a thirteenth preferred embodiment of the method may comprise: generating, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage;

generating a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

generating, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase leading by ninety degrees a phase of the second oscillating drive voltage;

generating a third oscillating drive voltage by applying signal inversion to the second oscillating tank voltage;

generating, responsive to the third oscillating drive voltage, a third oscillating tank voltage having a phase leading by ninety degrees a phase of the third oscillating drive voltage;

generating a fourth oscillating drive voltage by applying signal inversion to the third oscillating tank voltage;

-17generating, responsive to the fourth oscillating drive voltage, a fourth oscillating tank voltage having a phase leading by ninety degrees a phase of the fourth oscillating drive voltage; and generating the first oscillating drive voltage by applying signal inversion to the fourth oscillating tank voltage.

The thirteenth preferred embodiment enables quadrature-related balanced oscillating signais to be generated in a low complexity manner.

In the third, fifth, sixth, seventh, tenth and twelfth preferred embodiments of the oscillator circuit, the capacitive element may be coupled between the first drive node and the first tank output and the inductive element may be coupled between the first tank output and the first voltage rail.

In the first, second, fourth, eighth, ninth, eleventh and thirteenth preferred embodiments of the oscillator circuit, the inductive element may be coupled between the first drive node and the first tank output and the capacitive element may be coupled between the first tank output and the first voltage rail.

The third to ninth preferred embodiments may comprise a variable capacitance element coupled between the first tank output and the second tank output. This feature enables a frequency of oscillation to be varied.

In the tenth and eleventh preferred embodiments, the second driver may comprise: a fifth transistor having a· drain coupled to a third power supply rail, a source coupled to an output of the second driver, and a gâte coupled to an input of the second driver by a third coupling capacitor; and a sixth transistor having a drain coupled to the output of the second driver, a source coupled to a fourth power supply rail, and a gâte coupled to the third power supply rail by a third resistor;

the fourth driver may comprise:

a seventh transistor having a drain coupled to the third power supply rail, a source coupled to an output of the fourth driver, and a gâte coupled to an input of the fourth driver by a fourth coupling capacitor and an eighth transistor having a drain coupled to the output of the fourth driver, a source coupled to the fourth power supply rail, and a gâte coupled to the third power supply rail by a fourth resistor;

wherein the gâte of the fifth transistor may be coupled to the gâte of the eighth transistor, and the gâte of the seventh transistor may be coupled to the gâte of the sixth transistor; and

-18wherein the fifth, sixth, seventh and eighth transistors may be n-channel CMOS transistors.

The use of n-channel CMOS transistors, ratherthan p-channel CMOS transistors, for coupling the second and fourth tank circuits to the third power supply rail, and for coupling the fifth and seventh transistors to the fifth power supply rail, enables the transistors to be implemented with less integrated circuit chip area and less parasitic capacitance.

In the second and fifth to ninth preferred embodiments of the oscillator circuit, and their variants, the first tank circuit and the second tank circuit may hâve an equal résonance frequency. In the tenth to thirteenth preferred embodiments of the oscillator circuits, the first, second, third and fourth tank circuits may hâve an equal résonance frequency. These features enable high power efficiency.

In the second and fifth to ninth preferred embodiments of the oscillator circuit, and their variants, the first tank circuit and the second tank circuit may hâve an equal capacitance and an equal inductance. In the tenth to thirteenth preferred embodiments of the oscillator circuits, the first, second, third and fourth tank circuits may hâve an equal capacitance and an equal inductance. These features enable close matching of résonance frequencies.

There is also provided a wireless communication device comprising an oscillator circuit according to the first aspect.

Preferred embodiments are described, by way of example only, with reference to the accompanying drawings.

Brief Description of the Drawings

Figure 1 is a schematic diagram of a prior art oscillator.

Figure 2 is a schematic diagram illustrating the principle of operation of an oscillator employing voltage driven sériés résonance.

Figure 3 is a schematic diagram of an oscillator circuit.

Figures 4 to 8 are schematic diagrams illustrating different tank configurations of a tank circuit.

Figures 9 to 18 are schematic diagrams of oscillator circuits.

Figure 19 is a schematic diagram of drivers.

Figure 20 is a schematic diagram of an oscillator circuit having provision for tuning.

Figure 21 is a graph of phase noise as a function of frequency for the oscillator circuit described with reference to Figure 18.

- 19Figure 22 is a schematic diagram of a wireless communication apparatus.

Detailed Description of Preferred Embodiments

In the following description, an oscillatortopology is disclosed that employs sériés résonance between an inductor and a capacitor, rather than the parallel résonance of conventional oscillators, and in which the tank formed by the inductor and capacitor is voltage driven. The principle of operation of an oscillator circuit employing voltage driven, or voltage-mode, sériés résonance is described with référencé to Figure 2. Referring to Figure 2, an inductor, or inductive element, L and a capacitor, or capacitive element, C are coupled in sériés, and thereby constitute a tank circuit T, or resonator. The inductive element L is coupled between a voltage rail at ground potential, and a junction 1, and the capacitive element C is coupled between the junction 1 and a drive node 2. Therefore, the inductive element L and the capacitive C are coupled together at the junction 1. If a sinusoïdal drive, or excitation, voltage V_D= V_dd.sin(œt), where V_dd is a voltage supplied by a power supply node 5, ω is the résonance frequency in radians per second of the sériés coupled inductive element L and capacitive element C, and t is time, is applied at the drive node 2 by a voltage generator G, a tank voltage V_T=Q.V_dd. εϊη(ωί-π/2), where Q is the quality factor of the sériés coupled inductive element L and capacitive element C, is generated at the junction 1. Therefore, the amplitude of the tank voltage V_T is Q times the amplitude of the drive voltage V_D, and is shifted, that is, delayed, in phase by π/2 radians, that is, 90°, relative to the drive voltage V_D. Typically, for present-day integrated circuit processes, the quality factor Q can be ten, and therefore the tank voltage V_T can be high when the drive voltage V_D is small. It is not essential for the drive voltage V_D to be sinusoïdal, and alternative^ it may hâve, for example, a square or rectangular waveform, or an approximately square or rectangular waveform having finite rise and fall times.

For the voltage-mode sériés résonance oscillator illustrated in Figure 2, the amplitude of the tank voltage V_T, can be expressed as

k.U)L.V_dd/RsEQ = k.Q.V_B|_AS (2) where ωΙ_ is the impédance of the inductive element L at the résonance frequency ω, V_dd is the amplitude, determined by the power supply node 5, of the drive voltage V_D driving the sériés résonance, R_SEq is the équivalent sériés tank résistance, Q is the quality factor of the tank comprising the inductive element L and the capacitive element C, and k is a proportionality factor.

A comparison between équations (1) and (2) reveals significant différences between the voltage-mode sériés résonance oscillator and a current-mode parallel

-20résonance oscillator. In the current-mode parallel résonance oscillator, the oscillation amplitude is proportional to the bias current Ibias, and if the tank quality factor Q is high, that is, if the parallel tank résistance is high, the bias current Ibias is low. Furthermore, the power supply voltage of the current-mode parallel résonance oscillator limits the maximum oscillation amplitude. In the voltage-mode sériés résonance oscillator, if the tank quality factor Q is high, that is, the sériés tank résistance is low, the current drawn from a power supply is high, and the oscillation amplitude is also high, the tank quality factor Q being inversely proportional to the sériés tank résistance. Furthermore, in the voltage-mode sériés résonance oscillator, no straightforward limitation to the amplitude of the oscillation is imposed by the value of the power supply voltage V_dd, which enables a very high oscillation amplitude in the presence of a very low power supply voltage, if the tank quality factor Q is sufficiently high. This can enable a very low phase noise of the oscillator, albeit with a large current from the power supply.

Continuing with reference to Figure 2, the drive voltage V_D and the tank voltage V_T hâve a quadrature phase relationship, or, expressed more concisely, are in quadrature. In particular, the phase of the drive voltage V_D leads the phase of the tank voltage V_T by 90°. In other words, the phase of the drive voltage V_D lags the phase of the tank voltage V_T by 90°. However, alternative configurations of the tank may be used, as described below, in which different phase relationships apply between the drive voltage V_D and the tank voltage V_T. In a practical embodiment of an oscillator circuit employing the sériés résonance of a tank, the oscillator circuit itself can provide the drive voltage V_D. For example, the drive voltage V_D can be generated from the tank voltage V_T, or generated by switching on and off the power supply voltage V_dd. Where the drive voltage V_D is generated from the tank voltage V_T, it is necessary to ensure the required phase relationship between the tank voltage V_T and the drive voltage V_D for providing positive feedback to sustain oscillation.

Referring to Figure 3, an oscillator circuit 100 comprises a first tank circuit T1 and a feedback (FB) stage F. The first tank circuit T1 has a first drive node 12 at which a first oscillating drive voltage V_D1 is applied to the first tank circuit T1, and a first tank output 13 at which the first oscillating tank voltage V_Ti is delivered from the first tank circuit T1. The first tank circuit T1 of Figure 3 may hâve one of several alternative tank configurations, which are described below, of an inductive element L and a capacitive element C coupled in sériés between the first drive node 12 and a voltage rail 14. The feedback stage F has an input 17 coupled to the first tank output 13 for receiving the first oscillating tank voltage V_Ti, and an output 18 coupled to the first drive node 12 for delivering the first oscillating drive voltage V_D1 to the first drive node 12. The feedback stage F has one of several

-21 different feedback configurations as described below, and is arranged to generate, responsive to the first oscillating tank voltage V_T1, the first oscillating drive voltage V_D1 inphase with an oscillating tank current l_T flowing in the inductive element L and the capacitive element C between the first drive node 12 and the voltage rail 14, thereby causing the oscillator circuit 100 to oscillate in a sériés résonance mode of the inductive element L and the capacitive element C.

Tank configurations of the first tank circuit T1 are described with reference to Figures 4 to 8. In each of these tank configurations, the capacitive element C and the inductive element L are coupled in sériés between the first drive node 12 and the voltage rail 14, which may be at ground potential or another potential.

Referring to Figure 4, a first tank configuration of the first tank circuit T1 has the capacitive element C coupled between the first drive node 12 and a junction 11, and the inductive element L coupled between the junction 11 and the voltage rail 14. This first tank configuration, therefore, corresponds to the configuration of the tank circuit T illustrated in Figure 2. The junction 11 is coupled to the first tank output 13. In this first tank configuration, the first oscillating tank voltage V_T1 présent at the first tank output 13 has a phase that lags a phase of the first oscillating drive voltage V_Di by 90°.

Referring to Figure 5, a second tank configuration of the first tank circuit T1 has the inductive element L coupled between the first drive node 12 and the junction 11, and the capacitive element C coupled between the junction 11 and the voltage rail 14. The junction 11 is coupled to the first tank output 13. This second tank configuration, therefore, corresponds to the first tank configuration illustrated in Figure 4, but with the position of the inductive element L and the capacitive element C swapped. In this second tank configuration, the first oscillating tank voltage V_T1 has a phase that leads a phase of the first oscillating drive voltage V_D1 by 90°.

Referring to Figure 6, a third tank configuration of the first tank circuit T1 has a sensor device S coupled in sériés with the inductive element L and the capacitive element C between the first drive node 12 and the voltage rail 14. In particular, the sensor device S is coupled between the inductive element L and the capacitive element C, although in non-illustrated variants of the third tank configuration, the sensor device S may instead be coupled between the first drive node 12 and the capacitive element C, or between the inductive element L and the voltage rail 14. In further non-illustrated variants of the third tank configuration, the position of the inductive element L and the capacitive element C may be swapped, such that the sensor device S is coupled between the inductive element L and the capacitive element C, with the capacitive element C coupled between the voltage rail 14 and the sensor device S, and the inductive element L coupled between the

-22first drive node 12 and the sensor device S, or the sensor device S instead be coupled between the first drive node 12 and the inductive element L, or the sensor device S instead coupled between the voltage rail 14 and the capacitive element C. The oscillating tank current l_Tflows in response to the first oscillating drive voltage V_D1, and the sensor device S is arranged to generate the first oscillating tank voltage V_Ti responsive to the oscillating tank current l_T. in particular, in the third tank configuration illustrated in Figure 6, the sensor device S comprises a résistive element R, and the first tank output 13 comprises a pair of terminais 13a, 13b coupled to different terminais of the résistive element R. The oscillating tank current l_T flows through the résistive element R, thereby giving rise to the first oscillating tank voltage V_T1 across the résistive element R, and hence between the pair of terminais 13a, 13b. In those variants of the third tank configuration in which one of the terminais of the résistive element R is coupled directly to the voltage rail 14, rather than via the inductive element L or via the capacitive element C, the first tank output 13 may instead be coupled to only the other terminal of the résistive element R, that is not coupled directly to the voltage rail 14. The oscillating tank current l_T is in-phase with the first oscillating drive voltage V_Di, and the first oscillating tank voltage V_T1 is in-phase with the oscillating tank current l_T, and therefore is in-phase with the first oscillating drive voltage V_Di.

Referring to Figure 7, a fourth tank configuration of the first tank circuit T1 has a sensor device S coupled in sériés with the inductive element L and the capacitive element C between the first drive node 12 and the voltage rail 14. In particular, the sensor device S is coupled between the inductive element L and the capacitive element C, although the alternative positions of the sensor device S described above with reference to Figure 6 are also applicable to the sensor device S illustrated in the tank configuration of Figure 7. The oscillating tank current l_T flows in response to the first oscillating drive voltage V_Di, and the sensor device S illustrated in Figure 7 is arranged to generate the first oscillating tank voltage V_Ti responsive to the oscillating tank current l_T. In particular, in the fourth tank configuration illustrated in Figure 7, the sensor device S comprises a transformer X having a primary winding X_P coupled in sériés with the inductive element L and the capacitive element C between the first drive node 12 and the voltage rail 14, a secondary winding X_s coupled to a pair of terminais 13a, 13b of the first tank output 13, and a résistive element R coupled between the pair of terminais 13a, 13b in parallel with the secondary winding X_s. The résistive element R has a smaller résistance, for example one tenth or less, than the impédance of the secondary winding X_s at the frequency of oscillation. The oscillating tank current l_T flows through the primary winding X_P, thereby giving rise to an oscillating sensor current flowing in the secondary winding X_s. The

-23oscillating sensor current flows in the secondary winding X_s and the résistive element R, and hence gives rise to the first oscillating tank voltage V_T1 between the pair of terminais 13a, 13b. Optionally, one terminal of the pair of terminais 13a, 13b may be coupled to the voltage rail 14, or to another voltage rail, in which case the first tank output 13 may instead comprise a single one of the terminais of the pair of terminais 13a, 13b. The oscillating tank current l_T is in-phase with the first oscillating drive voltage V_Di, and consequently the oscillating sensor current flowing in the secondary winding X_s and the résistive element R is in-phase with the oscillating tank current l_T and the first oscillating drive voltage V_D1. Flow of the oscillating sensor current in the résistive element R gives rise to the first oscillating tank voltage V_T1 in-phase with the oscillating sensor current. Therefore, the first oscillating tank voltage V_Ti at the first tank output 13 is in-phase with the oscillating tank current l_T, and therefore is in-phase with the first oscillating drive voltage V_D1. In a variation of the fourth tank configuration described with reference to Figure 7, the résistive element R may be replaced by a trans-resistance amplifier having inputs coupled to respective terminais of the secondary winding X_s, instead of the secondary winding X_s being coupled directly to the pair of terminais 13a, 13b of the first tank output 13, and an output of the trans-resistance amplifier coupled to the first tank output 13, or the pair of terminais 13a, 13b of the first tank output 13.

Referring to Figure 8, a fifth tank configuration of the first tank circuit T1 comprises the inductive element L and the capacitive element C arranged as illustrated in Figure 4, or alternatively they may be arranged as illustrated in Figure 5. The first tank circuit T1 of Figure 8 further comprises a sensor device S magnetically coupled to the inductive element L. In particular, the inductive element L and a coil M of the sensor device S are coupled magnetically thereby forming a transformer Y, with the inductive element L being a primary winding of the transformer Y and the coil M being a secondary winding of the transformer Y. The coil M is coupled to a pair of terminais 13a, 13b of the first tank output 13, and a résistive element R is coupled between the pair of terminais 13a, 13b in parallel with the coil M. The résistive element R has a smaller résistance, for example one tenth or less, than the impédance of the coil M at the frequency of oscillation. In response to the first oscillating drive voltage V_D1, the oscillating tank current l_T flows through the inductive element L, thereby giving rise to an oscillating sensor current flowing in the coil M. The oscillating sensor current flows in the coil M and the résistive element R, and hence gives rise to the first oscillating tank voltage V_Ti between the pair of terminais 13a, 13b. Therefore, the sensor device S of Figure 8 is arranged to generate the first oscillating tank voltage V_Ti responsive to the oscillating tank current l_T by magnetic induction. Optionally, one terminal of the pair of terminais 13a, 13b may be coupled to the

-24voltage rail 14, or to another voltage rail, in which case the first tank output 13 may instead comprise a single one of the terminais of the pair of terminais 13a, 13b. The oscillating tank current l_T is in-phase with the first oscillating drive voltage V_D1, and consequently the oscillating sensor current flowing in the coil M and the résistive element R is in-phase with the oscillating tank current l_T and the first oscillating drive voltage V_D1. Flow of the oscillating sensor current in the résistive element R gives rise to the first oscillating tank voltage V_Ti in-phase with the oscillating sensor current. Therefore, the first oscillating tank voltage V_T1 at the first tank output 13 is in-phase with the oscillating tank current l_T, and therefore is in-phase with the first oscillating drive voltage V_Di. In a variation of the fifth tank configuration described with référencé to Figure 8, the résistive element R may be replaced by a trans-resistance amplifier having inputs coupled to respective terminais of the coil M, instead of the coil M being coupled directly to the pairof terminais 13a, 13b of the first tank output 13, and an output of the trans-resistance amplifier coupled to the first tank output 13, or the pair of terminais 13a, 13b of the first tank output 13.

In a modified version of the third, fourth or fifth tank configurations, or their variants described above, connections of the sensor S to the pair of terminais 13a, 13b may be swapped, thereby inverting the first oscillating tank voltage V_T-|, or, equivalently, modifying the phase of the first oscillating tank voltage V_T1 by 180°. In this case, although the oscillating tank current l_T is in-phase with the first drive voltage V_D1, the first oscillating tank voltage V_Ti is 180° out-of-phase with the oscillating tank current l_T, and therefore is 180° out-of-phase with the first oscillating drive voltage V_D1.

Embodiments of the oscillator circuit 100 comprising the different tank configurations of the first tank circuit T1 described with référencé to Figures 4 to 8, and having different feedback configurations of the feedback stage F, are described below with référencé to Figures 9 to 19. Some of these embodiments comprise a second tank circuit T2, in addition to the first tank circuit T1, and some of these embodiments further comprise a third tank circuit T3 and fourth tank circuit T4, in addition to the first and second tank circuits T1, T2. Such second, third and fourth tank circuits T2, T3, T4 may each hâve a tank configuration corresponding to one of the first to fifth tank configurations described with référencé to Figures 4 to 8, and therefore hâve respective second, third and fourth drive nodes referenced 22, 32, 42 at which respective second, third and fourth oscillating drive voltages V_D2, V_D3, V_D4 are applied, and respective second, third and fourth tank outputs referenced 23, 33, 43 at which respective second, third and fourth oscillating tank voltages V_T2, V_T3, V_T4 are delivered.

-25The particular tank configurations which each of the first, second, third and fourth tank circuits T1, T2, T3, T4 may hâve is dépendent on whether the respective tank circuit is required to generate the respective oscillating tank voltage in-phase with, or leading by a phase of 90°, or lagging by a phase of 90°, or is 180° out-of-phase with, the respective first, second, third and fourth oscillating drive voltages V_D1, V_D2, V_D3, V_D4. In particular, where the first, second, third or fourth tank circuit T1, T2, T3, T4 is required to generate the respective first, second, third or fourth oscillating tank voltage V_Ti, V_T2, V_T3, V_T4 having a phase that lags by 90° a phase of the respective first, second, third or fourth oscillating drive voltage, the first, second, third or fourth tank circuit T1, T2, T3, T4 may hâve the first tank configuration described with reference to Figure 4. Where the first, second, third or fourth tank circuit T1, T2, T3, T4 is required to generate the respective first, second, third or fourth oscillating tank voltage V_T1, V_T2, V_T3, V_T4 having a phase that leads by 90° a phase of the respective first, second, third or fourth oscillating drive voltage, the first, second, third or fourth tank circuit T1, T2, T3, T4 may hâve the second tank configuration described with reference to Figure 5. Where the first, second, third or fourth tank circuit T1, T2, T3, T4 is required to generate the respective first, second, third or fourth oscillating tank voltage V_T1, V_T2, V_T3, V_T4 in-phase with the respective first, second, third or fourth oscillating drive voltage V_D-|, V_D2, V_D3, V_D4, the first, second, third or fourth tank circuit T1, T2, T3, T4 may hâve any of the third, fourth or fifth tank configuration, or their variants, described with reference to Figures 6, 7 and 8. Where the first, second, third or fourth tank circuit T1, T2, T3, T4 is required to generate the respective first, second, third or fourth oscillating tank voltage V_Ti, V_T2, V_T3, V_T4 180° out-of-phase with the respective first, second, third or fourth oscillating drive voltage V_D1, V_D2, V_D3, V_D4, the first, second, third or fourth tank circuit T1, T2, T3, T4 may hâve the modified version of any of the third, fourth or fifth tank configurations, or their variants, described with reference to Figures 6, 7 and 8.

Although the first to fifth tank configurations described with reference to Figures 4 to 8 hâve the same voltage rail 14, any or ail of the first, second, third or fourth tank circuit T1, T2, T3, T4 may hâve different voltage rails providing different voltages.

Referring to Figure 9, in a first preferred embodiment, an oscillator circuit 110 comprises the first tank circuit T1 and the feedback stage F as described in relation to the oscillator circuit 100 of Figure 3, the feedback stage F having a first feedback configuration in which the feedback stage F comprises a first driver D1 coupled in sériés between the input 17 of the feedback stage F and the output 18 of the feedback stage F. The first tank circuit T1 generates the first oscillating tank voltage V_Ti at the first tank output 13 in response to the first oscillating drive voltage V_Di applied at the first drive node

-2612. The first tank output 13 is coupled to the input 17 of the feedback stage F, and the first drive node 12 is coupled to the output 18 of the feedback stage F. In the first preferred embodiment, the first tank circuit T1 generates the first oscillating tank voltage V_T1 in-phase with the first oscillating drive voltage V_D1, and therefore may hâve any of the third, fourth or frfth tank configurations, or their variants, described above with reference to Figures 6, 7 or 8. The first driver D1 generates the first oscillating drive voltage V_D1 in response to, and in-phase with, the first oscillating tank voltage V_T1, so does not introduce any phase change, which is signified by “0°” in the Figures. The first driver D1 may hâve positive and négative input terminais, in otherwords, a differential input, coupled to the pair of terminais 13a, 13b of the first tank output 13.

In a variant of the oscillator circuit 110 described with reference to Figure 9, the first tank circuit T1 generates the first oscillating tank voltage Vn 180° out-of-phase with the first oscillating drive voltage V_Di, and therefore may hâve any of the modified third, fourth orfifth tank configurations, or their variants, described above with reference to 15 Figures 6, 7 or 8, and the first driver D1 applies signal inversion to the first oscillating tank voltage V_Ti, thereby introducing a phase change of 180°, such that the first oscillating drive voltage V_D-| is 180° out-of-phase with the first oscillating tank voltage V_T1, as required to sustain oscillation.

In some applications, an oscillator circuit is required that generates a differential or 20 balanced oscillating signal, that is, generates a pair of signais where one signal, also referred to as a first signal component, is the inverse of the other signal, or second signal component.

Referring to Figure 10, in a second embodiment, an oscillator circuit 115 generates such a balanced oscillating signal, and comprises the first tank circuit T1 and the feedback 25 stage F as described in relation to the oscillator circuit 100 of Figure 3, the feedback stage F having a second feedback configuration. In the second feedback configuration, the feedback stage F comprises a second tank circuit T2 having a second drive node 22 for applying a second oscillating drive voltage V_D2 to the second tank circuit T2, and a second tank output 23 for delivering a second oscillating tank voltage V_T2 from the second tank 30 circuit T2. The second tank output 23 is coupled to the output 18 of the feedback stage F via a first driver D1, and the second drive node 22 is coupled to the input 17 of the feedback stage F via a second driver D2. The first tank circuit T1 generates the first oscillating tank voltage V_T1 at the first tank output 13 in response to, and in-phase with, the first oscillating drive voltage V_Di applied at the first drive node 12. The second driver D2 35 generates the second oscillating drive voltage V_D2180° out-of-phase with the first oscillating tank voltage V_T1 by applying signal inversion, or in other words inverting, the

-27first oscillating tank voltage V_Ti. The second tank circuit T2 generates a second oscillating tank voltage V_T2 at the second tank output 23 in response to, and in-phase with, the second oscillating drive voltage V_D2 applied at the second drive node 22. The first driver D1 generates the first oscillating drive voltage V_D1 180° out-of-phase with the second oscillating tank voltage V_T2 by applying signal inversion the second oscillating tank voltage V_T2. Therefore, the first oscillating drive voltage V_D1 is generated in response to, and inphase with, the first oscillating tank voltage V_T1, as required to sustain oscillation. The second oscillating tank voltage V_T2 is 180° out-of-phase with respect to the first oscillating tank voltage V_T-|, and consequently the first and second oscillating tank voltages V_T1, V_T2 are available to be used as first and seconds signal components of a balanced oscillating signal.

In a first variant of the oscillator circuit 115 described with reference to Figure 10, the first tank circuit T1 generates the first oscillating tank voltage V_T1 180° out-of-phase with the first oscillating drive voltage V_Di, and the second driver D2 does not apply signal inversion to the first oscillating tank voltage V_Ti, such that the first oscillating drive voltage V_D1 is 180° out-of-phase with the first oscillating tank voltage V_T1.

In a second variant of the oscillator circuit 115 described with reference to Figure 10, the first tank circuit T1 generates the first oscillating tank voltage V_T1 180° out-ofphase with the first oscillating drive voltage V_Di, the second driver D2 does not apply signal inversion to the first oscillating tank voltage V_T1, whereby the second oscillating drive voltage V_D2 is in-phase with the first oscillating tank voltage V_T-|, the second tank circuit T2 generates the second oscillating tank voltage V_T2180° out-of-phase with the second oscillating drive voltage V_D2, and the first driver does not apply signal inversion to the second oscillating tank voltage V_T2, with the resuit that the first oscillating drive voltage V_D1 is 180° out-of-phase with the first oscillating tank voltage V_Ti- Therefore, the second oscillating tank voltage V_T2 is 180° out-of-phase with respect to the first oscillating tank voltage V_T1, and consequently the first and second oscillating tank voltages V_Ti, V_T2 may be used as first and second signal components of a balanced oscillating signal.

In some applications, an oscillator circuit is required that generates a pair of oscillating signais that hâve a quadrature relationship, that is, differ in phase by 90°. Such an oscillator circuit has application in, for example, local oscillator signal génération in wireless communication apparatus. For the oscillator circuit 115, and its first and second variants, described with reference to Figure 10, the phase relationship of the first and second oscillating tank voltages V_T1, V_T2 has been described, as this phase relationship is relevant to ensuring positive feedback to sustain oscillation, and also as these oscillating voltages may be used by an external apparatus. Alternatively, external apparatus may

-28employ oscillating voltages generated at other locations in the respective first and second tank circuits T1, T2, and such oscillating voltages may hâve a different phase than that of the first and second oscillating tank voltages V_T1, V_T2. For example, where the first and second tank circuits T1, T2 hâve any of the tank configurations described with référencé to Figures 6, 7 and 8, an external apparatus may employ an oscillating voltage generated at the following locations: in tank configuration of Figures 6 and 7, a junction 15 between the capacitive element C and the sensor S, or a junction 19 between the inductive element L and the sensor S; in the tank configuration of Figure 8, the junction 11 between the capacitive element and the inductive element. Therefore, depending on the choice of tank configurations and their variants, which need not be the same for both the first and second tank circuits T1, T2, external apparatus may employ oscillating voltages that lead or lag the first and second oscillating tank voltages V_T-|, V_T2 by 90°, and, in particular, oscillating voltages having a quadrature relationship may be provided.

Referring to Figure 11, in a third embodiment, an oscillator circuit 120 comprises the first tank circuit T1 and the feedback stage F as described in relation to the oscillator circuit 100 of Figure 3, the feedback stage F having a third feedback configuration. The first tank circuit T1 generates at the first tank output 13, in response to the first oscillating drive voltage V_D1 présent at the first tank input 12, the first oscillating tank voltage V_T1 having a phase lagging a phase of the first oscillating drive voltage V_D1 by 90°. In the third feedback configuration, the feedback stage F comprises a phase shift stage P arranged for applying a phase lag of 90°, and a first driver D1. The phase shift stage P is coupled to the input 17 of the feedback stage F for receiving the first oscillating tank voltage V_T1 from the first tank circuit T1. The phase shift stage P generates, at an output 14 of the phase shift stage P, and responsive to the first oscillating tank voltage V_T1, a first intermediate oscillating voltage V_h having a phase lagging by 90° a phase of the first oscillating tank voltage V_T1. The output 14 of the phase shift stage P is coupled to the output 18 of the feedback stage F via the first driver D1 which generates, responsive to the first oscillating intermediate voltage V», the first oscillating drive voltage V_D1 by applying signal inversion to the first intermediate oscillating voltage Vu. Due to the 90° phase shift provided by the first tank circuit T1, the 90° phase shift provided by the phase shift stage P, and the inversion provided by the first driver D1, corresponding to a phase shift of 180°, the first oscillating drive voltage V_D1 has a phase that leads the phase of the first oscillating tank voltage V_T1 by 90°, as required to sustain oscillation. The first oscillating tank voltage V_T1 and the first intermediate oscillating voltage V_M differ in phase by 90°, and therefore are available as quadrature-related oscillating signais.

-29Referring to Figures 12, in a fourth embodiment, an oscillator circuit 130 is identical to the third embodiment described with reference to Figure 11, except that the first tank circuit T1 is arranged to generate at the first tank output 13, in response to the first oscillating drive voltage V_D-| présent at the first tank input 12, the first oscillating tank voltage V_T-| having a phase leading a phase of the first oscillating drive voltage V_Di by 90°, and the first driver D1 does not apply signal inversion but generates, responsive to the first oscillating intermediate voltage Vu, the first oscillating drive voltage V_D-| in-phase with the first intermediate oscillating voltage V_H, with the resuit that the first oscillating drive voltage V_D1 has a phase that leads the phase of the first oscillating tank voltage V_T1 by 90°, as required to sustain oscillation. The first oscillating tank voltage V_T1 and the first intermediate oscillating voltage V_H differ in phase by 90°, and therefore are available as quadrature-related oscillating signais.

Referring to Figure 13, a fifth embodiment, an oscillator circuit 140 comprises the first tank circuit T1 and the feedback stage F as described in relation to the oscillator circuit 100 of Figure 3, the feedback stage F having a fourth feedback configuration. The first tank circuit T1 generates at the first tank output 13, in response to the first oscillating drive voltage V_D1 présent at the first tank input 12, the first oscillating tank voltage V_T1 having a phase lagging a phase of the first oscillating drive voltage V_D1 by 90°. In the third feedback configuration, the feedback stage F comprises a first phase shift circuit P1, a second phase shift circuit P2, a first driver D1, a second driver D2, and a second tank circuit T2. The first phase shift circuit P1 is coupled to the input 17 of the feedback stage F, and generates at an output 15 of the first phase shift circuit P1, responsive to the first oscillating tank voltage V_Ti, a first intermediate oscillating voltage V_M hâve a phase that lags the phase of the first oscillating tank voltage Vn by 90°. The output 15 of the first phase shift circuit P1 is coupled to a second drive node 22 of the second tank circuit T2 via the second driver D2 which generates, responsive to the first intermediate oscillating voltage V_n, a second oscillating drive voltage V_D2 in-phase with the first intermediate oscillating voltage Vn. The second oscillating drive voltage V_D2 is delivered to the second drive node 22. The second tank circuit T2 generates at a second tank output 23, in response to the second oscillating drive voltage V_D2, a second oscillating tank voltage V_T2 having a phase lagging a phase of the second oscillating drive voltage V_D2 by 90°. The second phase shift circuit P2 is coupled to the second tank output 23 of the second tank circuit T2, and generates at an output 16 of the second phase shift circuit P2, responsive to the second oscillating tank voltage V_T2, a second intermediate oscillating voltage V_i2 having a phase that lags the phase of the second oscillating tank voltage V_T2 by 90°. The output 16 of the second phase shift circuit P2 is coupled to the output 18 of the feedback

-30stage F via the first driver D1 which generates, responsive to the second intermediate oscillating voltage V|₂, the first oscillating drive voltage V_D1 in-phase with the second intermediate oscillating voltage V|₂. The first and second oscillating tank voltages V_T1, V_T2 differ in phase by 180°, and so may be used as first and second signal components of a balanced oscillating signal. The first oscillating drive voltage V_D-| delivered from the output 18 of the feedback stage F has a phase that lags the phase of the first oscillating tank voltage V_T1 by 270°, or equivalently leads the phase of the first oscillating tank voltage V_Ti by 90°, as required to sustain oscillation.

Referring to Figures 14, in a sixth embodiment, an oscillator circuit 150 is identical to the fifth embodiment described with reference to Figure 13, except that the second driver D2 applies signal inversion to the first oscillating intermediate voltage V_M, such that the second oscillating drive V_D2 generated by the second driver D2 is 180° out-of-phase with respect to the first oscillating intermediate voltage Vu, and second tank circuit T2 is arranged to generate at the second tank output 23, in response to the second oscillating drive voltage V_D2 présent at the second tank input 22, the second oscillating tank voltage V_T2 having a phase that lags a phase of the second oscillating drive voltage V_D2 by 90°. Consequently, the first and second oscillating tank voltages V_T1, V_T2 differ in phase by 180°, and so may be used as first and second signal components of a balanced oscillating signal, and the first oscillating drive voltage V_D1 has a phase that leads the phase of the first oscillating tank voltage V_T1 by 90°, as required to sustain oscillation.

Referring to Figure 15, in a seventh embodiment, an oscillator circuit 160 generates a pair of signais that hâve a quadrature relationship, and comprises the first tank circuit T1 and the feedback stage F as described in relation to the oscillator circuit 100 of Figure 3, the feedback stage F having a fifth feedback configuration. The first tank circuit T1 generates the first oscillating tank voltage V_T1 at the first tank output 13 in response to, the first oscillating drive voltage V_D1 applied at the first drive node 12, and having a phase that lags a phase of the first oscillating drive voltage V_D1 by 90°. In the fifth feedback configuration, the feedback stage F comprises a second tank circuit T2 having a second drive node 22 for applying a second oscillating drive voltage V_D2 to the second tank circuit T2, and a second tank output 23 for delivering a second oscillating tank voltage V_T2 from the second tank circuit T2. The second tank output 23 is coupled to the output 18 of the feedback stage F via a first driver D1, and the second drive node 22 is coupled to the input 17 of the feedback stage F via a second driver D2. The second driver D2 generates the second oscillating drive voltage V_D2180° out-of-phase with the first oscillating tank voltage V_T1 by applying signal inversion the first oscillating tank voltage V_T1. The second tank circuit T2 generates a second oscillating tank voltage V_T2 at the

-31 second tank output 23 in response to the second oscillating drive voltage V_D2 applied at the second drive node 22, and having a phase that lags a phase of the second oscillating drive voltage V_D2 by 90°. The first driver D1 generates the first oscillating drive voltage V_D1 in response to, and in-phase with, the second oscillating tank voltage V_T2. Therefore, the first oscillating drive voltage V_D1 is generated in response to, and in-phase with, the first oscillating tank voltage V_T1, as required to sustain oscillation. The second oscillating tank voltage V_T2 is 180° out-of-phase with respect to the first oscillating tank voltage V_T1, and consequently the first and second oscillating tank voltages V_T-|, V_T2 are available to be used as first and seconds signal components of a balanced oscillating signal.

Referring to Figure 16, in an eighth embodiment, an oscillator circuit 170 is identical to the seventh embodiment described with référencé to Figure 15, except that the first tank circuit T1 generates the first oscillating tank voltage V_T1 having a phase that leads a phase of the first oscillating drive voltage V_Di by 90°, and the second tank circuit T2 generates a second oscillating tank voltage V_T2 having a phase that leads a phase of the second oscillating drive voltage V_D2 by 90°. Therefore, the first and second oscillating tank voltages V_T1, V_T2 differ in phase by 90°, so hâve a quadrature relationship, and the first oscillating drive voltage V_D1 has a phase that lags the phase of the first oscillating tank voltage V_Ti by 90°, as required to sustain oscillation.

Referring to Figure 17, in a ninth embodiment, an oscillator circuit 180 is identical to the seventh embodiment described with référencé to Figure 15, except that the first tank circuit T1 generates the first oscillating tank voltage V_T1 having a phase that leads a phase of the first oscillating drive voltage V_D1 by 90°, and the second driver D2 does not apply signal inversion, such that the second oscillating drive voltage V_D2 is in-phase with the first oscillating tank voltage V_T1. Again, the first and second oscillating tank voltages Vt-i, V_T2 differ in phase by 90°, so hâve a quadrature relationship, and the first oscillating drive voltage V_D1 has a phase that lags the phase of the first oscillating tank voltage V_Ti by 90°, as required to sustain oscillation.

In some applications, an oscillator circuit is required that generates a pair of signais that hâve a quadrature relationship, that is, differ in phase by 90°, and where both of the signais are required to be balanced, both having first and second signal components. In this case, four signal components are required having phases 0°, 90°, 180° and 270°. Such an oscillator circuit has application in, for example, local oscillator signal génération in wireless communication apparatus.

Referring to Figure 18, in a tenth embodiment, an oscillator circuit 190 generates balanced quadrature-related oscillating signais, and comprises the first tank circuit T1 and the feedback stage F as described in relation to the oscillator circuit 100 of Figure 3, the

-32feedback stage F having a sixth feedback configuration. The first tank circuit T1 generates the first oscillating tank voltage V_n at the first tank output 13 in response to, the first oscillating drive voltage V_D1 applied at the first drive node 12, and having a phase that lags a phase of the first oscillating drive voltage V_D1 by 90°. In the sixth feedback configuration, the feedback stage F comprises a second tank circuit T2 having a second drive node 22 for applying a second oscillating drive voltage V_D2 to the second tank circuit T2 and a second tank output 23 for delivering a second oscillating tank voltage V_T2 from the second tank circuit T2, a third tank circuit T3 having a third drive node 32 for applying a third oscillating drive voltage V_D3 to the third tank circuit T3 and a third tank output 33 for delivering a third oscillating tank voltage V_T3 from the third tank circuit T3, and a fourth tank circuit T4 having a fourth drive node 42 for applying a fourth oscillating drive voltage V_D4 to the fourth tank circuit T4, and a fourth tank output 43 for delivering a fourth oscillating tank voltage V_T4 from the fourth tank circuit T4. The feedback stage F also comprises a first driver D1 having an input 703 coupled to the fourth tank output 43 and an output 704 coupled to the output 18 of the feedback stage F and thereby to the first drive node 12, a second driver D2 having an input 707 coupled to the input 17 of the feedback stage F and thereby to the first tank output 13, and an output 708 coupled to the second drive node 22, a third driver D3 having an input 733 coupled to the second tank output 23 and an output 734 coupled to the third drive node 32, and a fourth driver D4 having an input 737 coupled to the third tank output 33 and an output 738 coupled to the fourth drive node 42. The first driver D1 generates the first oscillating drive voltage V_D1 responsive to, and in-phase with, the fourth oscillating tank voltage V_T4. The second driver D2 generates the second oscillating drive voltage V_D2 responsive to, and in-phase with, the first oscillating tank voltage V_Ti. The third driver D3 generates the third oscillating drive voltage V_D3 responsive to, and in-phase with, the second oscillating tank voltage V_T2. The fourth driver D4 generates the fourth oscillating drive voltage V_D4 responsive to, and inphase with, the third oscillating tank voltage V_T3. The second oscillating tank voltage V_T2 has a phase that lags the phase of the first oscillating tank voltage V_T1 by 90°, the third oscillating tank voltage V_T3 has a phase that lags the phase of the second oscillating tank voltage V_T2 by 90°, and the fourth oscillating tank voltage V_T4 has a phase that lags the phase of the third oscillating tank voltage V_T3 by 90°, thereby providing two quadraturerelated balanced oscillating signais. The first oscillating drive voltage V_D1 leads the first oscillating tank voltage V_T1 by 90°, as required to sustain oscillation.

A first variant of the oscillator circuit 190 described with reference to Figure 18 differs from the oscillator circuit 190 in that each of the first, second, third and fourth drivers D1, D2, D3, D4 provide signal inversion, such that the second oscillating drive

-33voltage V_D2 is 180° out-of-phase with the first oscillating tank voltage V_T1, the third oscillating drive voltage V_D3 is 180° out-of-phase with the second oscillating tank voltage V_T2, the fourth oscillating drive voltage V_D4 is 180° out-of-phase with the third oscillating tank voltage V_T3, and the first oscillating drive voltage V_Di is 180° out-of-phase with the fourth oscillating tank voltage V_T4.

A second variant of the oscillator circuit 190 described with reference to Figure 18 differs from the oscillator 190 in that the first tank circuit T1 generates the first oscillating tank voltage V_Ti having a phase that leads the phase of the first oscillating drive voltage V_D1 by 90°, the second tank circuit T2 generates the second oscillating tank voltage V_T2 having a phase that leads the phase of the second oscillating drive voltage V_D2 by 90°, the third tank circuit T3 generates the third oscillating tank voltage V_T3 having a phase that leads the phase of the third oscillating drive voltage V_D3 by 90°, and the fourth tank circuit T4 generates the fourth oscillating tank voltage V_T4 having a phase that leads the phase of the fourth oscillating drive voltage V_D4 by 90°.

A third variant of the oscillator circuit 190 described with reference to Figure 18 differs from the oscillator circuit 190 in that each of the first, second, third and fourth drivers D1, D2, D3, D4 provide signal inversion, such that the second oscillating drive voltage V_D2 is 180° out-of-phase with the first oscillating tank voltage V_Ti, the third oscillating drive voltage V_D3 is 180° out-of-phase with the second oscillating tank voltage V_T2, the fourth oscillating drive voltage V_D4 is 180° out-of-phase with the third oscillating tank voltage V_T3, and the first oscillating drive voltage V_D1 is 180° out-of-phase with the fourth oscillating tank voltage V_T4. In addition, the first tank circuit T1 generates the first oscillating tank voltage V_T1 having a phase that leads the phase of the first oscillating drive voltage V_D1 by 90°, the second tank circuit T2 generates the second oscillating tank voltage V_T2 having a phase that leads the phase of the second oscillating drive voltage V_D2 by 90°, the third tank circuit T3 generates the third oscillating tank voltage V_T3 having a phase that leads the phase of the third oscillating drive voltage V_D3 by 90°, and the fourth tank circuit T4 generates the fourth oscillating tank voltage V_T4 having a phase that leads the phase of the fourth oscillating drive voltage V_D4 by 90°.

Each of the first, second and third variants of the oscillator circuit 190 described with reference to Figure 18 generates balanced quadrature-related oscillating signais.

Referring to Figure 19, there is illustrated a preferred embodiment of the first, second, third and fourth drivers D1, D2, D3, D4 of the oscillator circuit 190 illustrated in, and described with reference to, Figure 18. The first driver D1 comprises first and second transistors N1, N2 which are n-channel CMOS transistors. The first transistor N1 has a

-34drain N1d coupled to a first power supply rail 70 supplying a power supply voltage V_dd1, a gâte N1g coupled to the input 703 of the first driver D1 by a first coupling capacitor C_b1) and a source N1 s coupled to the output 704 of the first driver D1. The second transistor N2 has a drain N2d coupled to the output 704 of the first driver D1, a source coupled to a second power supply rail 71 supplying a power supply voltage V_ss1, and a gâte N2g coupled to the first power supply rail 70 by a first resistor R1 for biasing. The third driver D3 comprises third and fourth transistors N3, N4 which are n-channel CMOS transistors. The third transistor N3 has a drain N3g coupled to the first power supply rail 70, a gâte N3g coupled to the third driver D3. The fourth transistor N4 has a drain N4d coupled to the output 734 of the first driver D1, a source N4s coupled to the second power supply rail 71, and a gâte N4g coupled to the first power supply rail 70 by a second resistor R2 for biasing.

Continuing to refer to Figure 19, the second driver D2 comprises fifth and sixth transistors N5, N6 which are n-channel CMOS transistors. The fifth transistor N5 has a drain N5d coupled to a third power supply rail 72 supplying a power supply voltage V_dd2, which may be the same as the power supply voltage V_dd1, a gâte N5g coupled to the input 707 of the second driver D2 by a third coupling capacitor C_b3, and a source N5s coupled to the output 708 of the second driver D2. The sixth transistor N6 has a drain N6d coupled to the output 708 of the second driver D2, a source coupled to a fourth power supply rail 73 supplying a power supply voltage V_ss2, which may be the same as the power supply voltage V_ss1, and a gâte N6g coupled to the third power supply rail 72 by a third resistor R3 for biasing. The fourth driver D4 comprises seventh and eighth transistors N7, N8 which are n-channel CMOS transistors. The seventh transistor N7 has a drain N7g coupled to the second power supply rail 72, a gâte N7g coupled to the input 737 of the fourth driver D4, and a source N7s coupled to the output 738 of the fourth driver D4. The eighth transistor N8 has a drain N8d coupled to the output 738 of the fourth driver D4, a source N8s coupled to the fourth power supply rail 73, and a gâte N8g coupled to the third power supply rail 72 by a fourth resistor R4 for biasing.

The first coupling capacitor C_b1, in conjunction with non-illustrated parasitic capacitances of the gates N1g and N4g of, respectively, the first and fourth transistors N1, N4, form a capacitive voltage divider to reduce the amplitude of the voltage applied, in response to the fourth oscillating tank voltage V_T4 présent at the input 703 of the first driver D1, to the gates N1g and N4g of, respectively, the first and fourth transistors N1, N4 to a tolerable value. Likewise, the second coupling capacitor C_b2, in conjunction with nonillustrated parasitic capacitances of the gates N2g and N3g of, respectively, the second and third transistors N2, N3, form a capacitive voltage divider to reduce the amplitude of

-35the voltage applied, in response to the second oscillating tank voltage V_T2 présent at the input 733 of the third driver D3, to the gates N2g and N3g of, respectively, the second and third transistors N2, N3 to a tolerable value. Similarly, the third and fourth coupling capacitors C_b3, C_b4 perform a corresponding rôle to reduce the amplitude ofthe voltages applied to the gates N5g, N6g, N7g, N8g ofthefifth, sixth, seventh and eighth transistors N5, N6, N7, N8.

In those described embodiments ofthe oscillatorcircuitwhich comprise more than one tank circuit, the tank circuits hâve an equal, or substantially the same, résonance frequency, for example within 5%. This contributes to high power efficiency. In particular, their respective inductive éléments may hâve an equal, or substantially the same, inductance, and their respective capacitive éléments may hâve an equal, or substantially the same, capacitance.

Each of the first, second, third and fourth drivers D1, D2, D3, D4 may be linear or non-linear amplifiers, but preferably, for high power efficiency, are arranged to switch, dépendent on the voltage at their respective inputs relative to a threshold, altematively between two different voltage levels, which typically are power supply voltages. Therefore, the respective first, second, third and fourth oscillating drive voltages V_D1, V_D2, V_D3, V_d4 may hâve a square or rectangular waveform, or an approximately square or rectangular waveform having finite rise and fall times. The first, second, third and fourth drivers D1, D2, D3, D4 are arranged to deliver power to the respective first, second, third and fourth tank circuits T1, T2, T3, T4 in orderto sustain oscillation. Although embodiments ofthefirst, second, third and fourth drivers D1, D2, D3, D4 hâve been described with reference to Figure 19 in relation to the oscillator circuit 190 described with référencé to Figure 18, and its variants, these embodiments may be employed also in other of the disclosed oscillator circuits. Moreover, although embodiments of the first, second, third and fourth drivers D1, D2, D3, D4 hâve been described which comprise solely n-channel CMOS transistors, this is not essential, and variants comprising pchannel CMOS transistors and n-channel CMOS transistors may be employed instead.

Optionally, provision for tuning the frequency of oscillation may be added to the disclosed oscillator circuits. For example, Figure 20 illustrâtes the oscillator circuit 160 described with reference to Figure 15, but with additional provision for tuning comprising a variable capacitance element C_v coupled to the first tank output 13 via a first additional capacitor C_x, and coupled to the second tank output 23 via a second additional capacitor C_y. The first and second additional capacitors C_x, C_y are included to attenuate the first and second oscillating tank voltages V_T1, V_T2 applied to the variable capacitance element C_v to a value that is tolerable by the variable capacitance element C_v. Depending on the

-36voltage level that can be tolerated by the variable capacitance element C_v, the first and second additional capacitors C_x, C_y may be omitted, with the variable capacitance element C_v instead being coupled directly to the first and second tank outputs 13, 23 respectively. Typically, a frequency tuning range of about 10% may be provided by the variable capacitance element C_v.

Figure 21 illustrâtes the phase noise of the oscillator circuit 190 described with référencé to Figure 18, as a function of frequency offset from the oscillation frequency, for the case where the inductive element of each of the first, second, third and fourth tank circuits T1, T2, T3, T4 has an inductance of 0.5nH, the oscillator circuit 190 is arranged to oscillate at an oscillation frequency of 6GHz, the voltage rail 14 of each of the first, second, third and fourth tank circuits T1, T2, T3, T4 provides 0.6V, and the oscillator circuit 190 draws a current of 110mA. Graph a) in Figure 21 represents the total phase noise, graph b) represents the contribution of thermal noise to the total phase noise, and graph c) represents the contribution of flicker noise to the total phase noise. Despite the low supply voltage, a very low phase noise is obtained, for example, -150dBc/Hz at 10MHz offset from the oscillation frequency. Such a low phase noise level would require a much larger capacitance and a much lower inductance in a parallel-resonance oscillator, resulting in a much less robust design.

Referring to Figure 22, a wireless communication device 900, such as a mobile phone, comprises an antenna 910 coupled to an input of a low noise amplifier 920 for amplifying a radio frequency (RF) signal received by the antenna 910. An output of the low noise amplifier 920 is coupled to a first input 932 of a down-conversion stage 930 for down-converting the amplified RF signal to baseband by mixing the amplified RF signal with quadrature-related components of a local oscillator signal présent at a second input 934 of the down-conversion stage 930. An output 936 of the down-conversion stage 930 is coupled to an input 952 of a digital signal processor (DSP) 950 via an analogue-todigital converter (ADC) 940 that digitises the baseband signal. The DSP 950 démodulâtes and décodés the digitised baseband signal. The DSP 950 also generates, at an output 954 of the DSP 950, a baseband signal to be transmitted. The output 954 of the DSP 950 is coupled to a first input 972 of an up-conversion stage 970 via a digital-toanalogue converter (DAC) 960. The up-conversion stage 970 up-converts the baseband signal to RF for transmission by mixing the baseband signal with quadrature-related components of the local oscillator signal présent at a second input 974 of the upconversion stage 970. An output 976 of the up-conversion stage 970 is coupled to the antenna 910 via a power amplifier 980 that amplifies the RF signal for transmission. The wireless communication device 900 comprises the oscillator circuit 100 described with

-37reference to Figure 3, which in this embodiment generates the first oscillating tank voltage V_T1 at the first tank output 13. The first tank output 13 of the oscillator circuit 100 is coupled to an input 992 of a quadrature génération phase element 990. The quadrature phase génération element 990 generates from the first oscillating tank voltage V_T1 quadrature-related components of the local oscillator signal at a first output 994 and at a second output 996 of the quadrature phase génération element 990. The first output 994 of the quadrature phase génération element 990 is coupled to the second input 934 of the down-conversion stage 930, and the second output 996 of the quadrature phase génération element 990 is coupled to the second input 974 of the up-conversion stage 970. In applications where the local oscillator signal is required to be a balanced signal, the oscillator circuit 100 may employ any of the embodiments that generate a balanced oscillating signal, in particular the oscillator circuits 115, 140, 150, 160 described with reference to Figures 10, 13, 14 and 15.

In a variant of the wireless communication device 900, the oscillator circuit 100 and the quadrature phase génération element 990 may be replaced by one of the oscillator circuits 120, 130, 170, 180 described with reference to Figures 11, 12, 16 and 17 which generate quadrature-related oscillating signais or quadrature-related balanced oscillating signais.

Other variations and modifications will be apparent to the skilled person. Such variations and modifications may involve équivalent and other features that are already known and which may be used instead of, or in addition to, features described herein. Features that are described in the context of separate embodiments may be provided in combination in a single embodiment. Conversely, features that are described in the context of a single embodiment may also be provided separately or in any suitable subcombination.

It should be noted that the term “comprising” does not exclude other éléments or steps, the term “a” or “an” does not exclude a plurality, a single feature may fulfil the functions of several features recited in the daims and reference signs in the daims shall not be construed as limiting the scope of the daims. It should also be noted that where a component is described as being “arranged to” or “adapted to” perform a particular function, it may be appropriate to consider the component as merely suitable “for” performing the function, depending on the context in which the component is being considered. Throughout the text, these terms are generally considered as interchangeable, unless the particular context dictâtes otherwise. It should also be noted that the Figures are not necessarily to scale; emphasis instead generally being placed upon illustrating the principles of the présent invention.

Claims (25)

1. An oscillator circuit (100) comprising:

a first tank circuit (T1) comprising an inductive element (L) and a capacitive element (C) coupled in sériés between a voltage rail (14) and a first drive node (12); and a feedback stage (F) coupled to a first tank output (13) of the first tank circuit (T1 ) and to the first drive node (12);

wherein the feedback stage (F) is arranged to generate, responsive to a first oscillating tank voltage présent at the first tank output (13), a first oscillating drive voltage at the first drive node (12) in-phase with an oscillating tank current flowing in the inductive element (L) and the capacitive element (C), thereby causing the oscillator circuit (100) to oscillate in a sériés résonance mode of the inductive element (L) and the capacitive element (C).

2. An oscillator circuit (100) as claimed in claim 1, wherein the feedback stage (F) is arranged to generate the first oscillating drive voltage having a substantially rectangular waveform.

3. An oscillator circuit (110) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1) is arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage in-phase with the first oscillating drive voltage, and wherein the feedback stage (F) comprises a first driver (D1) arranged to generate, responsive to the first oscillating tank voltage, the first oscillating drive voltage in-phase with the first oscillating tank voltage.

4. An oscillator circuit (110) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1 ) is arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage one hundred and eighty degrees out-of-phase with the first oscillating drive voltage, and wherein the feedback stage (F) comprises a first driver (D1) arranged to generate, responsive to the first oscillating tank voltage, the first oscillating drive voltage one hundred and eighty degrees out-of-phase with the first oscillating tank voltage by applying signal inversion to the first oscillating tank voltage.

5. An oscillator circuit (115) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1) is arranged to generate, responsive to the first oscillating drive voltage, the first

-39oscillating tank voltage in-phase with the first oscillating drive voltage, and wherein the feedback stage (F) comprises:

a second driver (D2) arranged to generate a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

a second tank circuit (T2) arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage in-phase with the second oscillating drive voltage; and a first driver (D1) arranged to generate the first oscillating drive voltage by applying signal inversion to the second oscillating tank voltage.

6. An oscillator circuit (115) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1) is arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage one hundred and eighty degrees out-of-phase with the first oscillating drive voltage, and wherein the feedback stage (F) comprises:

a second driver (D2) arranged to generate a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

a second tank circuit (T2) arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage in-phase with the second oscillating drive voltage; and a first driver (D1) arranged to generate the first oscillating drive voltage in-phase with the second oscillating tank voltage.

7. An oscillator circuit (115) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1) is arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage one hundred and eighty degrees out-of-phase with the first oscillating drive voltage, and wherein the feedback stage (F) comprises:

a second driver (D2) arranged to generate, responsive to the first oscillating tank voltage, a second oscillating drive voltage in-phase with the first oscillating tank voltage;

a second tank circuit (T2) arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage one hundred and eighty degrees out-of-phase with the second oscillating drive voltage; and a first driver (D1) arranged to generate, responsive to the second oscillating tank voltage, the first oscillating drive voltage in-phase with the second oscillating tank voltage.

8. An oscillator circuit (110, 115) as claimed in any one of daims 3 to 7, wherein the first tank circuit (T 1 ) comprises a sensor device (S) arranged to generate the first oscillating tank voltage responsive to the first oscillating tank current.

9. An oscillator circuit (110, 115) as claimed in claim 8, wherein the sensor device (S) comprises one of a résistive element (R) and a transformer (X) coupled in sériés with the inductive element (L) and the capacitive element (C) between the voltage rail (14) and the first drive node (12).

10. An oscillator circuit (110, 115) as claimed in claim 8, wherein the sensor device (S) is magnetically coupled to the inductive element (L) for generating by magnetic induction the first oscillating tank voltage responsive to the first oscillating tank current.

11. An oscillator circuit (120) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1) is arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage, and wherein the feedback stage (F) comprises a phase shifting stage (P) arranged to generate a first intermediate oscillating voltage by applying a phase lag of ninety degrees to the first oscillating tank voltage, further comprising a first driver (D1) arranged to generate the first oscillating drive voltage by applying signal inversion to the first intermediate oscillating voltage.

12. An oscillator circuit (130) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1) is arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage, and wherein the feedback stage (F) comprises a phase shifting stage (P) arranged to generate a first intermediate oscillating voltage by applying a phase lag of ninety degrees to the first oscillating tank voltage, further comprising a first driver (D1) arranged to generate the first oscillating drive voltage in response to, and in-phase with, the first intermediate oscillating voltage.

13. An oscillator circuit (140) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1 ) is arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage, and wherein the feedback stage (F) comprises:

-41 a first phase shift circuit (P1) arranged to generate a first intermediate oscillating voltage by applying a phase lag of ninety degrees to the first oscillating tank voltage;

a second driver (D2) arranged to generate, responsive to the first intermediate oscillating voltage, a second oscillating drive voltage in-phase with the first intermediate oscillating voltage, a second tank circuit (T2) arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of the second oscillating drive voltage;

a second phase shift circuit (P2) arranged to generate a second intermediate oscillating voltage by applying a phase lag of ninety degrees to the second oscillating tank voltage; and a first driver (D1) arranged to generate, responsive to the second intermediate oscillating voltage, the first oscillating drive voltage in-phase with the second intermediate oscillating voltage.

14. An oscillator circuit (150) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1) is arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage, and wherein the feedback stage (F) comprises:

a first phase shift circuit (P1) arranged to generate a first intermediate oscillating voltage by applying a phase lag of ninety degrees to the first oscillating tank voltage;

a second driver (D2) arranged to generate a second oscillating drive voltage by applying signal inversion to the first intermediate oscillating voltage;

a second tank circuit (T2) arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase leading by ninety degrees a phase of the second oscillating drive voltage;

a second phase shift circuit (P2) arranged to generate a second intermediate oscillating voltage by applying a phase lag of ninety degrees to the second oscillating tank voltage; and a first driver (D1) arranged to generate, responsive to the second intermediate oscillating voltage, the first oscillating drive voltage in-phase with the second intermediate oscillating voltage.

15. An oscillator circuit (160) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1) is arranged to generate, responsive to the first oscillating drive voltage, the first

-42oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage, and wherein the feedback stage (F) comprises:

a second driver (D2) arranged to generate a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

a second tank circuit (T2) arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of the second oscillating drive voltage; and a first driver (D1) arranged to generate, responsive to the second oscillating tank voltage, the first oscillating drive voltage in-phase with the second oscillating tank voltage.

16. An oscillator circuit (170) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1 ) is arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage, and wherein the feedback stage (F) comprises:

a second driver (D2) arranged to generate a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

a second tank circuit (T2) arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase leading by ninety degrees a phase of the second oscillating drive voltage; and a first driver (D1) arranged to generate, responsive to the second oscillating tank voltage, the first oscillating drive voltage in-phase with the second oscillating tank voltage.

17. An oscillator circuit (180) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1) is arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage, and wherein the feedback stage (F) comprises:

a second driver (D2) arranged to generate, responsive to the first oscillating tank voltage, a second oscillating drive voltage in-phase with the first oscillating tank voltage;

a second tank circuit (T2) arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of the second oscillating drive voltage; and a first driver (D1) arranged to generate, responsive to the second oscillating tank voltage, the first oscillating drive voltage in-phase with the second oscillating tank voltage.

18. An oscillator circuit (190) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1) is arranged to generate, responsive to the first oscillating drive voltage, the first

-43oscillating tank voltage having a phase iagging by ninety degrees a phase of the first oscillating drive voltage, and wherein the feedback stage (F) comprises:

a second driver (D2) arranged to generate, responsive to the first oscillating tank voltage, a second oscillating drive voltage in-phase with the first oscillating tank voltage;

a second tank circuit (T2) arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase Iagging by ninety degrees a phase of the second oscillating drive voltage;

a third driver (D3) arranged to generate, responsive to the second oscillating tank voltage, a third oscillating drive voltage in-phase with the second oscillating tank voltage;

a third tank circuit (T3) arranged to generate, responsive to the third oscillating drive voltage, a third oscillating tank voltage having a phase Iagging by ninety degrees a phase of the third oscillating drive voltage;

a fourth driver (D4) arranged to generate, responsive to the third oscillating tank voltage, a fourth oscillating drive voltage in-phase with the third oscillating tank voltage;

a fourth tank circuit (T4) arranged to generate, responsive to the fourth oscillating drive voltage, a fourth oscillating tank voltage having a phase Iagging by ninety degrees a phase of the fourth oscillating drive voltage; and a first driver (D1) arranged to generate, responsive to the fourth oscillating tank voltage, the first oscillating drive voltage in-phase with the fourth oscillating tank voltage.

19. An oscillator circuit (190) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1) is arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage, and wherein the feedback stage (F) comprises:

a second driver (D2) arranged to generate, responsive to the first oscillating tank voltage, a second oscillating drive voltage in-phase with the first oscillating tank voltage;

a second tank circuit (T2) arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase leading by ninety degrees a phase of the second oscillating drive voltage;

a third driver (D3) arranged to generate, responsive to the second oscillating tank voltage, a third oscillating drive voltage in-phase with the second oscillating tank voltage;

a third tank circuit (T3) arranged to generate, responsive to the third oscillating drive voltage, a third oscillating tank voltage having a phase leading by ninety degrees a phase of the third oscillating drive voltage;

a fourth driver (D4) arranged to generate, responsive to the third oscillating tank voltage, a fourth oscillating drive voltage in-phase with the third oscillating tank voltage;

-44a fourth tank circuit (T4) arranged to generate, responsive to the fourth oscillating drive voltage, a fourth oscillating tank voltage having a phase leading by ninety degrees a phase of the fourth oscillating drive voltage; and a first driver (D1) arranged to generate, responsive to the fourth oscillating tank voltage, the first oscillating drive voltage in-phase with the fourth oscillating tank voltage.

20. An oscillator circuit (190) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1) is arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase lagging by ninety degrees a phase of the first oscillating drive voltage, and wherein the feedback stage (F) comprises:

a second driver (D2) arranged to generate a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

a second tank circuit (T2) arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase lagging by ninety degrees a phase of the second oscillating drive voltage;

a third driver (D3) arranged to generate a third oscillating drive voltage by applying signal inversion to the second oscillating tank voltage;

a third tank circuit (T3) arranged to generate, responsive to the third oscillating drive voltage, a third oscillating tank voltage having a phase lagging by ninety degrees a phase of the third oscillating drive voltage;

a fourth driver (D4) arranged to generate a fourth oscillating drive voltage by applying signal inversion to the third oscillating tank voltage;

a fourth tank circuit (T4) arranged to generate, responsive to the fourth oscillating drive voltage, a fourth oscillating tank voltage having a phase lagging by ninety degrees a phase of the fourth oscillating drive voltage; and a first driver (D1) arranged to generate the first oscillating drive voltage by applying signal inversion to the fourth oscillating tank voltage.

21. An oscillator circuit (190) as claimed in claim 1 or claim 2, wherein the first tank circuit (T1) is arranged to generate, responsive to the first oscillating drive voltage, the first oscillating tank voltage having a phase leading by ninety degrees a phase of the first oscillating drive voltage, and wherein the feedback stage (F) comprises:

a second driver (D2) arranged to generate a second oscillating drive voltage by applying signal inversion to the first oscillating tank voltage;

-45a second tank circuit (T2) arranged to generate, responsive to the second oscillating drive voltage, a second oscillating tank voltage having a phase leading by ninety degrees a phase of the second oscillating drive voltage;

a third driver (D3) arranged to generate a third oscillating drive voltage by applying signal inversion to the second oscillating tank voltage;

a third tank circuit (T3) arranged to generate, responsive to the third oscillating drive voltage, a third oscillating tank voltage having a phase leading by ninety degrees a phase of the third oscillating drive voltage;

a fourth driver (D4) arranged to generate a fourth oscillating drive voltage by applying signal inversion to the third oscillating tank voltage;

a fourth tank circuit (T4) arranged to generate, responsive to the fourth oscillating drive voltage, a fourth oscillating tank voltage having a phase leading by ninety degrees a phase of the fourth oscillating drive voltage; and a first driver (D1) arranged to generate the first oscillating drive voltage by applying signal inversion to the fourth oscillating tank voltage.

22. An oscillator circuit (100) as claimed in any one of daims 8, 9, 10, 11, 13,14, 15,

18 and 21, wherein the capacitive element (C) is coupled between the first drive node (12) and the first tank output (13) and the inductive element (L) is coupled between the first tank output (13) and the first voltage rail (14).

23. An oscillator circuit (100) as claimed in any one of daims 8, 9, 10, 12, 16,17 and

19 wherein the inductive element (L) is coupled between the first drive node (12) and the first tank output (13) and the capacitive element (C) is coupled between the first tank output (13) and the first voltage rail (14).

24. A wireless communication device (900) comprising an oscillator circuit (100) as claimed in any preceding daim.

25. A method of operating an oscillator circuit (100), the oscillator circuit (100) comprising a first tank circuit (T1) comprising an inductive element (L) and a capacitive element (C) coupled in sériés between a first voltage rail (14) and a first drive node (12), the method comprising generating, responsive to a first oscillating tank voltage présent at a first tank output (13), a first oscillating drive voltage at the first drive node, wherein the first oscillating drive voltage is in-phase with a first oscillating tank current flowing in the inductive element (L) and the capacitive element (C), thereby causing the oscillator (100)

-46to oscillate in a sériés résonance mode of the inductive element (L) and the capacitive element (C).