NZ733068A - An arrangement and method for generation and propagation of a control on signal for a load switch arrangement for a two-wire trailing edge dimmer arrangement - Google Patents
An arrangement and method for generation and propagation of a control on signal for a load switch arrangement for a two-wire trailing edge dimmer arrangementInfo
- Publication number
- NZ733068A NZ733068A NZ733068A NZ73306817A NZ733068A NZ 733068 A NZ733068 A NZ 733068A NZ 733068 A NZ733068 A NZ 733068A NZ 73306817 A NZ73306817 A NZ 73306817A NZ 733068 A NZ733068 A NZ 733068A
- Authority
- NZ
- New Zealand
- Prior art keywords
- arrangement
- latch
- zero crossing
- load switch
- voltage
- Prior art date
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- 238000001514 detection method Methods 0.000 claims abstract description 72
- 230000005669 field effect Effects 0.000 claims description 8
- 230000002401 inhibitory effect Effects 0.000 claims description 4
- 230000000644 propagated Effects 0.000 claims description 4
- 230000000875 corresponding Effects 0.000 description 4
- 230000001276 controlling effect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000037361 pathway Effects 0.000 description 2
- 230000001902 propagating Effects 0.000 description 2
- 230000002238 attenuated Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000001419 dependent Effects 0.000 description 1
Abstract
arrangement for the propagation of a control ON signal to a load switch of a two-wire trailing edge dimmer including, a load switch, a latch, a voltage level detector in electrical communication with the latch, and a zero crossing detection arrangment in electrical communication with the latch and the rectified AC mains voltage supply, whereby detection of rectified AC mains voltage supply within a zero crossing voltage range places the zero crossing detection arrangement in a non-conductive state such that electrical communication between the zero crossing detection arrangement in a non-conductive state and the latch in a set status provides non-conduction between the zero crossing detection arrangement and the latch in the set status such that an electrical communication between the latch and the load switch allows a generated ON control signal from the latch in the set status to propagate through to the load switch to place the load switch in the conductive state to provide electrical power from the AC mains voltage supply to the load under the control of the two-wire trailing edge dimmer. d the rectified AC mains voltage supply, whereby detection of rectified AC mains voltage supply within a zero crossing voltage range places the zero crossing detection arrangement in a non-conductive state such that electrical communication between the zero crossing detection arrangement in a non-conductive state and the latch in a set status provides non-conduction between the zero crossing detection arrangement and the latch in the set status such that an electrical communication between the latch and the load switch allows a generated ON control signal from the latch in the set status to propagate through to the load switch to place the load switch in the conductive state to provide electrical power from the AC mains voltage supply to the load under the control of the two-wire trailing edge dimmer.
Description
AN ARRANGEMENT AND METHOD FOR GENERATION AND
PROPAGATION OF A CONTROL ON SIGNAL FOR A LOAD SWITCH
ARRANGEMENT FOR A TWO-WIRE TRAILING EDGE DIMMER
ARRANGEMENT
TECHNOLOGICAL FIELD
This invention relates to a new and improved unique arrangement and
method for providing a control ON signal to a load switch arrangement for a
two-wire trailing edge dimmer arrangement and more particularly to an
arrangement and method to provide the requisite control ON signal for the load
switch arrangement at a preferred instant in time generally at the crossing of the
AC mains voltage supply from one voltage polarity to the opposite polarity
referred to throughout this specification as “zero crossing”.
BACKGROUND ART DISCUSSION
Phase cutting control dimmers operate by switching AC mains voltage
supply to a lamp or other load for only a chosen time portion of each AC mains
voltage supply half cycle. For two-wire trailing edge dimmers, also referred to as
reverse phase control dimmers, these remove power from the end or trailing
edge of each AC mains supply half cycle.
Conventionally the switching ON and OFF of the connected load is
achieved by controlling the conduction or non-conduction of an electronic switch
designed to handle the current and voltage associated with the AC mains
voltage supply. The AC mains voltage supply rated electronic switch in many
prior art arrangements is changed from conduction to non-conduction by
applying a low voltage controlling signal derived using some form of electronic
ON/OFF latching arrangement.
The electronic ON/OFF latching arrangement as the person skilled in the
art would know, and to which is the not the restricted subject of this invention
may be provided in the form of electronic component hardware, for example a
conventional SET/RESET logic integrated circuit (IC) or an equivalent functional
block built using discrete resistors and transistors. The same electronic ON/OFF
latching arrangement could also be included and/or electrically communicated
with a microcontroller or similar device in which the equivalent functionality of
electronic ON/OFF latching arrangement is provided by a software running on
the particular device that controls a voltage appearing on one of microcontroller
or other similar device input/output connections.
The control of electronic ON/OFF latching arrangement is, in turn usually,
conventionally provided by electrical timing signals applied to the electronic
ON/OFF latching arrangement inputs. One signal is provided to SET the
electronic ON/OFF latching arrangement and another signal to RESET the
electronic ON/OFF latching arrangement.
The electronic ON/OFF latching arrangement SET or RESET state then
provides the ON/OFF control signal to the load switching arrangement providing
or withdrawing delivery of the AC mains voltage supply to the load under the
control of the two-wire trailing edge dimmer arrangement.
In two-wire trailing edge dimmer arrangement the signals to control the
electronic ON/OFF latching arrangement are conventionally, i) a signal derived
by sensing the ‘instant’ of crossing of the AC mains voltage supply from one
voltage polarity to the opposite polarity, referred to throughout this specification
as a ‘zero crossing’ signal and ii) a signal derived from a timing arrangement
that outputs a signal at some variable time following the generation of the zero
crossing timing signal. The time at which the timing arrangement makes
available the control signal is chosen to lie in the range between the zero
crossing instant and a period equal to half the period of the AC mains voltage
supply.
For example, for a 50 Hz AC mains voltage supply the electronic
ON/OFF latching arrangement is conventionally ‘SET’ by a signal derived to
coincide with the ‘zero crossing’ of the AC mains voltage supply and the
‘RESET’ signal will be generated by the timing arrangement at some time
between zero and 10 milliseconds after the ‘SET’ signal. In this way the
duration, during each 10 millisecond AC mains voltage supply half cycle, that
the AC mains voltage supply is applied to the load is variable between
theoretical limits of zero and 10 milliseconds thereby accordingly the load power
can be controlled from zero to 100% of the rated load power.
Unfortunately there are problems associated with these conventional
arrangements referred to above as there will be non-zero delays associated
with the transmission of the control signal once a ‘zero crossing’ has been
recognised.
For two-wire trailing edge dimmer arrangement the load switch
arrangement typically includes a pair of high voltage power MOSFETs
connected in series, with their source terminals connected together, and their
drain terminals providing the AC mains voltage supply switch terminals.
The gate terminals of the high voltage power MOSFETs connected in
series are effectively connected in parallel and driven by an ON/OFF control
signal, generally a DC signal provided by the electronic ON/OFF latching
arrangement, wherein the provided DC signal is usually in a range between 5 V
and 15 V, to which is then applied between the high voltage power MOSFETs
gate and source terminals.
AC mains voltage supply ‘zero crossing’ detection is conventionally
implemented by rectification of the two-wire trailing edge dimmer arrangement
terminal voltage and detection of instants at which the amplitude of that full
wave rectified output falls close to zero volts. As 230V AC mains voltage supply
reaches peaks of about 340 V the rectified AC mains voltage supply is
attenuated using either a simple resistive divider to enable indirect detection of
the AC mains voltage supply ‘zero crossing’ using low voltage amplitude
detection or else a series resistor having a high ohmic value is used and voltage
limiting devices are used to protect the detection circuitry.
Again, conventionally, the ‘zero crossing’ signal derived from these kinds
of zero crossing detection arrangements are applied to the electronic ON/OFF
latching arrangement and therefore the generated ‘zero crossing’ signal derived
from the conventional zero crossing detection arrangement only ‘indirectly’ is
used to drive the gates of the high voltage power MOSFETs and hence
ultimately provide electrical power to the load under the control of the two-wire
trailing edge dimmer arrangement.
[014] ‘Indirectly’ refers to the fact that the zero crossing signal does not directly
control the instant of the switching ON of the high voltage power MOSFETs
gates but rather controls the state of the electronic ON/OFF latching
arrangement, to which that electronic ON/OFF latching arrangement, in turn,
controls or at least provides the control signal to gates to switch ON the high
voltage power MOSFETs.
Hence in the conventional arrangements referred to above, the instant of
switch ON of the high voltage power MOSFETs is therefore under the ‘direct’
control of the electronic ON/OFF latching arrangement and only under ‘indirect’
control of the signal provided for by AC mains voltage supply zero crossing
detection arrangement.
Accordingly it is an object of this invention to be able to provide for an
arrangement and method whereby the generation of the control ON signal for
the load switch arrangement responsible for providing power from the AC mains
voltage supply to the load under the control of the dimmer arrangement can be
made available instantly and directly at the time of recognition of a selected
detected voltage, notably at or around zero crossing.
Further objects and advantages of the invention will become apparent
from a complete reading of the following specification.
SUMMARY OF THE INVENTION
In one form of the invention there is provided an arrangement for the
propagation of a control ON signal to a load switch arrangement of a two-wire
trailing edge dimmer arrangement, said arrangement including;
[019] a load switch arrangement, said load switch arrangement including a
conductive state providing electrical power from AC mains voltage supply to a
load under the control of the two-wire trailing edge dimmer arrangement;
a latch arrangement, wherein said latch arrangement includes a set
status wherein the set status of the latch arrangement generates an ON control
signal, wherein a propagation of the ON control signal to the load switch
arrangement, places the load switch arrangement in the conductive state;
a voltage level detector arrangement in electrical communication with
said latch arrangement, wherein detection of a selected voltage from a rectified
AC mains voltage supply by the voltage level detector arrangement places the
latch arrangement in said set status;
a zero crossing detector arrangement in electrical communication with
said latch arrangement and the rectified AC mains voltage supply, said zero
crossing detection arrangement including a conductive state and a non-
conductive state, whereby detection of the rectified AC mains voltage supply
outside a selectable zero crossing voltage range places the zero crossing
detection arrangement into a conductive state such that electrical
communication between the zero crossing detection arrangement in the
conductive state and the latch arrangement in the set status provides
conduction between the zero crossing detection arrangement and the latch
arrangement so that the generated ON control signal of the latch arrangement
is propagated through the zero crossing detection arrangement thereby
inhibiting any propagation of the ON control signal provided by the latch
arrangement in the set status to the load switch arrangement;
and whereby detection of rectified AC mains voltage supply within a zero
crossing voltage range and/or at a zero crossing voltage places the zero
crossing detection arrangement in a non-conductive state such that electrical
communication between the zero crossing detection arrangement in a non-
conductive state and the latch arrangement in said set status provides non-
conduction between the zero crossing detection arrangement and the latch
arrangement in the set status such that an electrical communication between
the latch arrangement and the load switch arrangement allows the generated
ON control signal from the latch arrangement in the set status to propagate
through to the load switch arrangement to place the load switch arrangement in
the conductive state to provide electrical power from the AC mains voltage
supply to the load under the control of the two-wire trailing edge dimmer
arrangement.
Conventionally the two-wire trailing edge dimmer arrangement relies
upon the use of a zero crossing detection arrangement which functions to sense
the instant of the crossing of the AC mains voltage supply. That detection of the
zero crossing then provides a signal that rather than placing the load switch
arrangement into a conductive state, is first interpreted by the latching
arrangement which would then subsequently thereafter have to generate the
relevant ON control signal to instigate conduction of the load switch
arrangement.
Hence recognition of the detection of a zero crossing is not instantly
translated to the load switch arrangement to place the load switch into
conduction to provide electrical power to the load at the optimum interval
around zero crossing because as discussed previously the zero voltage
detection arrangement is not working directly with the load switch arrangement
but rather indirectly through the latch arrangement.
Uniquely, in the arrangement provided for in this invention recognition of
that sensed instant of crossing of the AC mains voltage supply from one voltage
polarity to the opposite polarity is directly and instantaneously utilised because
this invention relies upon a voltage level detector that has already generated the
ON control signal from the latching arrangement prior to a zero crossing event,
so that when the zero crossing event does occur, this ON control signal can
then be instantaneously propagated through to the load switch.
[027] In preference the electrical communication between the latch
arrangement and the load switch arrangement includes a first electrical path,
said first electrical path including an impedance resistor, whereby the
impedance of the resistor is configured to provide an impedance that allows
propagation of the generated ON control signal from the latch arrangement to a
high impedance input of the load switch arrangement when the zero crossing
detection arrangement is in a non-conductive state.
In preference the electrical communication between the latch
arrangement and the zero crossing detection arrangement includes a second
electrical path electrically connected with the first electrical path, wherein the
second electrical path provides a low impedance conductive path for the
generated ON control signal from the latch arrangement as when detection of
the rectified AC mains voltage supply by the zero crossing detection
arrangement is outside a zero crossing voltage range thereby allowing
conduction between the latch arrangement and the zero crossing detection
arrangement for the generated ON control signal of the latch arrangement so
that there is no propagation of the ON control signal from the latch arrangement
when in the set status to the load switch arrangement.
In preference the zero crossing detection arrangement includes voltage
divider resistors and a transistor.
[030] In preference the transistor is a bipolar transistor and preferably as a
base voltage of the transistor exceeds a requisite threshold the transistor
becomes conductive providing the low impedance conductive path.
Preferably the bipolar transistor is a NPN bipolar transistor.
In alternative forms of the invention the transistor is a field effect
transistor (FET).
In an alternative arrangement the impedance resistor included as part of
the first electrical path can be replaced by other suitable functioning
components such as current limiting arrangements sufficient to ensure shunting
of the generated ON control signal from propagating on to the load switch
arrangement.
In an alternative form of the invention, zero crossing voltage detection
arrangement includes divider resistors in combination with two Darlington
connected bipolar transistors.
The purpose of referencing alternative forms of the invention, notably the
replacement of the impedance resistor with other types of current limiting
arrangements, the NPN transistor with FETs, and also the replacement of a
single bipolar transistor with two Darlington connected bipolar transistors is to
describe representatively that it will become obvious to the person skilled in the
art that the invention as broadly defined can be implemented by a variety of
circuits. Hence it is the overall placement of the functional blocks as opposed to
the components used to achieve this functionality that is essential to this
invention.
[036] In preference the arrangement further includes a micro-controller,
wherein the micro-controller contains or is in electrical operable communication
with the latch arrangement.
In preference the micro-controller includes an input, wherein the input is
in electrical communication with an electrical path to the voltage level detector
arrangement, wherein the voltage level detector arrangement, upon detection of
the selected voltage from the rectified AC mains voltage supply, provides a
signal to the input of the micro-controller which places the latch arrangement in
the set status, thereby establishing the set status of the latch arrangement
generating an ON control signal from an output of the micro-controller.
In preference the timer arrangement and functionality of the timer
arrangement is included as part of the micro-controller or preferably in
alternative embodiments the timer arrangement is independent of the micro-
controller but the timer arrangement works in operatable electrical
communication with said micro-controller.
In preference the timer arrangement is in communication with an electrical path
either inputted directly to the micro-controller or to the latch arrangement
arrangement provides for a variable period mono-stable timer that is started by
the generation of the SET control signal provided to the latch arrangement for a
selectable period of time, and at the conclusion of the selectable period of time,
provides an input to the latch arrangement that places the latch arrangement
into the reset status whereby the ON control signal is no longer generated.
[039] In preference the load switching arrangement includes back-to-back field
effect transistors.
In preference the back-to-back field effect transistors are N-channel
enhancement mode MOSFETs with source terminals connected together with
gates connected together and the drain terminals acting as two power
terminals.
In preference each field effect transistor has an intrinsic body diode so as
to allow conduction of current through the dimmer arrangement in one direction.
In preference the active terminal and load terminal voltages are each
rectified by a corresponding diode.
[043] In order now to describe the invention in greater detail a preferred
embodiment will now be described with the assistance of the following
illustrations and accompanying text.
BRIEF DESCRIPTION OF THE ILLUSTRATIONS
Figure 1 illustrates an electrical circuit and part block diagram for the
arrangement for the propagation of a control ON signal to a load switch
arrangement of a two-wire trailing edge dimmer arrangement in a preferred
embodiment of the invention.
DETAILED DESCRIPTION OF THE INVENTION
Referring to the drawing now in greater detail wherein Figure 1 provides
a part circuit part block diagram arrangement wherein the two-wire trailing edge
dimmer arrangement is shown generally as (10).
[046] As a representative preferred embodiment of the invention the two-wire
trailing edge dimmer arrangement is adapted to remove power from the end or
trailing edge of AC mains voltage supply (12) so as to control the supply of the
AC mains voltage supply (12) to the load (14), which in the preferred
embodiment is a lamp, under control of the two-wire trailing edge phase cutting
control dimmer arrangement (10).
The two-wire trailing edge phase cutting control dimmer arrangement
(10) interfaces with the AC mains voltage supply (12) and the lamp through the
load voltage terminal (16) and the active voltage terminal (18).
Each of the load voltage terminal (16) and the active voltage terminal
(18) are rectified through corresponding diodes (30) and (31). The field effect
transistors (FETs) (20) and (22) comprise the main load switch arrangement for
this invention for the controlled supply of the AC mains voltage supply (12) to
the load (14).
As illustrated, FETs (20) and (22) are arranged back-to-back and operate
in the N-channel enhancement mode having source terminals (23) and (24)
connected together with the gates (25) and (26) of each of the FETs (20) and
(22) also connected with the drain terminals (27) and (28) acting as two power
terminals.
The FETs (20) and (22) each have corresponding intrinsic body diodes
(32) and (33) that allow conduction of current in one direction thereby allowing
the configured back-to-back arrangement of the FETs (20) and (22) to allow
load current to be controlled in either direction.
The generation, propagation and duration of a control signal along the
electrical path (34) into the connected gates (25) and (26) of the respective
FETs (20) and (22) allows the back-to-back connected FETs (20) and (22) to
become conductive through the low voltage controlling signal ON provided
along electrical pathway (34) from the latch arrangement (40) when the latch
arrangement is in the set status, and to which will be discuss in greater detail
below when the transistor (54) is non-conductive.
Once the FETs (20) and (22) are turned ON by the low voltage control
signal along electrical path (34) to the gates (25) and (26) of the respective
FETs (20) and (22) AC mains voltage supply (12) is then switchable to the load
(14) under the control of the two-wire trailing edge phase cutting control dimmer
arrangement (10).
Nodes (37) and (38) are representative of terminals where the rectified
AC mains voltage supply through diodes (30) and (31) are made available in
part for voltage detection of which relevance in relation to the generation,
propagation and duration of the ON gate control signal to the FETs (20) and
(22) will now be discussed hereafter.
As illustrated, the two-wire trailing edge phase cutting control dimmer
arrangement (10) includes a latch arrangement (40), a variable timer
arrangement (42) and a conventional voltage level detector arrangement (44).
Each of these features of the latch arrangement (40), variable timer
arrangement (42) and the voltage level detector arrangement (44) are simply
shown as blocks.
In different types of preferred embodiments the latch arrangement (40)
could be incorporated into a micro-controller (not shown) where the timer
arrangement (42) could be on board the same micro-controller (not shown) or
separate.
The latch arrangement (40) could also include conventional set/re-set
logic integrated circuits or equivalent functionality could also be provided by a
requisite number of discrete resistors and transistors.
Suffice to say that the latch arrangement (40) for the most part requires
an input shown as (41), which in this instance is provided from the voltage level
detector arrangement (44) which will set the latch arrangement (40) to the set
status and provide an output signal at (43) which will be discussed in greater
detail shortly hereafter.
That input (41) from the voltage level detector arrangement (44) to the
latch arrangement (40) is also communicated to the timer arrangement (42)
along the electrical path (45) wherein the timer arrangement establishes the
duration to which the output signal (43) upon electrical pathway (34) is
generated.
The timer arrangement (42) provides a signal along electrical path (46)
into the latch arrangement (40) to re-set the latch arrangement until the next
signal provided by the voltage level detector arrangement (44).
As introduced above, the gates (25) and (26) of the FETs (20) and (22)
are driven by the voltage provided by the ON control signal outputted at (43) of
the latch arrangement (40) along electrical path (34).
The latch arrangement (40) is set ON thereby generating the ON control
signal along electrical path (34) because of the signal initially sent from the
voltage level detector arrangement (44) to place the latch arrangement in the
set status.
[063] The voltage level detector arrangement (44) is configured to monitor the
rectified dimmer terminal voltages (16) and (18) at nodes (37) and (38) and
generates a signal along the electrical path (41) to set the latch arrangement
(40) when the voltage of the rectified dimmer terminals at (16) and (18) falls
below any level determined by the designer of the circuit.
[064] As the person skilled in the art will appreciate, the determination of a
suitable selectable voltage from the rectified AC mains voltage supply by the
voltage level detector arrangement (44) will be well in advance of the time at
which the zero crossing takes place. The time at which the level detection from
the voltage level detector arrangement (44) makes the detection of a selected
voltage of the rectified AC mains voltage supply is selectable at any time initially
after the latch arrangement (40) has been set to the Reset (off) status.
As introduced above the latch arrangement (40) through input (46) has
the input which to set the latch arrangement to a reset status (OFF). In the
preferred embodiment the latch arrangement (40) is placed from the set status
to re-set status (OFF) by a signal made available along electrical path line (46)
from the timer arrangement (42) inputted into the latch arrangement (40) upon
expiry of, for example, a variable period monostable timer within the timer
arrangement (42).
The generated gate control voltage signal from the latch arrangement
(40) is not immediately made available to the connected gates (25) and (26) of
the respective FETs (20) and (22).
Importantly this invention also includes a zero crossing detection
arrangement which in the preferred embodiment includes voltage divider
resistors (50) and (52) and NPN bipolar transistor (54).
Impedance resistor (56) allows, dependent of the conductive state of
transistor (54) to be discuss below, passage of the generated gate control
voltage signal from the latch arrangement (40) to the connected gates (25) and
(26) of the FETs (20) and (22) as there is a very high impedance along
electrical path line (35) when transistor (54) is non conductive.
Due to the high impedance established by the impedance resistor (56) it
is not possible therefore for the generated gate control ON voltage signal from
the latch arrangement (40) when set to propagate through to the connected
gates (25) and (26) of the FETs (20) and (22) when conduction is permitted
through transistor (54) as conduction through transistor (54) will provide a
preferred low impedance conductive path thereby preventing or inhibiting the
gate control voltage ON signal from reaching the connected gates (25) and (26)
of the FETs (20) and (22).
Transistor (54) is made conductive by the application of a voltage to the
transistor (54) base (55) exceeding the threshold needed to turn the transistor
(54) ON, namely around 0.6V. The transistor (54) is rendered non-conductive
and therefore would not be able to inhibit the gate control voltage ON signal
from propagating through to the connected gates (25) and (26) of the FETs (20)
and (22) by the application of any voltage to the base (55) of the transistor (54)
substantially lower than 0.6V and preferably approaching 0V.
The voltage divider comprising of the voltage divider resistors (50) and
(52) delivers to the base (55) of the transistor (54) a voltage that is closely the
dimmer terminals (16) and (18) voltage multiplied by resistor (52)/[resistor (50) +
resistor (52)].
Accordingly a value of resistor (50) 19 times the value of resistor (52)
provides for transistor (54) to be driven on (conductive) whenever the dimmer
terminals (16) and (18) voltage exceeds 20 x 0.6V = 12V and as such the
transistor (54) will be OFF whenever the dimmer terminals (16) and (18) voltage
is substantially lower than 12V.
Accordingly, this translates in the operation of the circuit whereby the
FETs (20) and (22) can only be driven ON after the dimmer terminals (16) and
(18) voltage falls below 12V irrespective of the gate control voltage ON signal
outputted from the latch arrangement (40).
[074] Within the circuit operation as the FETs (20) and (22) are driven ON
upon propagation of the gate control voltage signal ON from the latch
arrangement (40) along both electrical paths (34) and (35) there is no longer
inhibition of the generated signal while the transistor (54) is not conductive, as
the dimmer terminals (16) and (18) voltage falls closely to 0V, at least within a
2V of 0. Accordingly, that provides for a voltage on the base (55) of transistor
(54), 2/20 = 0.1V ensuring that the transistor (54) remains in the non-
conductive state and thereby not providing any alternative low impedance
conductive path preventing the gate control voltage ON signal to propagate
through to the connected gates (25) and (26) of the FETs (20) and (22).
[075] As the connected gates (25) and (26) of the FETs (20) and (22) are
switched OFF by the removal of the generated and propagated gate control
voltage ON signal from the latch arrangement (40) through the input of the timer
arrangement (42) into the latch arrangement (40) to reset the latch arrangement
(40), the dimmer terminals (16) and (18) voltage quickly rises above 20V and
transistor (54) again becomes conductive ensuring that there can be no further
opportunity for the gate control ON signal to drive the connected gates (25) and
(26) of the FETs (20) and (21) until the dimmer terminals (16) and (18) voltage
next time again falls below 12V.
Hence the task of the zero crossing detection arrangement which in the
preferred embodiment includes the voltage divider resistors (50) and (52) and
the corresponding transistor (54) in combination with the impedance resistor
(56) is acting differently to conventional zero crossing detection arrangements
which were simply responsible for providing an input signal to a latch
arrangement which therein after receiving that input the latch arrangement
would then issue the gate control voltage ON signal to set the FETs ON.
In this arrangement the unique use of the voltage level detector
arrangement (44) independent of the zero crossing detection arrangement
means that a signal to the latch arrangement (40) is provided well in advance of
the expected AC mains voltage supply zero crossing, but importantly and
uniquely this initially generated gate control voltage ON signal is blocked by the
zero crossing detection arrangement of this invention until the appropriate
instant of the AC mains voltage supply zero crossing.
[078] Upon zero crossing detection whereby the zero crossing detection
arrangement no longer is conductive the generated gate control voltage ON
signal from the latch arrangement (40) is allowed to propagate through along
electrical path line (35) into the connected gates (25) and (26) of the FETs (20)
and (22) placing the load switch arrangement of the FETs (20) and (22) into a
conductive state thereby providing electrical power from the AC mains voltage
supply (12) to the lamp load (14) under the control of the two-wire trailing edge
dimmer arrangement (10).
As the FETs (20) and (22) are turned ON this means that the dimmer
terminals (16) and (18) are at or close to 0V and as such the voltage on the
base (55) of the transistor (54) is low enough to ensure the non-conductive
state of transistor (54) thereby offering no low impedance conductive path that
would inhibit the ongoing propagation of the gate control voltage ON signal to
the FETs (20) and (22).
Hence the gate control voltage ON signal generated from the latch
arrangement (40) is allowed to continually propagate through to the connected
gates (25) and (26) of the FETs (20) and (22) until the latch arrangement (40) is
re-set determined by the timer arrangement (42) and also when the dimmer
terminal (16) and (18) voltage rises again.
Advantageously as soon as the dimmer terminals (16) and (18) voltage
rises, the zero crossing detection arrangement again becomes conductive as
the base voltage (55) made available to the transistor (54) is enough to place
the transistor (54) into the conductive state and thereby the establishment of the
alternative low impedance conductive path to the FETs (20) and (22) sources
(23) and (24) provided by the transistor (54). Hence any control ON signal still
being generated by the latch arrangement (40) would not be able to propagate
through to the connected gates (25) and (26) of the FETs (20) and (22).
As discussed previously, there is a variety of ways in which the
functionality of the impedance resistor (56) and the zero crossing detection
arrangement of the voltage divider resistors (50) and (52) along with the
transistor (54) could be reconfigured into a circuit.
Therefore the scope of this invention is intended not to be limited simply
to the circuit arrangement shown in Figure 1.
Claims (13)
1. An arrangement for the propagation of a control ON signal to a load switch arrangement of a two-wire trailing edge dimmer arrangement, said arrangement including; 5 a load switch arrangement, said load switch arrangement including a conductive state providing electrical power from AC mains voltage supply to a load under the control of the two-wire trailing edge dimmer arrangement; a latch arrangement, wherein said latch arrangement includes a set status wherein the set status of the latch arrangement generates an ON control signal, 10 wherein a propagation of the ON control signal to the load switch arrangement, places the load switch arrangement in the conductive state; a voltage level detector arrangement in electrical communication with said latch arrangement, wherein detection of a selected voltage from a rectified AC mains voltage supply by the voltage level detector arrangement places the latch 15 arrangement in said set status; a zero crossing detection arrangement in electrical communication with said latch arrangement and the rectified AC mains voltage supply, said zero crossing detection arrangement including a conductive state and a non-conductive state, whereby detection of the rectified AC mains voltage supply outside a selectable 20 zero crossing voltage range places the zero crossing detection arrangement into the conductive state such that electrical communication between the zero crossing detection arrangement in the conductive state and the latch arrangement in the set status provides conduction between the zero crossing detection arrangement and the latch arrangement so that the generated ON 25 control signal of the latch arrangement is propagated through the zero crossing detection arrangement thereby inhibiting any propagation of the ON control signal provided by the latch arrangement in the set status to the load switch arrangement; and whereby detection of rectified AC mains voltage supply within a zero crossing voltage range and/or at a zero crossing voltage places the zero 5 crossing detection arrangement in the non-conductive state such that electrical communication between the zero crossing detection arrangement in the non- conductive state and the latch arrangement in said set status provides non- conduction between the zero crossing detection arrangement and the latch arrangement in the set status such that an electrical communication between 10 the latch arrangement and the load switch arrangement allows the generated ON control signal from the latch arrangement in the set status to propagate through to the load switch arrangement to place the load switch arrangement in the conductive state to provide electrical power from the AC mains voltage supply to the load under the control of the two-wire trailing edge dimmer 15 arrangement.
2. The arrangement of claim 1 wherein the electrical communication between the latch arrangement and the load switch arrangement includes a first electrical path, said first electrical path including an impedance resistor, whereby the impedance of the resistor is configured to provide an impedance 20 that allows propagation of the generated ON control signal from the latch arrangement to a high impedance input of the load switch arrangement when the zero crossing detection arrangement is in the non-conductive state.
3. The arrangement of claim 2 wherein the electrical communication between the latch arrangement and the zero crossing detection arrangement 25 includes a second electrical path electrically connected with the first electrical path, wherein the second electrical path provides a low impedance conductive path for the generated ON control signal from the latch arrangement as detection of the rectified AC mains voltage supply by the zero crossing detection arrangement is outside a zero crossing voltage range thereby allowing 30 conduction between the latch arrangement and the zero crossing detection arrangement for the generated ON control signal of the latch arrangement so that there is no propagation of the ON control signal from the latch arrangement when in the set status to the load switch arrangement.
4. The arrangement of claim 1 wherein the zero crossing detection 5 arrangement includes voltage divider resistors and a transistor.
5. The arrangement of claim 4 wherein the transistor is a bipolar transistor and wherein when a base voltage of the bipolor transistor exceeds a requisite threshold the bipolar transistor becomes conductive providing the low impedance conductive path. 10
6. The arrangement of claim 5 wherein the bipolar transistor is a NPN bipolar transistor.
7. The arrangement of claim 4 wherein the transistor is a field effect transistor (FET).
8. The arrangement of claim 3 wherein zero crossing voltage detection 15 arrangement includes divider resistors in combination with two Darlington connected bipolar transistors.
9. The arrangement of claim 1 wherein the arrangement further includes a micro-controller, wherein the micro-controller contains or is in electrical operable communication with the latch arrangement. 20
10. The arrangement of claim 9 wherein the micro-controller includes an input, wherein the input is in electrical communication with an electrical path to the voltage level detector arrangement, wherein the voltage level detector arrangement, upon detection of the selected voltage from the rectified AC mains voltage supply, provides a signal to the input of the micro-controller which 25 places the latch arrangement in the set status, thereby establishing the set status of the latch arrangement and generating an ON control signal from an output of the micro-controller.
11. The arrangement of claim 10 wherein the microcontroller includes or is in communication with a timer arrangement
12. The arrangement of claim 1 wherein the load switching arrangement includes back-to-back field effect transistors. 5
13. The arrangement of claim 12 wherein the back-to-back field effect transistors are N-channel enhancement mode MOSFETs with source terminals connected together with gates connected together and the drain terminals acting as two power terminals. Lamp load t7 Gate control voltage 230V Voltage level ac Latch detector Tlmer
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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AU2016902414 | 2016-06-21 |
Publications (1)
Publication Number | Publication Date |
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NZ733068A true NZ733068A (en) |
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