NZ338096A

NZ338096A - Amplifier circuit for radio transmitter using LINC techniques

Info

Publication number: NZ338096A
Application number: NZ33809699A
Authority: NZ
Inventors: Stephen Ian Mann
Original assignee: Tait Electronics Ltd
Priority date: 1999-09-29
Filing date: 1999-09-29
Publication date: 2001-06-29
Also published as: WO2001024355A1; AU7972800A

Abstract

A LINC (linear amplification using non-linear component) type amplifier (Fig 4) for a radio transmitter includes a processor 40 generating a pair of phase modulation signals P1, P2 from input signal B(t) and a pair of phase locked loop frequency synthesizers 41 (Fig 5) that have division ratios controlled by the modulation signals to generate respective phase modulated amplified signals V(t). The phase modulated output signals are combined at 42 to form the amplifier output signal for the antenna.

Description

NEW ZEALAND PATENTS ACT, 1953 No: Date: COMPLETE SPECIFICATION IMPROVEMENTS RELATING TO LINC TRANSMITTERS We, TAIT ELECTRONICS LIMITED, a New Zealand company, of 558 Wairakei Road, Burnside, Christchurch, New Zealand, do hereby declare the invention for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: I INTELLECTUAL PROPERTY OFFICE] OF N.Z. "1" 2 9 SEP 1999 j CHiVFD 2 FIELD OF THE INVENTION This invention relates to amplification systems for radio frequency signals and in particular but not solely to linear amplification using non-linear component (LINC) 5 techniques for radio transmitters. These techniques involve primarily digital rather than analog signal processing and a multiple phase-lock-loop (PLL) arrangement having various aspects of phase modulation and phase adjustment. In one embodiment each PLL involves fractional-N frequency division.

BACKGROUND TO THE INVENTION Mobile communication systems generally require high frequency power amplifiers for both base station transmitters and portable units carried by users. These amplifiers operate most efficiently at saturation in the non-linear range of their 15 input/output characteristics. Efficiency is important for long battery life and low weight in the portable units. However, the circuitry required for linear operation of a transmitter often reduces the efficiency which can be achieved. A number of techniques have been developed to compensate for non-linear amplifier operation. Traditional LINC circuits such as shown in Figure 1 involve two branches which 20 produce constant-amplitude phase-varied signals that can be amplified by a nonlinear device operating in saturation and then added to give a required output signal.

SUMMARY OF THE INVENTION It is an object of the present invention to provide for improved amplification systems based on LINC techniques. In one form the invention implements largely digital processing to determine phase information from an input signal for two or more branches formed by frequency synthesisers. Preferably the synthesisers are PLLs with fractional or integer N dividers. In another form the invention also determines 30 amplitude information for the branches in addition to the phase information.

Accordingly in one aspect the invention may broadly be said to consist in an amplification system for a radio transmitter comprising: a processor which generates a pair of phase modulation signals from an input signal, a pair of PLL frequency 35 synthesisers which are controlled by the modulation signals to generate respective INTELLECTUAL PROPERTY OFFICE OF N.Z. 1 7 APR 2001 RECEIVED 3 phase-modulated amplified signals, and a combiner which forms an output signal from the amplified signals. Preferably the processor generates a pair of amplitude modulation signals from the input signal, and the frequency synthesisers are also controlled by the amplitude modulation signals to vary the amplitude of the 5 amplified signals.

In another aspect the invention consists in an amplification system for a radio transmitter comprising: a processor which generates a pair of phase modulation signals from an input signal, a pair of phase-lock loops which are controlled by the 10 modulation signals to generate respective phase-modulated amplified signals having substantially constant amplitude, and a combiner which forms an output signal from the amplified signals.

In another aspect the invention may be said to consist in an amplification system for 15 a radio transmitter comprising: a processor which produces a pair of modulation signals from an input signal, a pair of phase-lock loops which are controlled by the modulation signals to generate respective phase modulated signals having substantially constant amplitude, a pair of power amplifiers which respectively receive the signals having constant amplitude from the phase-locked loops and 20 generate amplified signals, and a combiner which forms an output signal from the amplified signals.

In still another aspect the invention may be said to consist in an amplification system for a radio transmitter comprising: a processor which produces two pairs of 25 modulation signals from an input signal, four signal paths which each include a phase-lock loop and are respectively controlled by the modulation signals to generate phase modulated amplified signals, a pair of combiners which form a quadrature signal from respective pairs of the amplified signals, and a combiner which forms an output signal from the quadrature signal.

INTELLECTUAL PROPERTY 1 OFFICE OF N.Z. 1 7 APR 2001 RECEIVED 4 BRIEF LIST OF FIGURES Preferred embodiments of the invention will be described with respect to the accompanying drawings of which: Figure 1 schematically shows a radio transmitter with amplification of a signal by a signal separation system, Figure 2 shows a signal separation system involving dual quadrature modulators, Figure 3 is a vector representation of signals in the system of Figure 2, 10 Figure 4 shows a first embodiment of a separation system according to the invention, Figure 5 is a PLL arrangement for use in the system of Figure 4, Figure 6 shows a second embodiment of a separation system according to the invention, Figure 7 is a vector representation of signals in the system of Figure 6, Figure 8 indicates signal processing steps in the system of Figure 6, and Figure 9 shows a third embodiment of a separation system according to the invention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS Referring to the drawings it will appreciated that the invention may be implemented in various forms and that these embodiments are described by way of example only. Details of existing mobile communication systems will also be known to a skilled 25 reader and need not be given here.

Figure 1 shows the general form of a traditional LINC amplification system on which the present system is approximately based. An incoming baseband signal S is converted by a separator 10 into two signals SI and S2 which have constant 30 amplitude and which represent the baseband information through variations in phase. These signals are respectively amplified by non-linear amplifiers 11 and 12 each generally operating in saturation with gain G. The amplified signals are combined in an adder 13 to produce an output signal G.S for transmission by antenna 14. One limitation with analog versions of this arrangement has been a need to implement an inverse cosine function. The signals are generally processed by the signal separator according to: S(t) = E(t)cos(cot + (f>{t)) 51(£) -EH sin(6? (t) + + a(0) S2(t) -El 2 sin(0 (t) + <f>(t)~ a(t) a(t)= cos~l(E(t)/ E) Figure 2 shows a LINC system in which a digital separator 20 produces quadrature signals SI1, SQ1 and SI2, SQ2 which are frequency upconverted in mixers 21 and combined in adders 22. Non-linear devices 23 amplify the added signals to give SI and S2 which are combined in adder 24. One limitation with a system of this kind are the phase and gain imbalances which typically arise in each branch and may vary across the relatively broad bandwidth of the branches. Various modifications have been proposed to correct for the imbalances. Another limitation is the requirement for a dual quadrature mixer arrangement which can be complex to implement. Figure 3 is a vector representation of the signals in this system. The signals are generally processed according to: (0 = SI(t) + SQ(t) 1(0 = 5/1(0 + £01(0 = S(t) + e(t) 2(0 = 572(0 + Sfi2(0 = 5^0 " <0 :o-isQ(o+jsm^SI(t/+SQ(tri Figure 4 shows one embodiment of an amplification and modulation system based on LINC techniques according to the invention. A digital processing system 40 such as a DSP produces two phase information signals PI, P2 from an incoming baseband signal B which may be real or complex. Each signal is provided on a phase modulation path to control modulation of frequency synthesisers 41 in respective branches of the system. Each branch generally contains a non-linear power amplifier as described in relation to the example of Figure 5. Output signals VI and V2 from the branches are generally of constant amplitude and varying phase, and are 6 combined in adder 42 to produce signal V. The processing system preferably determines respective phase offset signals 01, 02 for the branches which are provided over phase adjustment paths as described further below. A feedback arrangement including detection of phase and/or gain errors in signal V also 5 preferably provides a feedback signal F for the processing system. A quadrature detector and ADC system 43 might be used to derive feedback from the signal V for example.

Figure 5 shows a frequency synthesiser formed by a PLL arrangement which could 10 be used in each branch of the embodiment of Figure 4. A wide range of other PLL systems might also be used such as multiple loop forms. The arrangement produces an amplified output signal having a frequency which is an integer or fractional multiple of a reference signal and which is modulated according to either of signals PI, P2 from the digital processing system 40. A voltage controlled oscillator 50 15 receives a control signal from phase comparator 51 by way of loop filter 52, and produces a constant amplitude signal for the non-linear amplifier 54. The loop filter generally integrates an output from the comparator according to phase differences between a reference signal at frequency f from source 53 and a feedback signal from the amplifier. The amplifier normally has several stages some or all of which may 20 be included in the PLL depending on delay and bandwidth effects. A phase offset may be introduced between the reference and feedback signals by a respective signal 01, 02 to control an additional current source or sink at the loop filter, for example.

The PLL in Figure 5 may be used in each branch of the system in Figure 4 to 25 produce signals VI, V2 which are added to give V. A feedback loop from the amplifier 54 to comparator 51 includes frequency divider 55 according to integer or fractional-N synthesis techniques. The divider is controlled by a modulator 57 which introduces a respective phase control signal PI or P2 in each branch of the system. The modulator determines an instantaneous integer division value N1 or N2 30 on clock pulses taken from the output of the divider. An optional limiter 56 removes amplitude information from the output of the amplifier for input to the divider. Reference source 54 is preferably common to each branch in the system and the signals produced by respective oscillators 50 then have frequencies Nlf and N2f. Fractional multiples of the reference frequency are also possible depending on action 35 of the modulator. Adder 42 then produces signal V with a frequency Nvf which is INTELLECTUAL PROPERTY OFFICE OF N.Z. 1 7 APR 2001 RECEIVED 7 an amplified form of the baseband signal B. By comparison with Figure 1 the signals in this system may be stated in analog form as: V(t)= Vl(t)+F2(t) Vl(t)= Gsin(2xNlft) = Gsm{2jrf(NV - 5N\)t) V2(t)= Gsin(2;rvV2ft) = Gs'm(2xf(NV - 5N2)t) S(t)-a(t) d(t)+a(t) SNl = — — SN2 = — — CO CO B(t) = BI{t) + BQ{t) (/){t) = tsrCx[BI{t) / BQ(tj) G-EI2 co - 2 jtfN Figure 6 shows another embodiment of an amplification system according to the invention. This arrangement is similar to that of Figure 4 except that the power output of each branch is now controlled for improved efficiency and bandwidth. A digital processing system 60 receives a baseband input signal B for amplification, and produces a pair of phase information signals N1, N2 and a pair of envelope information signals Al, A2. The phase signals control the division values of respective frequency synthesisers 61 such as described in relation to Figure 5. Other conventional LINC and synthesiser arrangements might also be used in the configuration. The envelope signals control the gain G of each synthesiser, preferably by way of the voltage supply to each of non-linear amplifiers 63. Output signals Y1 and Y2 from the branches are generally of varying amplitude and varying phase, and are combined in adder 62 to produce signal Y. The processing system preferably determines respective phase offset signals 01, 02 as before, but these have been omitted for clarity. A feedback arrangement including detection of phase and/or gain errors in signal Y is also preferably included. The signals in this system may be represented in analog form according to: 7(0 = 71(/) + Y2(t) 71(0= ^l(0sin(2^Vl/0= A\(t)sm(2?rf{NV - 8N\)t) 72(0= A2(t)sm{2nN2ft)=- A2(t)sm.{2iif(NV - 5N2)t) Mt)-a\t) <f(t)+a\t) SNl = — — 8N2 = — — 0) (0 INTELLECTUAL PROPERTY OFFICE OF N.Z. 1 7 APR 2001 REC EIVEi 8 Figure 7 uses vector representations to compare the synthesis of signals V and Y in the embodiments of Figures 4 and 6 respectively. These signals are given different labels to reflect different processing of the baseband signal B. Some reduction in the bandwidth requirements of each branch can be obtained for signal Y by reducing the power of the non-linear amplifiers in each synthesiser. Reducing the amplitude of signals Yl, Y2 reduces their rate of change of phase and therefore their bandwidth, as indicated by the magnitude of angle a. On the other hand increasing the information content of signals Al, A2 to achieve this effect increases their bandwidth in turn. Efficiency of the amplifiers is also reduced at lower gain values.

Figure 8 indicates generally the operation of a signal processor 60 in Figure 6. Processes 81 and 82 determine envelope and phase information for the baseband signal B. The digital signals Al, A2, Nl, N2 are then calculated to satisfy equations given above. Processes 83 and 84 for Nl and N2 require the amplitudes of Yl and Y2 for the inverse cosine function. The amplitudes are ideally equal but may be varied by process 85 in response to detection of imbalances between the branches by way of feedback from the output Y. A filter 86 reduces the dynamic range and bandwidth of the envelope information if required.

Figure 9 shows a further alternative embodiment of an amplification system based on LINC techniques according to the invention. This system is a development of that in Figure 4 having four branches for frequency synthesis, amplification and combination to produce an RF output signal X for transmission. Digital processing calculations and power losses in adders may be reduced by a system of this kind and still further branches might be used. A simplified system is shown for clarity and it will be appreciated that phase offset control such as described in relation to Figures 4 and 5, and amplitude control such as that described in relation to Figure 6 may be included in each branch if required. Feedback from the output signal may also be included to correct for distortion due to imbalance between the branches, for example. A digital processor 90 receives the baseband input signal B and produces four phase information signals Nl, N2, N3, N4. The phase signals control the division values of respective frequency synthesisers 91 such as described in relation to Figure 5. A common source 92 of reference frequency is indicated. 1 ? APR 2001 RECEIVE® Each synthesiser 91 in the arrangement of Figure 9 produces a respective output signal XI, X2, X3, X4 according to the phase information from processor 90. The signals are then combined in pairs by adders 93 to produce signals XI, XQ which are in turn combined by adder 94 to produce signal X. Quadrature imbalances in XI, 5 XQ are easily corrected by amplifier gain control or phase offsets as described, or by equalisation filters. The signals may generally be represented according to: X{t) = XI (t) + XQ(t) XI (0 = BI(t)cos{cot) = X\(t) + X2(t) XQit) = BQ{t) cos(M + k / 2) = X3(t) + XA{t) El E2 XI (t) = — sin {cot - a 1(0) X3(t) = —— si n(cot + k /2 - a2(t)) El E2 X2(t) = —sin(^+ or 1(/)) ^4(0 = -r-sin(^ + n / 2+ ^2(0) a 1(0 = cos"1 (BI(t) IE) cc2{t) = cos / E) SN\{t) = -a 1(0 / co SN3(t)= n / 2co - a2{t) / co SN2(t) = a 1(0 / co SN4(t) = n/2 co + a 2(0 / 6) Signals which are not combined in phase or in quadrature can lose up to 3dB in output power, depending on their statistical values over time. By manipulating 10 X1,X2,X3,X4 the system of this embodiment may enable a reduction in losses of this kind. Digital processing of the baseband signal requires only an inverse cosine function without an inverse tangent function so calculations may be simplified.

Claims

CLAIMS:

1. An amplification system for a radio transmitter comprising: a processor which generates a pair of phase modulation signals from an input signal, a pair of PLL frequency synthesisers which are controlled by the modulation signals to generate respective phase-modulated amplified signals, and a combiner which forms an output signal from the amplified signals.

2. A system according to claim 1 wherein: the processor also generates a pair of amplitude modulation signals from the input signal, and the frequency synthesisers are also controlled by the amplitude modulation signals to vary the amplitude of the amplified signals.

3. An amplification system for a radio transmitter comprising: a processor which generates a pair of phase modulation signals from an input signal, a pair of phase-lock loops which are controlled by the modulation signals to generate respective phase-modulated amplified signals having substantially constant amplitude, and a combiner which forms an output signal from the amplified signals.

4. A system according to claim 3 wherein: each phase-lock loop includes a frequency divider which is controlled according to a respective modulation signal from the processor.

5. A system according to claim 3 wherein: at least one of the phase-lock loops includes a phase comparator in which a phase offset between a reference signal and a loop signal is adjusted by the processor in response to feedback from the output signal.

6. A system according to claim 3 wherein: each phase-lock loop includes a power amplifier which provides the respective phase-modulated amplified signal for the combiner. 1 7 APR 2001 RECEAVEi 5 10 15 20 25 30

7. An amplification system for a radio transmitter comprising: a processor which produces a pair of modulation signals from an input signal, a pair of phase-lock loops which are controlled by the modulation signals to generate respective phase modulated signals having substantially constant amplitude, a pair of power amplifiers which respectively receive the signals having constant amplitude from the phase-locked loops and generate amplified signals, and a combiner which forms an output signal from the amplified signals.

8. A system according to claim 7 wherein: the processor generates a pair of amplitude modulation signals from the input signal, and the amplifiers are controlled by the amplitude modulation signals to vary the amplitude of the amplified signals.

9. An amplification system for a radio transmitter comprising: a processor which produces two pairs of modulation signals from an input signal, four signal paths which each include a phase-lock loop and are respectively controlled by the modulation signals to generate phase modulated amplified signals, a pair of combiners which form a quadrature signal from respective pairs of the amplified signals, and a combiner which forms an output signal from the quadrature signal.

10. A system according to claim 9 wherein: the signals generated by the phase-lock loops have substantially constant amplitude.

11. A system according to claim 9 wherein: the processor generates at least one amplitude modulation signal from either the input signal, feedback from the quadrature signal, or feedback from the output signal, and amplification of at least one of the signal paths is varied according to the amplitude modulation signal.

12. An amplification system substantially as herein described with respect to the accompanying drawings except Figure ^^3^^ umneD By the authorised agents A. J. PARK 1 7 APR 2001 PwllIjKiW-