NZ225301A - Programmable balance fir filter - Google Patents

Description

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■ : ' TRUE COPY 2253 0 1 NEW ZEALAND PATENTS ACT 1953 COMPLETE SPECIFICATION "PROGRAMMABLE BALANCE FILTER ARRANGEMENT" WE, STANDARD TELEPHONES AND CA3LES PTY. LIMITED, A Company of the State of New South Wales, of 252-280 3otany Road, Alexandria, New South Wales, 2015, Australia, hereby declare the invention for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: 1 *• ; ' i d A *■ * This invention relates to digitally implemented filters, and in particular, though not exclusively to programmable balance filters used to achieve trans-hybrid balancing for a range of subscriber line characteristics in primary multiplex telecommunication equipment.

A known readily available filter of the above type is an n-tap Finite Impulse Response (FIR) filter having eight programmable coefficients and a tap spacing of 62.5 u/s to which is applied a conventional iterative algorithm such as, for example, the Least Mean Square (LMS) algorithm to adjust the filter coefficients to achieve optimum trans-hybrid balancing.

In some digital switching systems, however, digital processing is accomplished at a frame rate of 8 kHz thereby providing a digital output/input for transmission/reception every 125 u/s. If a FIR filter having taps spaced at 125 u/s is unavailable and it is necessary to use the aforementioned known FIR filter having taps spaced at 62.5 u/s (16 kHz), optimum trans-hybrid balancing cannot be achieved because the conventional iterative algorithms will only balance the filter to an accuracy corresponding to the lower sampling frequency which may not meet specifications required by the telecommunication authority.

It is therefore an object of the present invention to provide a method of balancing a programmable balance filter wherein the clock rate at which the errors are sampled is not significant.

According to a first aspect of the invention there is provided a method of providing trans-hybrid balance for a range of line characteristics of a 2-wire line coupled to a 4-wire digital communication circuit comprising a send circuit and a receive circuit, said coupling of the 2-wire line to the 4-wire communication circuit being facilitated by a programmable n-tap Finite Impulse Response filter means comprising n-tap coefficients, wherein the trans-hybrid balance of said filter is achieved by perturbing each tap coefficient positively by a predetermined value and then perturbing each coefficient negatively by a predetermined value, after each perturbation a test pulse of a predetermined length Is injected into said receiver circuit and an error signal produced by said test pulse is read by error measuring means coupled to said send circuit and stored in a memory means associated with a processor means, a gradient is calculated by said processor means for each coefficient until the magnitude of all gradients adjusts below a predetermined value stored in said processor. 3 225301 According to a further aspect of the invention there is provided an arrangement comprising a 2-wire line coupled to a 4-wire digital communication circuit having a send circuit and a receive circuit, said coupling of the 2-wlre line to 5 the 4-wire digital communication circuit being facilitated by a programmable n-tap Finite Interface Response filter means comprising n-tap coefficients, wherein said arrangement includes error measuring means selectively coupled to said send circuit, a test pulse generator means selectively 10 coupled to said receive circuit, said error measuring means and said test pulse general ^eans being operatlvely associated with a processor means and a memory means, whereby trans-hybrid balance of said filter for a range of line characteristics of said 2-wire line is achieved by perturb-15 ing each tap coefficient positively by a predetermined value and then perturbing each coefficient negatively by a predetermined value, and after each perturbation causing said test pulse generator means to inject a test pulse of a predetermined length into said receiver circuit, an error sig-20 nal produced by said test pulse being read by said error measuring means and stored in said memory means, said processor means calculating a gradient for each coefficient until the magnitude of all gradients adjusts below a prede- 22550 termined value stored In said memory Indicating optimum trans-hybrid balance.

In order that the Invention may be readily carried Into effect, embodiments thereof will now be described, in which: 5 Pig. 1 shows an arrangement of a PIR filter; Pig. 2 shows a block diagram of an arrangement incorporating the Invention.

Referring to the drawing the PIR balance filter shown in Pig. 1 comprises a filter input means coupled to seven 10 cascaded digital registers T1-T7. The input means together with the output of each register Is provided with tap output means applied to eight multipliers Xl-XS. During each cycle of the clock frequency at which the filter operates, tap coefficients b0-b8 are multiplied by the tap output and the 15 results of the multiplications are summed In summing means 2 to produce the filter output signal at filter output 3 for that particular clock cycle.

Referring to Pig. 2, there Is shown elements of multiplex equipment associated with a 30 channel PCM telecommuni-20 cation system for combining 30 voice frequency channels into a single 2048 Kbit/s digital stream. The elements consist of a Subscriber line Audio Processing Circuit (SLAC) 4 and a Signalling Control Unit (SCU) 5. 22530 The SLAC 4 Is a digital signal processing device which performs all coding, decoding and filtering functions for processing VP analogue signals Into Pulse Code Modulated (PCM) outputs via the Analogue/Digital converter 6, and 5 processing PCM inputs into analogue outputs via the Digital/Analogue converter 7. The process is accomplished at a frame rate of S kHz and the digital output/input is available for transmission/reception every 125 u/s providing 32 S bit channels per frame.

Further, SLAC ^ incorporates a hybrid balance arrange ment to facilitate 2 wire to 4 wire conversion of the 2 wire subscriber line coupled to SLAC ^ via the 2 wire line Interface 8. The hybrid balance arrangement is in the form of an FTP. balance filter details of which are shown in Fig. 1, and 15 a summing device 9. The balance filter forms a feedback path from the receive path to the transmit path, the summing device 9 performing a cancellation of the echo signal by summing the receive signal received via the balance filter and the receive signal from the transmit signal path. The bal-20 ance filter Is coupled to and controlled by a central micro processor 11 associated with the SCU 5 which is arranged to detect the configuration of each SLAC and thereby Implement the correct signalling protocols. 22530 Central microprocessor 11 implements the software algorithms required for channel scanning and processing of signalling protocols. Moreover, microprocessor 11 implements a hybrid balance algorlthra to initially adapt the hybrid bal-5 ance filter to match the associated V? circuit viz the sub scriber line.

The hybrid balance algorithm used is an Iterative algorithm called a perturbation algorithm a description of which is as follows: Making use of the following notation: - the output signal from the SLAC is sampled over the integer m.

- T Is the system sampling period of 125 u/s. - b,^ is the matrix of FIR filter tap coefficients apply ing during Iteration k. - i and J are integers representing the coefficient to be perturbed. I, j = 0,1, 7. _ i!+rt represents a positive perturbation. 20 - represents a negative perturbation.

- L Is the number of output samples measured. 7 22530 Let v(mT, b, ,J, + ) be the output sequence obtained from the SLAC when the tap coefficient vector of the balance filter Is set to b = bk + * e j (1) where e_^ Is a vector which Is all zero except for the J component which Is 1 and X is a positive constant, and the test sequence Is applied. Note that (1) merely states that til has been perturbed by an amount "g only in Its j * component .

Similarly, let v(mT, b, , J, -) be the output sequence obtained from the SLAC when the tap coefficient vector of the balance filter is set to b = bk - X e j (2) Note that v (m? ,b k, J , -O and v (ml, b_k, j , - ) are both sequences at 8KHz available at the output of the SLAC.

It can be shown that the n components of the gradient g(b ) are given by: L [g(bk)] = 1 T (v(mT,bk, I, +)2 - v(m?,bk, I, -)2) (3) 2 Tj f and m=l kk+1 ' bk -=g(b^ W The hybrid balance perturbation algorithm is Invoked by the operation of a "Train Hybrid" key (not shown) on the SCU. After selecting the channel whose hybrid is to be bal- 22530 anced, the "Train Hybrid" key is operated and the following sequence of events occur: 1. Microprocessor 10 causes all coefficient values in the 5 3alance filter to be set to zero. 2. Filter coefficient bO is then "positively perturbed" by having a snail predetermined value added to It by the microprocessor. (See equation 1). 3. The microprocessor causes a test pulse of 125 u/s to be 10 injected In Timeslot 0. 4. The test pulse amplitude is distorted by reflections and echoes caused by the 2 wire line characteristic and by leakage of the test pulse signal from the "Rec" path Into the "Trans" path. 5- The distorted test pulse Is returned on the "Trans" path to the microprocessor via the "Read Return Error" means. 6. The "Read Return Error" means reads the digital samples of the returned pulse and stores representation of those signals In the microprocessors memory (V[mT, bk,;}, + ])• 20 7. The first filter coefficient is returned to bO which is "negatively perturbed" by having a small predetermined value subtracted from it by the microprocessor (See equation 2). 2253 The microprocessor causes the "Test Signal Generator" to Inject a second test pulse into the Tine-slot 0 and steps 1 to 6 above are repeated so that digital samples of the "Trans" signals are read by the Read Return Error means and representations of those signals are stored In the microprocessor memory (V[mT,bk,j, -]).

The first coefficient Is restored to its original value of bO by the microprocessor.

An error gradient is calculated by the microprocessor based upon the two sets of readings stored in its memory (see equation 3) Steps 1 to 10 are repeated a further seven times for perturbing the remaining 7 coefficients resulting In a total of 8 error gradients stored in the memory. The 3 error gradients are then utilized by the microprocessor to calculate 8 new coefficient values (see equation 4).

The first filter coefficient bO is "positively perturbed" by having the small predetermined value (see equation 1) added to It by the microprocessor and steps 3 to 12 above are repeated until the microprocessor determines the magnitude of the eight error gradients is below a predetermined value therefore Indicating to the 22530 microprocessor that optimum balance has been accom-plished. 14. The microprocessor returns the channel to normal operation and stores a copy of the determined coefficients In 5 a non-volatile memory so that if the SLAC is replaced the previously determined coefficients apply.

A weighting element may be Introduced which is calculated to envisage distortion of the test signal by charac-10 teristics of components In the filter.

It can be seen that only the overall error is required to update each tap coefficient and thus time alignment of the errors and coefficient is not necessary. Consequently, the clock rate at which the errors are sampled is not sig-15 nifleant. 11

Claims (10)

225-30 What we claim is:

1. A method of providing trans-hybrid balance for a range of line characteristics of a 2-wire line coupled to a 4-wire digital communication circuit comprising a send circuit and a receive circuit, said coupling of the 2-wire line to the 4-wire communication circuit being facilitated by a programmable n-tap Finite Impulse Response filter means comprising n-tap coefficients, wherein the trans-hybrid balance of said filter is achieved by perturbing each tap coefficient positively by a predetermined value and then perturbing each coefficient negatively by a predetermined value, after each perturbation a test pulse of a predetermined length is injected into said receiver circuit and an error signal produced by said test pulse is read by error measuring means coupled to said send circuit and stored in a memory means associated with a processor means, a gradient is calculated by said processor means for each coefficient until the magnitude of all gradients adjusts below a predetermined value stored in said processor.

2. A method as claimed in claim 1, wherein the value by which each tap coefficient is perturbed positively and negatively is: b = ej and b = bk - ^ej, respectively; where b_k is the matrix of the Finite Impulse Response filter 12 tap co-efficients applying during Iteration k, and ej is a til vector which is all zero except for the J component which Is I, and Y is a positive constant.

3. A method as claimed in claim 1 0^ 2, wherein said Finite Impulse Response filter means comprises n taps space at 62.5 ~s, and wherein said digital communication circuit Is arranged such that digital processing therein is accomplished at a frame rate of S kHz.

4. A method of providing trans-hybrid balance, substan tially as herein described with reference to Figs. 1 and 2 of the accompanyng drawings. 5. An arr ip.gement comprising a 2-wire line coupled to 4-wire digital csmmunIcation circuit having a send circuit and a receive circuit, said coupling of the 2-wire line to the 4-rfi.re digital communication circuit being facilitated by a programmable n-tap Finite Interface Response filter means comprising n-tap coefficients, wherein said arrangement includes error measuring means selectively coupled to said send circuit, a test pulse generator means selectively coupled to said r-celve circuit, said error measuring means and said test pulse general means being operatively associated with a processor means and a memory means, whereby trans-hybrid balance of said filter for a range of line / 9 5 C. <— ft*. characteristics of said 2-wire line is achieved by perturbing each tap coefficient positively by a predetermined value and then perturbing each coefficient negatively by a predetermined value, and after each perturbation causing said test pulse generator means to inject a test pulse of a predetermined length into said receiver circuit, an error signal produced by sal "est pulse being read by said error measuring means and stored in said memory means, said processor means calculating a gradient for each coefficient until the magnitude of all gradients adjusts below a predetermined val^e -> tj in said memory indicating optimum trans-hyb^Id in-ie.

5. An a:-r-i".genenr. as claimed in claim 5> wherein the value by which each tap coefficient is perturbed positively and negatively is: b = +yej and b = b^ -y ej respective!'/ where b. is the matrix of the Finite Imoulse Resoonse

— K * filter tap coefficients applying during iteration 5c, and ej th is a vector *rhich is all zero except for the j component which is I; and '• is a positive constant.

7- An arrangement as claimed in claim 5 or 6, wherein said Finite Impulse Response filter means comprises n-taps spaced at 62.5 -s, and wherein said digital communication 14 ^ o />• // 225 circuit is arranged such that digital processing Is accomplished therein at a frame rate of 8icHz.

8. An arrangement as claimed in claim 7, wherein said test pulse is a single sample Impulse of 125 us length.

9- An arrangement substantially as herein described with reference to Pigs. 1 and 2 of the accompanying drawings.

10. An arrangement as claimed in any one of claims 5 to 9, associated with a 30 channel Pulse Code Modulated telecommunication system. STANDARD TELEPHONES AMD CABLES PTif. LIMITED / P.M. Conrick Authorized Agent ?5/1/170 3 ? Ar£//: 15