NZ201224A - Coin testing: sequential tests with parameters of second test adjusted according to results of first test - Google Patents

Description

t 201224 Under the provisions of Regtli lation 23 (I) the Priority Ds?s{s): . .3?.'$.'.74 Corr.p!©-!© Specification F Class: P'%?/'MAY' 198'4 Publication Oats: | P.O. No: • i i i i • • Specification has been ante-dated to - 19.£?L •- Initials PATENTS FORM NO. 5 PATENTS ACT 19 53 COMPLETE SPECIFICATION COIN DISCRIMINATING APPARATUS We, P.A. MANAGEMENT CONSULTANTS LTD, a British'company, of Hyde Park House, 60A Knightsbridge, London, SWlX 7LE, ENGLAND, hereby declare the invention, for which we pray that a patent may be granted to us,and the method by which it is to be performed, to be particularly described in and by the following statement: CHAriSE OF ME 0F AFPLIMHT /'A "J' (O ■ vy /? frl'i (followed by cage 1 A^ 201 - 1A - COIN DISCRIMINATING APPARATUS This invention relates to a coin discriminating apparatus for responding to coins of valid denominations, discriminating against non-valid denomination coins and forgeries, in coin operated apparatus.

Many coin operated apparatus exist in many different fields (for example dispensing machines, gaming machines, ticket machines). Protection is required against operation in response to dummy coins or forgeries and against operation in response to coins of the wrong denomination, for example lesser-value coins from countries other than the country for use. For example, the German IDM coin needs protection against other coins of similar size and shape, such as the U.K. 5p coin, the Spanish 5PTAS, the Austrian 5sch and others.

According to one embodiment of the present invention there is thus provided a coin discriminating apparatus, comprising a path for the passage of coins in a given direction and first and second coin testing means associated with said path, the first coin testing means being arranged to provide an electrical output signal representing one of a number of categories to which different valid coin denominations belong, and the second coin testing means being adjusted in response to said electrical output signal to test specifically for the valid coin denomination represented by said 201224 electrical output signal and wherein said first coin testing means comprises a transmitting coil and a receiving coil disposed on opposite sides of said path, an a.c. signal generator connected to said transmitting coil and means for providing said electrical output signal as a function of the phase displacement of the a.c. signal induced in the receiving coil when a coin is disposed between said coils.

This apparatus is intended for coin operated apparatus which is required to respond correctly to several different denomination coins, perhaps totalising the value of the coins accepted. The apparatus is then required to / / ' 2012 24 differentiate between the different valid denomination coins and to discriminate against, or reject, the non-valid coins or other objects.

This apparatus differs from previous multiple test methods, wherein the individual tests are fixed and independent of each other, insofar as the results of the first test are used to adjust the test parameters of the second test. The advantages are: 1) Only two tests are required to validate a large number of coins; 2) No mechanical routing of coins to independent tests is required and all coins can follow the same path; 3) The interdependent nature of the two tests allows the second test to be precisely "tuned" to the coin which the first test has caused it to expect; and 4) Both tests need only be relatively simple, the first because it does not have to distinguish between valid coins and similar non-valid coins, and the second because it has only to make a yes/no decision, thus discriminating against the fakes.

A particular embodiment to be described herein employs a microprocessor to adjust the parameters of the second test in response to the results of the first test. This has the particular advantage that ttie processor may be programmed differently for different applications, i.e. where the apparatus is required to accept a different series of coins (whether different values within a given country or the coins of different countries).

Embodiments of the invention wdJLl now be described, by way of example only, with reference to the accompanying drawings, in which: 12 2 4 FIGURE 1 is a circuit diagram of a coin discriminating apparatus; FIGURE 2 is a series of waveform diagrams applicable to the apparatus of Figure 1; FIGURE 3 is a schematic circuit diagram showing the principle of a first testing means in a second coin discriminating apparatus; FIGURE 4 shows two waveform diagrams applicable to Figure 3i FIGURE 5 is a schematic front view of the second coin discriminating apparatus to show the physical layout of certain parts only thereof; and •> FIGURE 6 is a detailed circuit diagram of the second apparatus.

Referring to Figures 1 and 2, a coin discriminating apparatus comprises transmitting and receiving coils 1,2 disposed on opposite sides of a path for the passage of coins, a coin 3 under test being shown between the coils. The transmitting coil 1 is connected to a signal generator, such as a current square wave generator, so as to give repetitive abrupt flux changes. A transistor k or other switching means is connected across the receiving coil 2 and is driven to short circuit the receiving coil 2 during the time the abrupt flux changes take place but to remove the short circuit a small, predetermined time delay t_ after each flux change.

Figure 2 shows at (a) the square wave Vtx applied to the transmitting coil and at (b) a drive signal applied to the base of transistor k. Figure 2 further shows at (c) the voltage waveform Vrx appearing across the receiving coil 2 when no coin or other object is disposed between the two coils, and at (d) the voltage waveform Vrx appearing across the receiving coil 2 when a coin is present between the two coils.

The presence of a coin or other object between the two coils affects the waveform Vrx in three ways. Firstly, it affects the manner in which energy from the transmitting coil is coupled into the receiving coil whilst the latter is short circuited; secondly, it affects the manner in which the receiving coil behaves when the short circuit is subsequently removed; and thirdly the receiving coil is affected by energy induced into the coin by the flux changes in the transmitting coil. Changes in the position of the coin, or its physical characteristics, therefore cause changes in the receiving coil waveform Vrx.

Figure 2(d) shows a voltage pulse or spike which is produced across the receiving coil 2 in response to the removal of the short circuit, and which is caused by induced current circulating in the receiving coil immediately prior to removal of the short circuit. The amplitude of this voltage pulse depends upon what object / or coin is present between the coils 1,2. Thus, an amplitude responsive means 5 is connected across the receiving coil 2 and is arranged, in the apparatus shown, to provide an output signal in response to a voltage pulse exhibiting a predetermined amplitude V or, preferably, an amplitude lying between upper and lower predetermined limits, indicating the presence of a correct coin.

In the apparatus of Figure 1, a single preset position of the coin is defined for effecting the test measurement by providing a detector, such as a light path detector, which is responsive to the coin reaching a predetermined position along its path to supply an enabling signal to the amplitude responsive means 5* Also, means are provided for supplying a sampling pulse (waveform (e) in Figure 2) a predetermined time delay after each removal of the short circuit across receiving coil 2 and coinciding with the occurrence of the voltage pulse (d), which sampling pulse is a further enabling signal for the amplitude responsive means 5* As in the apparatus to be described in connection with Figures 5 and 6, the amplitude responsive means is enabled only in the simultaneous occurrence of the sampling pulse and a pulse produced by the light detector in response to the coin reaching its set position.

The coin discriminating apparatus shown in. Figures 5 and 6 is capable of handling a number of valid coin denominations, differentiating between the.different valid denominations and discriminating against all non-Valid coins or objects. The apparatus carries out two successive tests on each coin, the first test differentiating the different valid coin denominations into cate-. gories and providing an output representing one of a number of such categories, and the parameters of the second test being adjusted in response to this output to test specifically for the valid coin denomination which that output represents, thus discrj niinating against all other coins or objects. The second test is based on the apparatus described in. connection with Figures 1 and 2, the adjustment being to the delay time t so that a constant voltage pulse amplitude V is expected. The first test will now be described with reference to Figures 3 and k.

Thus, Figure 3 shows coin testing means for the first test, comprising a transmitting coil 6 and a receiving coil 7 disposed on opposite sides of the path for the coins to be tested, one of which is shown at 8. A sine wave generator 9 is connected to the transmitting coil and a means, indicated diagrammatically at 10, provides an output representing the phase displacement which occurs, when a coin or other object is present, of the signal induced in the receiving coil relative to the signal applied to the transmitting coil. The transmitted and received signals under these circumstances are shown at (a) and (b) in Figure 4.

This first test is not tuned to detect any particular coin and is not required to measure the phase displacement to great accuracy, as sufficiently large differences in the phase displacement occur for the different denomination coins, and because the second test provides the necessary verification. 012 2 4 The output from the first coin testing means is used to classify the coin into one or another of a num- • ber of broad categories, with the aid of a microcomputer. Thus, the computer compares the measured phase displacement value with a look-up table in its memory to categorise the coin and provide the data for adjusting the second coin testing means to test specifically for the expected denomination.

Figure 5 shows in schematic form the physical layout of the two-test coin discriminating apparatus and Figure 6 is the detailed circuit diagram. Referring to Figure 5, a back plate 15 is formed with a channel l4 for passage of coins from an inlet 11 either to an acceptance outlet 12 in the case of correct or valid coins or to a rejection outlet 13 in the case of non-valid coins. The back plate 15 is slightly inclined to the vertical, as shown, so that a coin inserted at 11 (at the top of the back plate) will pass along the channel under gravity with one of its sides always flat against the flat bottom of the channel. Initially, the coin will fall until its edge meets the lower edge l6 of a first inclined portion 17 bf the channel, whereafter the coin will roll along this inclined portion to the top of a descending channel portion l8, down which the coin will again fall. Rejected coins will continue to fall down an extension lSa^ of channel portion l8 to the rejection outlet 13* Accepted coins will be deflected by a blade 191 which is driven by an acceptor solenoid across the channel in the direction A, through & slot in the bottom of the channel, so that the accepted coins will roll along the lower edge 20 of a second inclined portion 21 of the channel and -then fall to the acceptance outlet 12.

The two tests are carried out on each coin when that coin is -at the positions I and II indicated in Figure 5» both on the inclined portion 17 of the channel. Respective light path detectors 22 and 23 are arranged across the' channel to detect the leading edge of the coin when it reaches its testing positions I and II. 201224 The two coils 6,7 of the first coin testing means' (see Figure 3) are arranged above and below the channel at the position I and the two coils of the second coin testing means (corresponding to the two coils 1,2 shown in Figure l) are arranged above and below the channel at the position II- Because the coins are always in flat contact with the channel bottom, the coins are always precisely positioned relative to two coils at each testing position I and II.

A spring blade 24 is provided as a non-return device and is depressed to the floor of the channel by the weight of a coin to permit the coin to pass, but thereafter prevents withdrawal of the coin, as might be attempted in misuse of the apparatus by passing a coin into the inlet 11 on the end of a string. A third light path detector 25 detects when a coin has safely reached a position III beyond the non-return device 24.

Figure 6 is the detailed circuit diagram of the apparatus of Figure ?. The apparatus shown is particularly tailored for discriminating between the German lOpf, 50pf, IDM, 2DM and 5DM coins in a coin controlled apparatus which will accept all of these coins, totalising the value of the accepted coins. A description of the circuit of Figure 6 will now be given.

A 6MHz signal is applied .through a NAND gate Gl acting as a buffer to an 8 stage divider circuit comprising integrated circuits Bl. The output of the 6th stage of the divider (93.75KIIz) is applied to the transmitting coil.6 of the first testing means through an adjustable resistor VRl, which allows a fine adjustment of the phase shift between the divider output and the coil waveform. The first five stages of the divider are connected to inputs of an 8 input latch circuit Al enabling measurement of 32 steps of 5-6° over a l80° range. The receiving coil 7 is connected to the inputs of a comparator , circuit A2 which detects the zero-crossing of the signal induced in the receiving coil and has its output connected to a NAND gate G2. 2 012 2 4 The light path detector for the first testing means comprises a light emitting diode LED 1 and a photo-transistor PTi, the output of which is connected to an inverter II having a Schinitt trigger at its input and from tlience through an inverter 12 to the NAND gate G2. When a coin readies its correct position to break the light path between LEDl and PTi, a high level is produced at the output of inverter 12 and therefore the reset input to the D-type flip-flop FFl is removed. Thus, at the instant of the zero-crossing, a high level is clocked into the D-type FFl, the Q output of which is connected to a further D-type FF2 at which the positive-going edge of said Q output is re-timed by the 6>Eiz signal from the output of NAND gate Gl. The negative going edge.thus produced at the § output of D type FF2 produces a high level at the output of a NAND gate G3i which is applied to clock the 8 input latch Al and thereby store the state of its counter at the instant of the zero-crossing.

Pins 1,2,5i6,9i12,15i16 and 19 of the latch are connected to a micro-processor system (model 8080 by Intel) and the processor checks the state of the latch Al every 2ms and will read in the state of count which is reached at the instant of the zero-crossing, which count represents the phase displacement between the transmitting and receiving coils 6,7- The processor, compares this phase displacement value with its look-up table and determines if the coin is identified as one of the five valid coin denominations, in which case it resets the latch Al and adjusts the second testing means appropriately.

• The final stage output of the divider Bl is applied to a further divider,.comprising two D-type flip-flops B2, to produce a 6l(Hz square wave output. The reset input R of this divider is controlled by the processor so that this 6KHz output is only produced in response to completion of the first test and cannot interfere with the measurement effected in the first test. The 6KHz square wave drives a current source, comprising transistor TR2, through a transistor" TRl and the square wave current source output is applied to the transmitting coil 1 of the second testing means— The 6K!Iz output is also passed to an R-C delay . ' - 10 - 2 0 12 24 circuit comprising a selected one of the four variable resistors VR3,VR4,VR5>VR6 (in series with their respective fixed resistors R22,R21,R20,Rl9) and capacitor C3. A selector switch S connects the selected series resistors chain to the upper terminal of capacitor C3 under the control of the processor and according to which valid i coin denomination it recognises as a result of the first test. A comparator A3 reshapes the output of the RC delay circuit and produces a square wave which is delayed by the time jt relative to the square wave applied to transmitting coil 1. The value of is thus adjusted according to which coin denomination is recognised as a result of the first test. Owing to. their similar properties, the time delay _t required for the German lOpf and 50pf coins is the same, to give rise to a voltage spike of constant amplitude in the second testing means. Thus, the same resistor chain is selected for both coins and the second test verifies, inthis case, that the coin is either a 1'Opf or 50pf coin. Discrimination between these two coins is made by the processor on the basis of the phase displacement measurement made by the first testing means.

The delayed square wave from the comparator > drives a transistor TR3 through a transistor TR4, the transistor TR3 serving as the short circuiting transistor k of Figure 1 relative to receiving coil 2- The delayed square wave is also used to produce the sample pulse (e) of Figure 2, by application to an RC delay circuit VR7, C(t and thence to an inverter 13 provided in its input with a Schmitt trigger, providing the negative-going sample pulse which is applied to an input of a NAND gate Qk.

The second light.path detector, comprising LED2, PT2, inverters 14,15 and identical with the first light path detector, produces a prolonged liigh level 201224 output commencing when the coin reaches its correct position and continuing until the trailing edge of the coin has passed, and this high level output is applied to the NAND gate Gk and reset terminal of a D-type flip-flop FF3- The effect is that the sample pulse causes the D-type flip-flop FF3 output to go to its low level, thus passing a high level signal from the output of NAND gate G3, clocking the latch circuit to receive information at its pins 17 and 18. The high level from the light path detector is also applied through an inverter 16 to pin l8 of the latch to provide the information that the second test is being made.

The voltage spike, produced in the receiving coil 2 upon removing the short circuit applied by transistor TR3, is applied to the respective negative and positive inputs of two comparators A4,A5- If the amplitude of the spike lies between the upper and lower limits set by these comparators, then an output signal is applied to pin 17 of the latch Al.

The third light path detector comprises LED3, PT3 and inverters 17,18 ^nd is identical with the first and second detectors. When the light path is broken by the coin reaching position III (Figure 5)>'a low level > appears at the output- of a further inverter 19 and is applied to NAND gate G3, producing a high level output which clocks the latch Al to receive the information at -its pin 3, from inverter 18, that the light path has been broken.

The processor responds to the information in the latch that the second and third tests have been made with positive results to record which denomination of coin has been acccpted. If the coin satisfies the first and second tests, a transistor TR6 is rendered conductive to energise the acceptor solenoid SOL which drives the deflector 19 (Figure 5)• « 2©U<-< It is found that the properties of the German lOpf, 50pf and 2DM coins vary considerably, as compared to the IDM and coins. Thus, if one or other of these three coins is recognised by the first test, the "window" defined by comparators A4,A5 is enlarged in that the processor.renders a transistor TR5 conductive, \ - which transistor is in parallel with a variable resistor VR9 in the series resistor chain VR9,Rl7iRl6 into which the respective positive and negative inputs of the two comparators are connected.

It will be noted that the delay selector S shown operates in an analogue fashion. However, the control could instead be digital. Thus, the selector, selectable resistors and comparator would be replaced by an 8-stage presettable counter employing the existing clocking facility and having its overflow output controlling the short circuit transistor TR3- The four adjustments VR3-VR6 would then be removed and replaced with softwave control, with separate delay times being chosen for the lOpf and 5^pf coins. The delay time of VR7 and Ck may also be digitally.controlled from the same counter.

The circuit described, in the first test, measures the absolute phase displacement between transmitting and receiving coils. Instead, the phase dis-pla cement could be measured relative to that which occurs with no coin present. The processor then^requires regular notification of the no-coin phase shift in order to correct for temperature or long term changes. For example, the no-coin phase shift may be determined at the tine the coin reaches test 2, the no-coin phase shift information being sent to the processor at the same time as the result of the second test. An additional D-type flip-flop may- hold the result of the second test until the no-coin zero-crossing of the first testing means occurs, at which instant all information is clocked into the - x j 201224 latch Al.

The component values of the circuit are shown in Figure 6, the pin connections of the integrated circuits Al,Bl and S being as shown. Latch Al is circuit 74LS273 and the two circuits B1 comprise circuit 7^3931 both Texas Instruments. The two circuits B2 comprise circuit MCI4-013 and circuit S is MC l40l6, both by Motorola. The four comparators comprise LM 339 by National Semiconductors, the NAND gates comprise circuit 74lO, except Gl which is 7400, both by Texas Instruments, D-types FFl, FF2 and FF3 comprise Texas Instruments 7474, inverters 11,13,14 and 17 are Texas circuits 7kClk and the other inverters are Texas circuits 7404. The four coils 1,2,6,7 are identical and each comprises 300 turns of 0.0l6nim diameter enamelled copper wire wound on a diameter former.

In a modification, the micromputer is replaced by an ROM (read only memory) and the digital output signal from the first test is used to address this memory, the consequent output of which provides the parameter for the second test. In an additional, third test, which may alternatively simply replace the ab.ove-described second test, infrared light is directed at the edge of the coin and the reflected, light or its integral is compared with the parameter selected by the first test on 1 o C. U I L.

Claims (15)

WHAT WE CLAIM IS;

1. A coin discriminating apparatus, comprising a path for the passage of coins in a given direction and first and second coin testing means associated with said path, the first coin testing means being arranged to provide an electrical output signal representing one of a number of categories to which different valid coin denominations belong, and the second coin testing means being adjusted in response to said electrical output signal to test specifically for the valid coin denomination represented by said electrical output signal and wherein said first coin testing means comprises a transmitting coil and a receiving coil disposed on opposite sides of said path, an a.c. signal generator connected to said transmitting coil and means for providing said electrical output signal as a function of the phase displacement of the a.c. signal induced in the receiving coil when a coin is disposed between said coils.

2. An apparatus as claimed in Claim 1, further comprising a detector for the first coin testing means and responsive to a coin reaching a predetermined position along the path, relative to the first coin testing means, to supply an enabling signal to said electrical output signal providing means.

3. An apparatus as claimed in Claim 2, in which said detector for the first coin testing means comprises a light path detector. 2012 - 15 -

4. An apparatus as claimed in Claims 1, 2 or 3 in which said electrical output signal providing means comprises a counter the state of which is sampled in response to the a.c. signal induced in the receiving coil crossing its zero level.

5. An apparatus as claimed in any one of Claims 1 to 4, in which said electrical output signal providing means provides an electrical output signal of one of a number of selected values according to which of a number of ranges of values the measured phase displacement lies within.

6. An apparatus as claimed in Claim 5, in which said electrical output signal providing means includes a microcomputer for generating said electrical output signal in accordance with the measured phase displacement.

7. An apparatus as claimed in any one of claims 1 to 6, in which the second coin testing means comprises an apparatus comprising a transmitting coil connected to a signal generator so as to give an abrupt flux change, a receiving coil, the transmitting and receiving coils being disposed on opposite sides of the path for the passage of coins, means for short circuiting the receiving coil but effective to remove the short circuit a predetermined time delay after said flux change, and means responsive to the amplitude of a voltage pulse which is produced across the receiving coil in response to removal of said short circuit.

8. An apparatus as claimed in Claim 7, comprising analogue control means for adjusting said time delay.

9> . An apparatus as claimed in Claim 7, comprising digital control means for adjusting said time delay. im 201224 - 16 -

10. An apparatus as claimed in any one of claims 1 to 9 , including means for measuring the phase displacement in the absence of any coin and comparing with this measurement the phase displacement which occurs in the presence of the coin being tested.

11. An apparatus as claimed in any one of claims 1 to .M", further comprising a non-return device disposed in the coin path beyond the second testing means, and a detector for detecting when a coin has passed beyond this device.

12. An apparatus as claimed in Claim 5, in which said electrical output signal providing means comprises a read only memory addressed by said electrical output signal of the first testing means.

13. An apparatus as claimed in Claim 1, in which said second testing means, or an additional third testing means, comprises means responsive to light reflected from an edge of the coin.

14. A method of coin discrimination, comprising passing a coin in a given direction along a path past first and second testing points and subjecting each coin to a first test to provide an output representing one of a number of categories to which different valid coin denominations belong, and subjecting the same coin to a second test, which is controlled in dependence upon the electrical output signal of the first test to test specifically for the valid coin denomination represented by said electrical output signal of the first test.

15.. A coin discriminating apparatus substantially as '}i>herein described with reference to Figures 3-6 of the BALDWIN, SON & CAREY W1 "^'.accompanying drawings. attorneys for the applicants