NO951401L - Non-numeric coprocessor - Google Patents

Non-numeric coprocessor

Info

Publication number
NO951401L
NO951401L NO951401A NO951401A NO951401L NO 951401 L NO951401 L NO 951401L NO 951401 A NO951401 A NO 951401A NO 951401 A NO951401 A NO 951401A NO 951401 L NO951401 L NO 951401L
Authority
NO
Norway
Prior art keywords
window
processing elements
data
coprocessor
data source
Prior art date
Application number
NO951401A
Other languages
Norwegian (no)
Other versions
NO951401D0 (en
Inventor
Arne Halaas
Original Assignee
Arne Halaas
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Arne Halaas filed Critical Arne Halaas
Priority to NO951401A priority Critical patent/NO951401L/en
Publication of NO951401D0 publication Critical patent/NO951401D0/en
Publication of NO951401L publication Critical patent/NO951401L/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023—Two dimensional arrays, e.g. mesh, torus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02—Comparing digital values

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Computing Systems (AREA)
  • Computational Mathematics (AREA)
  • Multi Processors (AREA)
  • Computer And Data Communications (AREA)

Abstract

En ikke-numerisk koprosessor (1) for flytende informasjons-gjenvinning og mønstergjenkjennelse har utstyr for informa-sjonsbehandling og kan kobles til en vertsdatamaskin (2) og en datakilde (3). Flere interne behandlingselementer (O,1,. ...) er ordnet i et antall samtidig anvendbare vindumoduler (O,l, ...) som er anordnet for å undersøke datastrømmer fra datakilden. Behandlingselementene sammenligner datastrøm-bitgrupper med forutbestemte øvre og nedre grenseverdier for å avgjøre om en bitgruppe befinner seg innenfor nevnte grenseverdier, og i såfall frembringe et treff-signal. Hver vindumodul har en vindusamsvarlogikk (16) for å korrelere treff-signaler fra forskjellige behandlingselementer og frembringe et vindusamsvar-signal ved forekomsten av et forutbestemt samsvar. Ved å strukturere koprosessoren på denne måte oppnås muligheter for parallell behandling som kan utnyttes av datarutingsutstyr (12) for å tillate adskilte datastrømmer å bli dirigert til individuelle eller sammen-lenkede vindumoduler valgbart konfigurert som grupper av vinduer eller supervinduer, avhengig av anvendelsesbehov.A non-numeric coprocessor (1) for liquid information retrieval and pattern recognition has information processing equipment and can be connected to a host computer (2) and a data source (3). Several internal processing elements (0, 1, ...) are arranged in a number of simultaneously applicable window modules (0, 1, ...) which are arranged to examine data streams from the data source. The processing elements compare data stream bytes with predetermined upper and lower limits to determine if a byte is within said limits, and in that case generate a hit signal. Each window module has a window matching logic (16) for correlating hit signals from different processing elements and generating a window matching signal at the occurrence of a predetermined match. By structuring the coprocessor in this way, parallel processing possibilities are obtained that can be utilized by data routing equipment (12) to allow separate data streams to be routed to individual or interconnected window modules selectively configured as groups of windows or superwindows, depending on application needs.

NO951401A 1992-10-16 1995-04-10 Non-numeric coprocessor NO951401L (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
NO951401A NO951401L (en) 1992-10-16 1995-04-10 Non-numeric coprocessor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
PCT/NO1992/000173 WO1994009443A1 (en) 1992-10-16 1992-10-16 Non-numeric coprocessor
NO951401A NO951401L (en) 1992-10-16 1995-04-10 Non-numeric coprocessor

Publications (2)

Publication Number Publication Date
NO951401D0 NO951401D0 (en) 1995-04-10
NO951401L true NO951401L (en) 1995-06-15

Family

ID=19907688

Family Applications (1)

Application Number Title Priority Date Filing Date
NO951401A NO951401L (en) 1992-10-16 1995-04-10 Non-numeric coprocessor

Country Status (6)

Country Link
EP (1) EP0664910A1 (en)
JP (1) JPH08502609A (en)
KR (1) KR950704751A (en)
CA (1) CA2146352A1 (en)
NO (1) NO951401L (en)
WO (1) WO1994009443A1 (en)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NO309169B1 (en) 1998-11-13 2000-12-18 Interagon As Sokeprosessor
US7139743B2 (en) 2000-04-07 2006-11-21 Washington University Associative database scanning and information retrieval using FPGA devices
US6711558B1 (en) 2000-04-07 2004-03-23 Washington University Associative database scanning and information retrieval
AU2004290281A1 (en) 2003-05-23 2005-05-26 Washington University Intelligent data storage and processing using FPGA devices
US10572824B2 (en) 2003-05-23 2020-02-25 Ip Reservoir, Llc System and method for low latency multi-functional pipeline with correlation logic and selectively activated/deactivated pipelined data processing engines
US7917299B2 (en) 2005-03-03 2011-03-29 Washington University Method and apparatus for performing similarity searching on a data stream with respect to a query string
WO2007121035A2 (en) 2006-03-23 2007-10-25 Exegy Incorporated Method and system for high throughput blockwise independent encryption/decryption
US7921046B2 (en) 2006-06-19 2011-04-05 Exegy Incorporated High speed processing of financial information using FPGA devices
US7840482B2 (en) 2006-06-19 2010-11-23 Exegy Incorporated Method and system for high speed options pricing
US8326819B2 (en) 2006-11-13 2012-12-04 Exegy Incorporated Method and system for high performance data metatagging and data indexing using coprocessors
US7660793B2 (en) 2006-11-13 2010-02-09 Exegy Incorporated Method and system for high performance integration, processing and searching of structured and unstructured data using coprocessors
WO2009029842A1 (en) 2007-08-31 2009-03-05 Exegy Incorporated Method and apparatus for hardware-accelerated encryption/decryption
US10229453B2 (en) 2008-01-11 2019-03-12 Ip Reservoir, Llc Method and system for low latency basket calculation
US8374986B2 (en) 2008-05-15 2013-02-12 Exegy Incorporated Method and system for accelerated stream processing
CA3184014A1 (en) 2008-12-15 2010-07-08 Exegy Incorporated Method and apparatus for high-speed processing of financial market depth data
EP2649580A4 (en) 2010-12-09 2014-05-07 Ip Reservoir Llc Method and apparatus for managing orders in financial markets
US9047243B2 (en) 2011-12-14 2015-06-02 Ip Reservoir, Llc Method and apparatus for low latency data distribution
US10650452B2 (en) 2012-03-27 2020-05-12 Ip Reservoir, Llc Offload processing of data packets
US9990393B2 (en) 2012-03-27 2018-06-05 Ip Reservoir, Llc Intelligent feed switch
US11436672B2 (en) 2012-03-27 2022-09-06 Exegy Incorporated Intelligent switch for processing financial market data
US10121196B2 (en) 2012-03-27 2018-11-06 Ip Reservoir, Llc Offload processing of data packets containing financial market data
US10102260B2 (en) 2012-10-23 2018-10-16 Ip Reservoir, Llc Method and apparatus for accelerated data translation using record layout detection
US10146845B2 (en) 2012-10-23 2018-12-04 Ip Reservoir, Llc Method and apparatus for accelerated format translation of data in a delimited data format
US9633093B2 (en) 2012-10-23 2017-04-25 Ip Reservoir, Llc Method and apparatus for accelerated format translation of data in a delimited data format
GB2541577A (en) 2014-04-23 2017-02-22 Ip Reservoir Llc Method and apparatus for accelerated data translation
US10942943B2 (en) 2015-10-29 2021-03-09 Ip Reservoir, Llc Dynamic field data translation to support high performance stream data processing
EP3560135A4 (en) 2016-12-22 2020-08-05 IP Reservoir, LLC Pipelines for hardware-accelerated machine learning

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5051947A (en) * 1985-12-10 1991-09-24 Trw Inc. High-speed single-pass textual search processor for locating exact and inexact matches of a search pattern in a textual stream
US5060143A (en) * 1988-08-10 1991-10-22 Bell Communications Research, Inc. System for string searching including parallel comparison of candidate data block-by-block
GB8925720D0 (en) * 1989-11-14 1990-01-04 Amt Holdings Processor array system

Also Published As

Publication number Publication date
WO1994009443A1 (en) 1994-04-28
KR950704751A (en) 1995-11-20
NO951401D0 (en) 1995-04-10
EP0664910A1 (en) 1995-08-02
JPH08502609A (en) 1996-03-19
CA2146352A1 (en) 1994-04-28

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