NO870157D0 - Anordning for gjenvinning av signaltakt. - Google Patents

Anordning for gjenvinning av signaltakt.

Info

Publication number
NO870157D0
NO870157D0 NO870157A NO870157A NO870157D0 NO 870157 D0 NO870157 D0 NO 870157D0 NO 870157 A NO870157 A NO 870157A NO 870157 A NO870157 A NO 870157A NO 870157 D0 NO870157 D0 NO 870157D0
Authority
NO
Norway
Prior art keywords
recovery device
signal rate
rate recovery
signal
recovery
Prior art date
Application number
NO870157A
Other languages
English (en)
Other versions
NO170960C (no
NO870157L (no
NO170960B (no
Inventor
Pierre Roux
Original Assignee
Alcatel Thomson Faisceaux
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Thomson Faisceaux filed Critical Alcatel Thomson Faisceaux
Publication of NO870157D0 publication Critical patent/NO870157D0/no
Publication of NO870157L publication Critical patent/NO870157L/no
Publication of NO170960B publication Critical patent/NO170960B/no
Publication of NO170960C publication Critical patent/NO170960C/no

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions
NO870157A 1986-01-20 1987-01-15 Anordning for gjenvinning av signaltakt NO170960C (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8600700A FR2593341B1 (fr) 1986-01-20 1986-01-20 Dispositif de recuperation de rythme

Publications (4)

Publication Number Publication Date
NO870157D0 true NO870157D0 (no) 1987-01-15
NO870157L NO870157L (no) 1987-07-21
NO170960B NO170960B (no) 1992-09-21
NO170960C NO170960C (no) 1992-12-30

Family

ID=9331258

Family Applications (1)

Application Number Title Priority Date Filing Date
NO870157A NO170960C (no) 1986-01-20 1987-01-15 Anordning for gjenvinning av signaltakt

Country Status (7)

Country Link
US (1) US4744096A (no)
EP (1) EP0230900B1 (no)
JP (1) JPS62179237A (no)
CA (1) CA1257931A (no)
DE (1) DE3771508D1 (no)
FR (1) FR2593341B1 (no)
NO (1) NO170960C (no)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0324296A1 (fr) * 1988-01-15 1989-07-19 Alcatel Thomson Faisceaux Hertziens Dispositif de détection de perte de synchronisation dans une transmission numérique
FR2626122B1 (fr) * 1988-01-15 1993-09-24 Alcatel Thomson Faisceaux Dispositif de detection de perte de synchronisation dans une transmission numerique
FR2627653B1 (fr) * 1988-02-18 1994-04-08 Alcatel Thomson Faisceaux Hertzi Procede d'asservissement de l'instant de regeneration dans une transmission numerique utilisant une modulation de porteuse selon deux axes en quadrature et dispositif de mise en oeuvre de ce procede
CA1311033C (en) * 1988-03-19 1992-12-01 Shinji Ohta Circuit for obtaining accurate timing information received signal
FR2634083B1 (fr) * 1988-07-06 1991-04-12 Alcatel Thomson Faisceaux Procede d'asservissement en phase du rythme recupere dans une demodulation numerique et dispositif de mise en oeuvre d'un tel procede
US5118975A (en) * 1990-03-05 1992-06-02 Thinking Machines Corporation Digital clock buffer circuit providing controllable delay
US5036298A (en) * 1990-04-26 1991-07-30 Analog Devices, Inc. Clock recovery circuit without jitter peaking
US5216554A (en) * 1991-07-01 1993-06-01 International Business Machines Corporation Digital phase error estimator
FR2692420A1 (fr) * 1992-06-11 1993-12-17 Sgs Thomson Microelectronics Procédé et dispositif d'asservissement en fréquence et phase d'un oscillateur.
US5550869A (en) * 1992-12-30 1996-08-27 Comstream Corporation Demodulator for consumer uses
US6122336A (en) * 1997-09-11 2000-09-19 Lsi Logic Corporation Digital clock recovery circuit with phase interpolation
WO2019197015A1 (en) 2018-04-09 2019-10-17 Peter Truog Composition comprising 4-phenylbutyric acid derivatives & opioids

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4054838A (en) * 1976-04-19 1977-10-18 Rixon, Inc. QAM phase jitter and frequency offset correction system
US4105975A (en) * 1977-02-01 1978-08-08 Ncr Corporation Offset correction circuit for phase detectors
JPS5676637A (en) * 1979-11-29 1981-06-24 Fujitsu Ltd Phase synchronizing circuit
US4419759A (en) * 1980-08-05 1983-12-06 Communications Satellite Corporation Concurrent carrier and clock synchronization for data transmission system
US4458356A (en) * 1982-07-02 1984-07-03 Bell Telephone Laboratories, Incorporated Carrier recovery circuit
US4648100A (en) * 1985-03-28 1987-03-03 At&T Bell Laboratories Carrier recovery circuit

Also Published As

Publication number Publication date
CA1257931A (fr) 1989-07-25
FR2593341B1 (fr) 1988-03-04
US4744096A (en) 1988-05-10
EP0230900A1 (fr) 1987-08-05
DE3771508D1 (de) 1991-08-29
FR2593341A1 (fr) 1987-07-24
NO170960C (no) 1992-12-30
NO870157L (no) 1987-07-21
EP0230900B1 (fr) 1991-07-24
JPS62179237A (ja) 1987-08-06
NO170960B (no) 1992-09-21

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