NO2597547T3 - - Google Patents

Info

Publication number
NO2597547T3
NO2597547T3 NO11275146A NO11275146A NO2597547T3 NO 2597547 T3 NO2597547 T3 NO 2597547T3 NO 11275146 A NO11275146 A NO 11275146A NO 11275146 A NO11275146 A NO 11275146A NO 2597547 T3 NO2597547 T3 NO 2597547T3
Authority
NO
Norway
Application number
NO11275146A
Other languages
Norwegian (no)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NO2597547T3 publication Critical patent/NO2597547T3/no

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793—Remedial or corrective actions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0736—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in functional embedded systems, i.e. in a data processing system designed as a combination of hardware and software dedicated to performing a certain function
    • G06F11/0739—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in functional embedded systems, i.e. in a data processing system designed as a combination of hardware and software dedicated to performing a certain function in a data processing system embedded in automotive or aircraft systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
    • G06F11/167—Error detection by comparing the memory output
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Power Engineering (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Power Sources (AREA)
  • Static Random-Access Memory (AREA)
NO11275146A 2011-11-24 2011-11-24 NO2597547T3 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP11275146.6A EP2597547B1 (fr) 2011-11-24 2011-11-24 Contrôle de tension

Publications (1)

Publication Number Publication Date
NO2597547T3 true NO2597547T3 (fr) 2018-06-02

Family

ID=45319025

Family Applications (1)

Application Number Title Priority Date Filing Date
NO11275146A NO2597547T3 (fr) 2011-11-24 2011-11-24

Country Status (4)

Country Link
US (1) US9081678B2 (fr)
EP (1) EP2597547B1 (fr)
JP (1) JP6104573B2 (fr)
NO (1) NO2597547T3 (fr)

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JP5691943B2 (ja) * 2011-08-31 2015-04-01 日本電気株式会社 メモリ電圧制御装置
US11030063B1 (en) * 2015-03-30 2021-06-08 Amazon Technologies, Inc. Ensuring data integrity during large-scale data migration
BR102015016843A2 (pt) * 2015-06-17 2016-02-02 Medtronic Inc dispositivo médico implantável
US9846612B2 (en) * 2015-08-11 2017-12-19 Qualcomm Incorporated Systems and methods of memory bit flip identification for debugging and power management
GB2545458A (en) * 2015-12-17 2017-06-21 Minima Processor Oy A system and a method for controlling operating voltage
KR20180039463A (ko) * 2016-10-10 2018-04-18 삼성전자주식회사 이상 동작을 제어하기 위한 전자 장치 및 방법
US10303566B2 (en) * 2017-07-10 2019-05-28 Arm Limited Apparatus and method for checking output data during redundant execution of instructions
US11029985B2 (en) 2018-01-19 2021-06-08 Ge Aviation Systems Llc Processor virtualization in unmanned vehicles
US10942509B2 (en) 2018-01-19 2021-03-09 Ge Aviation Systems Llc Heterogeneous processing in unmanned vehicles
TWI719741B (zh) * 2019-12-04 2021-02-21 財團法人工業技術研究院 改變冗餘處理節點的處理器及其方法
KR102379448B1 (ko) * 2020-09-09 2022-03-29 주식회사에델테크 위성 데이터 처리 시스템에서 싱글 이벤트 이펙트를 처리하기 위한 장치 및 이를 이용한 방법
NO346155B1 (en) * 2020-10-26 2022-03-28 Kongsberg Defence & Aerospace As Configuration authentication prior to enabling activation of a FPGA having volatile configuration-memory

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JPH04366498A (ja) * 1991-06-13 1992-12-18 Canon Inc メモリ用電源回路
WO2002087054A1 (fr) * 2001-04-17 2002-10-31 Matsushita Electric Industrial Co., Ltd. Dispositif electronique a batterie et appareil de communication mobile
CN1311447C (zh) * 2002-01-23 2007-04-18 松下电器产业株式会社 光盘装置
JP2003316599A (ja) * 2002-02-22 2003-11-07 Seiko Epson Corp 集積回路
US20050154573A1 (en) * 2004-01-08 2005-07-14 Maly John W. Systems and methods for initializing a lockstep mode test case simulation of a multi-core processor design
US7447919B2 (en) * 2004-04-06 2008-11-04 Hewlett-Packard Development Company, L.P. Voltage modulation for increased reliability in an integrated circuit
US7287185B2 (en) * 2004-04-06 2007-10-23 Hewlett-Packard Development Company, L.P. Architectural support for selective use of high-reliability mode in a computer system
JP4656559B2 (ja) * 2004-05-26 2011-03-23 ルネサスエレクトロニクス株式会社 マイクロコンピュータとメモリアクセス方法
US20060280019A1 (en) * 2005-06-13 2006-12-14 Burton Edward A Error based supply regulation
US7516358B2 (en) * 2005-12-20 2009-04-07 Hewlett-Packard Development Company, L.P. Tuning core voltages of processors
US7908505B2 (en) * 2007-09-28 2011-03-15 International Business Machines Corporation Apparatus, system, and method for event, time, and failure state recording mechanism in a power supply
KR101406279B1 (ko) * 2007-12-20 2014-06-13 삼성전자주식회사 반도체 메모리 장치 및 그것의 읽기 페일 분석 방법
JP4636127B2 (ja) * 2008-06-19 2011-02-23 株式会社デンソー 電動パワーステアリング装置
EP2294580B1 (fr) * 2008-06-20 2014-04-02 Freescale Semiconductor, Inc. Système de mémoire à stockage de données redondant et correction des erreurs
JP4905726B2 (ja) * 2008-07-04 2012-03-28 株式会社デンソー 空燃比検出装置
DE202009009895U1 (de) * 2009-07-21 2009-12-03 Krause, Philipp Integrierte Schaltung mit auf gewichteter Fehlererkennung beruhender Steuerung der Versorgungsspannung
US8615690B2 (en) * 2011-05-05 2013-12-24 Mediatek Inc. Controller of memory device and method for operating the same
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CN103455077B (zh) * 2012-05-31 2016-08-03 华为技术有限公司 一种自适应调整电压的方法、装置及系统

Also Published As

Publication number Publication date
JP6104573B2 (ja) 2017-03-29
JP2013114685A (ja) 2013-06-10
US9081678B2 (en) 2015-07-14
US20130138993A1 (en) 2013-05-30
EP2597547B1 (fr) 2018-01-03
EP2597547A1 (fr) 2013-05-29

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