NL7610970A - PROCEDURE FOR FLATTING A SILICON SUBSTRATE BY ETCHING. - Google Patents

PROCEDURE FOR FLATTING A SILICON SUBSTRATE BY ETCHING.

Info

Publication number
NL7610970A
NL7610970A NL7610970A NL7610970A NL7610970A NL 7610970 A NL7610970 A NL 7610970A NL 7610970 A NL7610970 A NL 7610970A NL 7610970 A NL7610970 A NL 7610970A NL 7610970 A NL7610970 A NL 7610970A
Authority
NL
Netherlands
Prior art keywords
flatting
etching
procedure
silicon substrate
silicon
Prior art date
Application number
NL7610970A
Other languages
Dutch (nl)
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of NL7610970A publication Critical patent/NL7610970A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • H01L21/30608Anisotropic liquid etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Weting (AREA)
  • Element Separation (AREA)
NL7610970A 1975-10-06 1976-10-04 PROCEDURE FOR FLATTING A SILICON SUBSTRATE BY ETCHING. NL7610970A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11977075A JPS5244175A (en) 1975-10-06 1975-10-06 Method of flat etching of silicon substrate

Publications (1)

Publication Number Publication Date
NL7610970A true NL7610970A (en) 1977-04-12

Family

ID=14769758

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7610970A NL7610970A (en) 1975-10-06 1976-10-04 PROCEDURE FOR FLATTING A SILICON SUBSTRATE BY ETCHING.

Country Status (3)

Country Link
JP (1) JPS5244175A (en)
DE (1) DE2644940A1 (en)
NL (1) NL7610970A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4187125A (en) * 1976-12-27 1980-02-05 Raytheon Company Method for manufacturing semiconductor structures by anisotropic and isotropic etching
US4362599A (en) * 1977-10-17 1982-12-07 Hitachi, Ltd. Method for making semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6272974U (en) * 1985-10-28 1987-05-11

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58148131U (en) * 1982-03-30 1983-10-05 住金鋼材工業株式会社 bracket type support scaffolding

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4187125A (en) * 1976-12-27 1980-02-05 Raytheon Company Method for manufacturing semiconductor structures by anisotropic and isotropic etching
US4362599A (en) * 1977-10-17 1982-12-07 Hitachi, Ltd. Method for making semiconductor device

Also Published As

Publication number Publication date
DE2644940A1 (en) 1977-04-28
JPS5244175A (en) 1977-04-06
JPS5530294B2 (en) 1980-08-09

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Legal Events

Date Code Title Description
BV The patent application has lapsed