NL7311665A - - Google Patents

Info

Publication number
NL7311665A
NL7311665A NL7311665A NL7311665A NL7311665A NL 7311665 A NL7311665 A NL 7311665A NL 7311665 A NL7311665 A NL 7311665A NL 7311665 A NL7311665 A NL 7311665A NL 7311665 A NL7311665 A NL 7311665A
Authority
NL
Netherlands
Application number
NL7311665A
Other versions
NL154847B (nl
Inventor
F Sordello
R Cloke
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL7311665A publication Critical patent/NL7311665A/xx
Publication of NL154847B publication Critical patent/NL154847B/xx

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Manipulation Of Pulses (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
NL737311665A 1972-08-23 1973-08-23 Gegevensdetectiecircuit. NL154847B (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00283106A US3792361A (en) 1972-08-23 1972-08-23 High speed data separator

Publications (2)

Publication Number Publication Date
NL7311665A true NL7311665A (ja) 1974-02-26
NL154847B NL154847B (nl) 1977-10-17

Family

ID=23084546

Family Applications (1)

Application Number Title Priority Date Filing Date
NL737311665A NL154847B (nl) 1972-08-23 1973-08-23 Gegevensdetectiecircuit.

Country Status (8)

Country Link
US (1) US3792361A (ja)
JP (1) JPS5631780B2 (ja)
CA (1) CA975438A (ja)
DE (1) DE2326658C3 (ja)
FR (1) FR2197273B1 (ja)
GB (1) GB1430212A (ja)
IT (1) IT998404B (ja)
NL (1) NL154847B (ja)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4043438A (en) * 1976-04-27 1977-08-23 Litton Business Systems, Inc. Printing control circuit
US4034348A (en) * 1976-06-28 1977-07-05 Honeywell Information Systems, Inc. Apparatus, including delay means, for sampling and recovering data recorded by the double transition recording technique
US4285345A (en) * 1979-07-02 1981-08-25 Vitatron Medical B.V. Monolithic pacemaker utilizing I2 L circuitry
US4274067A (en) * 1979-09-27 1981-06-16 Communications Satellite Corporation Universal clock recovery network for QPSK modems
KR0168079B1 (ko) * 1992-12-14 1999-03-20 윤종용 클럭발생장치
US6061347A (en) * 1998-03-03 2000-05-09 Rockwell Semiconductor Systems, Inc. ACD with packet data based agent interconnect

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3518554A (en) * 1967-05-22 1970-06-30 Honeywell Inc Detection of double transition recording
GB1126160A (en) * 1967-08-26 1968-09-05 Ibm Gating circuit and magnetic storage device incorporating such a circuit
JPS5040338B1 (ja) * 1968-12-04 1975-12-23
US3609560A (en) * 1970-01-09 1971-09-28 Bedford Associates Inc Data separation circuit for magnetic recorder memories
DE2433328A1 (de) * 1974-07-11 1976-01-29 Philips Patentverwaltung Integrierte schaltungsanordnung

Also Published As

Publication number Publication date
JPS5631780B2 (ja) 1981-07-23
FR2197273B1 (ja) 1976-06-18
DE2326658A1 (de) 1974-03-21
IT998404B (it) 1976-01-20
GB1430212A (en) 1976-03-31
DE2326658C3 (de) 1979-12-13
NL154847B (nl) 1977-10-17
DE2326658B2 (de) 1975-01-16
FR2197273A1 (ja) 1974-03-22
US3792361A (en) 1974-02-12
JPS49134206A (ja) 1974-12-24
CA975438A (en) 1975-09-30

Similar Documents

Publication Publication Date Title
FR2208847B1 (ja)
FR2174607A5 (ja)
FR2197273B1 (ja)
FR2173758B2 (ja)
FR2182490A5 (ja)
JPS4876883A (ja)
JPS4917647A (ja)
FR2199126A2 (ja)
JPS4911054A (ja)
JPS49106412U (ja)
CS156200B1 (ja)
CH562757A5 (ja)
CH569521A5 (ja)
CH564446A5 (ja)
CH597636B5 (ja)
CH563069A5 (ja)
CH562846A5 (ja)
CH564480A5 (ja)
CH574148A5 (ja)
CH573051A5 (ja)
CH566294A5 (ja)
CH583316A5 (ja)
CH573976A5 (ja)
CH561651A5 (ja)
CH561304A5 (ja)

Legal Events

Date Code Title Description
SNR Assignments of patents or rights arising from examined patent applications

Owner name: INTERNATIONAL BUSINESS MACHINES CORPORATION

V1 Lapsed because of non-payment of the annual fee
NL80 Abbreviated name of patent owner mentioned of already nullified patent

Owner name: ITEL CORP