NL7108230A - - Google Patents
Info
- Publication number
- NL7108230A NL7108230A NL7108230A NL7108230A NL7108230A NL 7108230 A NL7108230 A NL 7108230A NL 7108230 A NL7108230 A NL 7108230A NL 7108230 A NL7108230 A NL 7108230A NL 7108230 A NL7108230 A NL 7108230A
- Authority
- NL
- Netherlands
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Memory System (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US4608170A | 1970-06-15 | 1970-06-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL7108230A true NL7108230A (en:Method) | 1971-12-17 |
Family
ID=21941501
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL7108230A NL7108230A (en:Method) | 1970-06-15 | 1971-06-15 |
Country Status (8)
| Country | Link |
|---|---|
| JP (1) | JPS505009B1 (en:Method) |
| BE (1) | BE767625A (en:Method) |
| CA (1) | CA954232A (en:Method) |
| DE (1) | DE2129268C3 (en:Method) |
| FR (1) | FR2095546A5 (en:Method) |
| GB (1) | GB1340382A (en:Method) |
| NL (1) | NL7108230A (en:Method) |
| SE (1) | SE365628B (en:Method) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3839704A (en) * | 1972-12-06 | 1974-10-01 | Ibm | Control for channel access to storage hierarchy system |
-
1971
- 1971-03-30 CA CA109,036A patent/CA954232A/en not_active Expired
- 1971-04-29 FR FR7116460A patent/FR2095546A5/fr not_active Expired
- 1971-05-11 GB GB1419171A patent/GB1340382A/en not_active Expired
- 1971-05-25 JP JP46035224A patent/JPS505009B1/ja active Pending
- 1971-05-25 BE BE767625A patent/BE767625A/xx unknown
- 1971-06-12 DE DE19712129268 patent/DE2129268C3/de not_active Expired
- 1971-06-15 SE SE07753/71A patent/SE365628B/xx unknown
- 1971-06-15 NL NL7108230A patent/NL7108230A/xx active Search and Examination
Also Published As
| Publication number | Publication date |
|---|---|
| SE365628B (en:Method) | 1974-03-25 |
| FR2095546A5 (en:Method) | 1972-02-11 |
| GB1340382A (en) | 1973-12-12 |
| DE2129268C3 (de) | 1981-01-22 |
| DE2129268A1 (de) | 1971-12-30 |
| CA954232A (en) | 1974-09-03 |
| JPS505009B1 (en:Method) | 1975-02-27 |
| DE2129268B2 (de) | 1980-05-08 |
| BE767625A (fr) | 1971-10-18 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| BC | A request for examination has been filed | ||
| BN | A decision not to publish the application has become irrevocable |