NL7016085A - - Google Patents
Info
- Publication number
- NL7016085A NL7016085A NL7016085A NL7016085A NL7016085A NL 7016085 A NL7016085 A NL 7016085A NL 7016085 A NL7016085 A NL 7016085A NL 7016085 A NL7016085 A NL 7016085A NL 7016085 A NL7016085 A NL 7016085A
- Authority
- NL
- Netherlands
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19691957302 DE1957302A1 (de) | 1969-11-14 | 1969-11-14 | Volladdierer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL7016085A true NL7016085A (it) | 1971-05-18 |
Family
ID=5751097
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL7016085A NL7016085A (it) | 1969-11-14 | 1970-11-03 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US3679883A (it) |
| JP (1) | JPS5019224B1 (it) |
| DE (1) | DE1957302A1 (it) |
| FR (1) | FR2074924A6 (it) |
| IT (1) | IT943099B (it) |
| NL (1) | NL7016085A (it) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA1006982A (en) * | 1972-07-10 | 1977-03-15 | Tokyo Shibaura Electric Company | Full adder and subtractor circuit |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3202806A (en) * | 1961-07-12 | 1965-08-24 | Bell Telephone Labor Inc | Digital parallel function generator |
| US3454751A (en) * | 1966-01-20 | 1969-07-08 | Westinghouse Electric Corp | Binary adder circuit using denial logic |
| US3465133A (en) * | 1966-06-07 | 1969-09-02 | North American Rockwell | Carry or borrow system for arithmetic computations |
| DE1283571B (de) * | 1966-08-18 | 1968-11-21 | Siemens Ag | Volladdierer mit geringer UEbertragslaufzeit |
| GB1145676A (en) * | 1966-09-28 | 1969-03-19 | Nippon Electric Co | High speed adder circuit |
| SE300065B (it) * | 1967-09-08 | 1968-04-01 | Ericsson Telefon Ab L M | |
| US3584205A (en) * | 1968-10-14 | 1971-06-08 | Ibm | Binary arithmetic and logic manipulator |
-
1969
- 1969-11-14 DE DE19691957302 patent/DE1957302A1/de active Pending
-
1970
- 1970-11-03 NL NL7016085A patent/NL7016085A/xx unknown
- 1970-11-09 IT IT31491/70A patent/IT943099B/it active
- 1970-11-13 FR FR7040763A patent/FR2074924A6/fr not_active Expired
- 1970-11-13 JP JP45100102A patent/JPS5019224B1/ja active Pending
- 1970-11-16 US US89859A patent/US3679883A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| DE1957302A1 (de) | 1971-05-19 |
| FR2074924A6 (it) | 1971-10-08 |
| US3679883A (en) | 1972-07-25 |
| JPS5019224B1 (it) | 1975-07-04 |
| IT943099B (it) | 1973-04-02 |