IT943099B - Sommatore completo - Google Patents

Sommatore completo

Info

Publication number
IT943099B
IT943099B IT31491/70A IT3149170A IT943099B IT 943099 B IT943099 B IT 943099B IT 31491/70 A IT31491/70 A IT 31491/70A IT 3149170 A IT3149170 A IT 3149170A IT 943099 B IT943099 B IT 943099B
Authority
IT
Italy
Prior art keywords
complete adder
adder
complete
Prior art date
Application number
IT31491/70A
Other languages
English (en)
Original Assignee
Telefunken Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefunken Gmbh filed Critical Telefunken Gmbh
Application granted granted Critical
Publication of IT943099B publication Critical patent/IT943099B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
IT31491/70A 1969-11-14 1970-11-09 Sommatore completo IT943099B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691957302 DE1957302A1 (de) 1969-11-14 1969-11-14 Volladdierer

Publications (1)

Publication Number Publication Date
IT943099B true IT943099B (it) 1973-04-02

Family

ID=5751097

Family Applications (1)

Application Number Title Priority Date Filing Date
IT31491/70A IT943099B (it) 1969-11-14 1970-11-09 Sommatore completo

Country Status (6)

Country Link
US (1) US3679883A (it)
JP (1) JPS5019224B1 (it)
DE (1) DE1957302A1 (it)
FR (1) FR2074924A6 (it)
IT (1) IT943099B (it)
NL (1) NL7016085A (it)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1006982A (en) * 1972-07-10 1977-03-15 Tokyo Shibaura Electric Company Full adder and subtractor circuit

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3202806A (en) * 1961-07-12 1965-08-24 Bell Telephone Labor Inc Digital parallel function generator
US3454751A (en) * 1966-01-20 1969-07-08 Westinghouse Electric Corp Binary adder circuit using denial logic
US3465133A (en) * 1966-06-07 1969-09-02 North American Rockwell Carry or borrow system for arithmetic computations
DE1283571B (de) * 1966-08-18 1968-11-21 Siemens Ag Volladdierer mit geringer UEbertragslaufzeit
GB1145676A (en) * 1966-09-28 1969-03-19 Nippon Electric Co High speed adder circuit
SE300065B (it) * 1967-09-08 1968-04-01 Ericsson Telefon Ab L M
US3584205A (en) * 1968-10-14 1971-06-08 Ibm Binary arithmetic and logic manipulator

Also Published As

Publication number Publication date
JPS5019224B1 (it) 1975-07-04
NL7016085A (it) 1971-05-18
FR2074924A6 (it) 1971-10-08
DE1957302A1 (de) 1971-05-19
US3679883A (en) 1972-07-25

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