NL7001607A - - Google Patents

Info

Publication number
NL7001607A
NL7001607A NL7001607A NL7001607A NL7001607A NL 7001607 A NL7001607 A NL 7001607A NL 7001607 A NL7001607 A NL 7001607A NL 7001607 A NL7001607 A NL 7001607A NL 7001607 A NL7001607 A NL 7001607A
Authority
NL
Netherlands
Application number
NL7001607A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to NL7001607A priority Critical patent/NL7001607A/xx
Priority to DE19712102018 priority patent/DE2102018A1/de
Priority to CA103953A priority patent/CA918302A/en
Priority to SE01283/71A priority patent/SE357100B/xx
Priority to CH150371A priority patent/CH518625A/de
Priority to JP46003654A priority patent/JPS514912B1/ja
Priority to BE762493A priority patent/BE762493A/xx
Priority to FR7103788A priority patent/FR2079263B1/fr
Priority to GB2087771A priority patent/GB1336480A/en
Publication of NL7001607A publication Critical patent/NL7001607A/xx
Priority to US308033A priority patent/US3892033A/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/019Manufacture or treatment of isolation regions comprising dielectric materials using epitaxial passivated integrated circuit [EPIC] processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0188Manufacturing their isolation regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401Combinations of FETs or IGBTs with BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/84Combinations of enhancement-mode IGFETs and depletion-mode IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901Materials
    • H10P14/2902Materials being Group IVA materials
    • H10P14/2905Silicon, silicon germanium or germanium
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411Silicon, silicon germanium or germanium
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/60Wet etching
    • H10P50/64Wet etching of semiconductor materials
    • H10P50/642Chemical etching
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
NL7001607A 1970-02-05 1970-02-05 NL7001607A (https=)

Priority Applications (10)

Application Number Priority Date Filing Date Title
NL7001607A NL7001607A (https=) 1970-02-05 1970-02-05
DE19712102018 DE2102018A1 (de) 1970-02-05 1971-01-16 Verfahren zur Herstellung einer Halb leiteranordnung
CA103953A CA918302A (en) 1970-02-05 1971-01-29 Method of manufacturing a semiconductor device
SE01283/71A SE357100B (https=) 1970-02-05 1971-02-02
CH150371A CH518625A (de) 1970-02-05 1971-02-02 Verfahren zur Herstellung einer Halbleiteranordnung
JP46003654A JPS514912B1 (https=) 1970-02-05 1971-02-02
BE762493A BE762493A (fr) 1970-02-05 1971-02-03 Procede de fabrication d'un dispositif semiconducteur
FR7103788A FR2079263B1 (https=) 1970-02-05 1971-02-04
GB2087771A GB1336480A (en) 1970-02-05 1971-04-19 Methods of manufacturing a semiconductor device
US308033A US3892033A (en) 1970-02-05 1972-11-20 Method of manufacturing a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7001607A NL7001607A (https=) 1970-02-05 1970-02-05

Publications (1)

Publication Number Publication Date
NL7001607A true NL7001607A (https=) 1971-08-09

Family

ID=19809248

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7001607A NL7001607A (https=) 1970-02-05 1970-02-05

Country Status (9)

Country Link
JP (1) JPS514912B1 (https=)
BE (1) BE762493A (https=)
CA (1) CA918302A (https=)
CH (1) CH518625A (https=)
DE (1) DE2102018A1 (https=)
FR (1) FR2079263B1 (https=)
GB (1) GB1336480A (https=)
NL (1) NL7001607A (https=)
SE (1) SE357100B (https=)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA952628A (en) * 1963-12-16 1974-08-06 David A. Maxwell Semiconductor structure and method
US3648128A (en) * 1968-05-25 1972-03-07 Sony Corp An integrated complementary transistor circuit chip with polycrystalline contact to buried collector regions

Also Published As

Publication number Publication date
DE2102018A1 (de) 1971-08-19
CA918302A (en) 1973-01-02
SE357100B (https=) 1973-06-12
CH518625A (de) 1972-01-31
BE762493A (fr) 1971-08-03
FR2079263B1 (https=) 1976-05-28
GB1336480A (en) 1973-11-07
FR2079263A1 (https=) 1971-11-12
JPS514912B1 (https=) 1976-02-16

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