Classifications

• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F11/00—Error detection; Error correction; Monitoring
  • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F11/16—Error detection or correction of the data by redundancy in hardware
  • G06F11/1608—Error detection by comparing the output signals of redundant hardware
  • G06F11/1612—Error detection by comparing the output signals of redundant hardware where the redundant component is persistent storage
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
  • G11B20/10—Digital recording or reproducing
  • G11B20/14—Digital recording or reproducing using self-clocking codes
  • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
  • G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
  • G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
  • G11B20/10—Digital recording or reproducing
  • G11B20/16—Digital recording or reproducing using non self-clocking codes, i.e. the clock signals are either recorded in a separate clocking track or in a combination of several information tracks

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• Engineering & Computer Science (AREA)
• Theoretical Computer Science (AREA)
• Signal Processing (AREA)
• Quality & Reliability (AREA)
• Physics & Mathematics (AREA)
• General Engineering & Computer Science (AREA)
• General Physics & Mathematics (AREA)
• Signal Processing For Digital Recording And Reproducing (AREA)

Applications Claiming Priority (1)

Publications (1)

Family

ID=25150253

Family Applications (1)

Country Status (8)

Families Citing this family (10)

• 1969
  • 1969-01-10 US US790296A patent/US3562726A/en not_active Expired - Lifetime
  • 1969-12-09 CA CA069413A patent/CA938727A/en not_active Expired
• 1970
  • 1970-01-08 JP JP45002325A patent/JPS5026923B1/ja active Pending
  • 1970-01-09 DE DE19702000899 patent/DE2000899A1/de active Pending
  • 1970-01-09 NL NL7000260A patent/NL7000260A/xx unknown
  • 1970-01-09 BE BE744253D patent/BE744253A/xx unknown
  • 1970-01-09 FR FR7000702A patent/FR2028112A1/fr not_active Withdrawn
  • 1970-01-12 GB GB147770A patent/GB1302711A/en not_active Expired

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