NL6606160A - - Google Patents

Info

Publication number
NL6606160A
NL6606160A NL6606160A NL6606160A NL6606160A NL 6606160 A NL6606160 A NL 6606160A NL 6606160 A NL6606160 A NL 6606160A NL 6606160 A NL6606160 A NL 6606160A NL 6606160 A NL6606160 A NL 6606160A
Authority
NL
Netherlands
Application number
NL6606160A
Other versions
NL154869B (nl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL6606160A publication Critical patent/NL6606160A/xx
Publication of NL154869B publication Critical patent/NL154869B/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/3165Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
    • H01L21/31654Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
    • H01L21/31658Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
    • H01L21/31662Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8236Combination of enhancement and depletion transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/914Doping
    • Y10S438/923Diffusion through a layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
NL666606160A 1965-05-21 1966-05-06 Werkwijze tot het vervaardigen van een veldeffecttransistor met een geisoleerde stuurelektrode, benevens veldeffecttransistor vervaardigd volgens deze werkwijze. NL154869B (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US457571A US3417464A (en) 1965-05-21 1965-05-21 Method for fabricating insulated-gate field-effect transistors

Publications (2)

Publication Number Publication Date
NL6606160A true NL6606160A (US07122603-20061017-C00294.png) 1966-11-22
NL154869B NL154869B (nl) 1977-10-17

Family

ID=23817246

Family Applications (1)

Application Number Title Priority Date Filing Date
NL666606160A NL154869B (nl) 1965-05-21 1966-05-06 Werkwijze tot het vervaardigen van een veldeffecttransistor met een geisoleerde stuurelektrode, benevens veldeffecttransistor vervaardigd volgens deze werkwijze.

Country Status (10)

Country Link
US (1) US3417464A (US07122603-20061017-C00294.png)
JP (1) JPS5247309B1 (US07122603-20061017-C00294.png)
BE (1) BE680867A (US07122603-20061017-C00294.png)
CH (1) CH447393A (US07122603-20061017-C00294.png)
DE (1) DE1564151C3 (US07122603-20061017-C00294.png)
ES (1) ES326943A1 (US07122603-20061017-C00294.png)
FR (1) FR1480732A (US07122603-20061017-C00294.png)
GB (1) GB1118265A (US07122603-20061017-C00294.png)
NL (1) NL154869B (US07122603-20061017-C00294.png)
SE (1) SE333021B (US07122603-20061017-C00294.png)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3541676A (en) * 1967-12-18 1970-11-24 Gen Electric Method of forming field-effect transistors utilizing doped insulators as activator source
GB1261723A (en) * 1968-03-11 1972-01-26 Associated Semiconductor Mft Improvements in and relating to semiconductor devices
NL165005C (nl) * 1969-06-26 1981-02-16 Philips Nv Halfgeleiderinrichting bevattende veldeffecttransistors met geisoleerde stuurelektrode en werkwijze voor het vervaardigen van de halfgeleiderinrichting.
US3895966A (en) * 1969-09-30 1975-07-22 Sprague Electric Co Method of making insulated gate field effect transistor with controlled threshold voltage
US4003071A (en) * 1971-09-18 1977-01-11 Fujitsu Ltd. Method of manufacturing an insulated gate field effect transistor
US3789504A (en) * 1971-10-12 1974-02-05 Gte Laboratories Inc Method of manufacturing an n-channel mos field-effect transistor
US3728161A (en) * 1971-12-28 1973-04-17 Bell Telephone Labor Inc Integrated circuits with ion implanted chan stops
US3872491A (en) * 1973-03-08 1975-03-18 Sprague Electric Co Asymmetrical dual-gate FET
DE2338388C2 (de) * 1973-07-28 1982-04-15 Ibm Deutschland Gmbh, 7000 Stuttgart Feldeffekt-Halbleiteranordnung
US4314404A (en) * 1980-02-20 1982-02-09 Ruiz Rene A Razor with pre-wetting or capillarizer system
JPS5750109A (en) * 1980-09-10 1982-03-24 Toshiba Corp High impedance circuit for integrated circuit
JPS5879099U (ja) * 1981-11-24 1983-05-28 三菱電機株式会社 輻流送風機

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL265382A (US07122603-20061017-C00294.png) * 1960-03-08
US3183129A (en) * 1960-10-14 1965-05-11 Fairchild Camera Instr Co Method of forming a semiconductor
US3203840A (en) * 1961-12-14 1965-08-31 Texas Insutruments Inc Diffusion method
BE636316A (US07122603-20061017-C00294.png) * 1962-08-23 1900-01-01

Also Published As

Publication number Publication date
GB1118265A (en) 1968-06-26
CH447393A (de) 1967-11-30
FR1480732A (fr) 1967-05-12
DE1564151B2 (de) 1978-05-18
BE680867A (US07122603-20061017-C00294.png) 1966-10-17
NL154869B (nl) 1977-10-17
JPS5247309B1 (US07122603-20061017-C00294.png) 1977-12-01
DE1564151A1 (de) 1969-07-24
DE1564151C3 (de) 1979-01-25
ES326943A1 (es) 1967-03-16
US3417464A (en) 1968-12-24
SE333021B (US07122603-20061017-C00294.png) 1971-03-01

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Legal Events

Date Code Title Description
VJC Lapsed due to non-payment of the due maintenance fee for the patent or patent application
NL80 Abbreviated name of patent owner mentioned of already nullified patent

Owner name: I B M