NL6604237A - - Google Patents
Info
- Publication number
- NL6604237A NL6604237A NL6604237A NL6604237A NL6604237A NL 6604237 A NL6604237 A NL 6604237A NL 6604237 A NL6604237 A NL 6604237A NL 6604237 A NL6604237 A NL 6604237A NL 6604237 A NL6604237 A NL 6604237A
- Authority
- NL
- Netherlands
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Detection And Correction Of Errors (AREA)
- Error Detection And Correction (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US445317A US3416132A (en) | 1965-04-05 | 1965-04-05 | Group parity handling |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL6604237A true NL6604237A (en:Method) | 1966-10-06 |
Family
ID=23768453
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL6604237A NL6604237A (en:Method) | 1965-04-05 | 1966-03-31 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3416132A (en:Method) |
| DE (1) | DE1263360B (en:Method) |
| GB (1) | GB1082588A (en:Method) |
| NL (1) | NL6604237A (en:Method) |
| SE (1) | SE322643B (en:Method) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3623155A (en) * | 1969-12-24 | 1971-11-23 | Ibm | Optimum apparatus and method for check bit generation and error detection, location and correction |
| DE69019102T2 (de) * | 1989-10-17 | 1995-11-16 | Nippon Electric Co | Mikroprozessor mit einer Paritätsprüffunktion. |
| US5157671A (en) * | 1990-05-29 | 1992-10-20 | Space Systems/Loral, Inc. | Semi-systolic architecture for decoding error-correcting codes |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3005189A (en) * | 1958-02-17 | 1961-10-17 | Ibm | Interrecord noise elimination |
| US3011073A (en) * | 1958-12-31 | 1961-11-28 | Ibm | Parity check switching circuit |
| US3045209A (en) * | 1959-04-15 | 1962-07-17 | Ibm | Checking system for data selection network |
| US3134960A (en) * | 1959-12-30 | 1964-05-26 | Ibm | Common channel transfer error check |
-
1965
- 1965-04-05 US US445317A patent/US3416132A/en not_active Expired - Lifetime
-
1966
- 1966-03-29 GB GB13803/66A patent/GB1082588A/en not_active Expired
- 1966-03-31 NL NL6604237A patent/NL6604237A/xx unknown
- 1966-04-05 SE SE4649/66A patent/SE322643B/xx unknown
- 1966-04-05 DE DEJ30532A patent/DE1263360B/de not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| US3416132A (en) | 1968-12-10 |
| GB1082588A (en) | 1967-09-06 |
| SE322643B (en:Method) | 1970-04-13 |
| DE1263360B (de) | 1968-03-14 |