NL6507897A - - Google Patents
Info
- Publication number
- NL6507897A NL6507897A NL6507897A NL6507897A NL6507897A NL 6507897 A NL6507897 A NL 6507897A NL 6507897 A NL6507897 A NL 6507897A NL 6507897 A NL6507897 A NL 6507897A NL 6507897 A NL6507897 A NL 6507897A
- Authority
- NL
- Netherlands
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
- G06F7/575—Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Optimization (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Executing Machine-Instructions (AREA)
- Supports For Pipes And Cables (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US376348A US3400259A (en) | 1964-06-19 | 1964-06-19 | Multifunction adder including multistage carry chain register with conditioning means |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL6507897A true NL6507897A (https=) | 1965-12-20 |
Family
ID=23484665
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL6507897A NL6507897A (https=) | 1964-06-19 | 1965-06-18 |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US3400259A (https=) |
| JP (1) | JPS4913887B1 (https=) |
| AT (1) | AT282237B (https=) |
| BE (1) | BE665632A (https=) |
| CH (1) | CH455342A (https=) |
| DE (1) | DE1499192A1 (https=) |
| DK (1) | DK129813B (https=) |
| GB (1) | GB1114503A (https=) |
| NL (1) | NL6507897A (https=) |
| NO (1) | NO120907B (https=) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3617720A (en) * | 1967-09-12 | 1971-11-02 | Bell Telephone Labor Inc | Fast fourier transform using hierarchical store |
| US3711693A (en) * | 1971-06-30 | 1973-01-16 | Honeywell Inf Systems | Modular bcd and binary arithmetic and logical system |
| USH1970H1 (en) | 1971-07-19 | 2001-06-05 | Texas Instruments Incorporated | Variable function programmed system |
| US3956620A (en) * | 1974-11-26 | 1976-05-11 | Texas Instruments Incorporated | Adder with carry enable for bit operations in an electric digital calculator |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3028088A (en) * | 1956-09-25 | 1962-04-03 | Ibm | Multipurpose logical operations |
| US3199939A (en) * | 1962-05-08 | 1965-08-10 | Herman A Stern | Phosphor deposition |
-
1964
- 1964-06-19 US US376348A patent/US3400259A/en not_active Expired - Lifetime
-
1965
- 1965-06-10 GB GB24649/65A patent/GB1114503A/en not_active Expired
- 1965-06-15 NO NO158511A patent/NO120907B/no unknown
- 1965-06-15 JP JP40035252A patent/JPS4913887B1/ja active Pending
- 1965-06-18 NL NL6507897A patent/NL6507897A/xx unknown
- 1965-06-18 DE DE19651499192 patent/DE1499192A1/de active Pending
- 1965-06-18 BE BE665632D patent/BE665632A/xx unknown
- 1965-06-18 DK DK307965AA patent/DK129813B/da unknown
- 1965-06-21 AT AT561665A patent/AT282237B/de not_active IP Right Cessation
- 1965-06-21 CH CH863065A patent/CH455342A/fr unknown
Also Published As
| Publication number | Publication date |
|---|---|
| US3400259A (en) | 1968-09-03 |
| AT282237B (de) | 1970-06-25 |
| JPS4913887B1 (https=) | 1974-04-03 |
| DK129813B (da) | 1974-11-18 |
| GB1114503A (en) | 1968-05-22 |
| BE665632A (https=) | 1965-10-18 |
| NO120907B (https=) | 1970-12-21 |
| DE1499192A1 (de) | 1970-01-15 |
| DK129813C (https=) | 1975-06-23 |
| CH455342A (fr) | 1968-06-28 |