NL6408340A - - Google Patents

Info

Publication number
NL6408340A
NL6408340A NL6408340A NL6408340A NL6408340A NL 6408340 A NL6408340 A NL 6408340A NL 6408340 A NL6408340 A NL 6408340A NL 6408340 A NL6408340 A NL 6408340A NL 6408340 A NL6408340 A NL 6408340A
Authority
NL
Netherlands
Application number
NL6408340A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CH537062A external-priority patent/CH397773A/de
Priority claimed from CH997863A external-priority patent/CH409472A/de
Priority claimed from CH1041763A external-priority patent/CH421185A/de
Application filed filed Critical
Publication of NL6408340A publication Critical patent/NL6408340A/xx
Priority claimed from CH484965A external-priority patent/CH421186A/de
Priority claimed from CH1255966A external-priority patent/CH441438A/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/505Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/40Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using contact-making devices, e.g. electromagnetic relay
    • G06F7/405Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using contact-making devices, e.g. electromagnetic relay binary
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/64Digital differential analysers, i.e. computing devices for differentiation, integration or solving differential or integral equations, using pulses representing increments; Other incremental computing devices for solving difference equations
    • G06F7/66Digital differential analysers, i.e. computing devices for differentiation, integration or solving differential or integral equations, using pulses representing increments; Other incremental computing devices for solving difference equations wherein pulses represent unitary increments only
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K21/00Details of pulse counters or frequency dividers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/26Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being duration, interval, position, frequency, or sequence
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804Details
    • G06F2207/3808Details concerning the type of numbers or the way they are handled
    • G06F2207/3832Less usual number representations
    • G06F2207/3848Unit distance code

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electromagnetism (AREA)
  • Nonlinear Science (AREA)
NL6408340A 1962-05-04 1964-07-21 NL6408340A (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
CH537062A CH397773A (de) 1962-05-04 1962-05-04 Zähleinrichtung für bestimmte Signalmerkmale und Verwendung davon
CH997863A CH409472A (de) 1963-08-13 1963-08-13 Einrichtung zur Summierung von zeitlich veränderlichen Grössen
CH1041763A CH421185A (de) 1963-08-23 1963-08-23 Logisches Netzwerk zur Verarbeitung zweiphasiger Inkrementsignalfolgen
CH484965A CH421186A (de) 1965-04-07 1965-04-07 Vorwärts-Rückwärts-Zählwerk für zweiphasige Binärsignalfolgen
CH1255966A CH441438A (de) 1962-05-04 1966-08-30 Vorwärts-Rückwärts-Zählwerk

Publications (1)

Publication Number Publication Date
NL6408340A true NL6408340A (de) 1965-02-15

Family

ID=27509218

Family Applications (1)

Application Number Title Priority Date Filing Date
NL6408340A NL6408340A (de) 1962-05-04 1964-07-21

Country Status (1)

Country Link
NL (1) NL6408340A (de)

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