NL297219A - - Google Patents
Info
- Publication number
- NL297219A NL297219A NL297219DA NL297219A NL 297219 A NL297219 A NL 297219A NL 297219D A NL297219D A NL 297219DA NL 297219 A NL297219 A NL 297219A
- Authority
- NL
- Netherlands
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/16—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using saturable magnetic devices
- H03K19/162—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using saturable magnetic devices using parametrons
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/02—Comparing digital values
- G06F7/026—Magnitude comparison, i.e. determining the relative order of operands based on their numerical value, e.g. window comparator
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/4824—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices using signed-digit representation
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US220183A US3210529A (en) | 1962-08-29 | 1962-08-29 | Digital adder and comparator circuits employing ternary logic flements |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL297219A true NL297219A (xx) | 1900-01-01 |
Family
ID=22822420
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL297219D NL297219A (xx) | 1962-08-29 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US3210529A (xx) |
| BE (1) | BE636282A (xx) |
| NL (1) | NL297219A (xx) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3355578A (en) * | 1964-07-07 | 1967-11-28 | Burroughs Corp | Information processing system utilizing a saturable reactor for adding three voltagepulses |
| US3383531A (en) * | 1967-07-18 | 1968-05-14 | Mini Transporturilor Aut | Electric one-way unharmonical vibarator |
| GB2293665A (en) * | 1994-09-29 | 1996-04-03 | Texas Instruments Ltd | A look-ahead scheme. |
| US8577026B2 (en) | 2010-12-29 | 2013-11-05 | Ternarylogic Llc | Methods and apparatus in alternate finite field based coders and decoders |
| US7643632B2 (en) * | 2004-02-25 | 2010-01-05 | Ternarylogic Llc | Ternary and multi-value digital signal scramblers, descramblers and sequence generators |
| US9298423B2 (en) | 2012-07-24 | 2016-03-29 | Ternarylogic Llc | Methods and systems for determining characteristics of a sequence of n-state symbols |
| US20070110229A1 (en) * | 2004-02-25 | 2007-05-17 | Ternarylogic, Llc | Ternary and Multi-Value Digital Signal Scramblers, Descramblers and Sequence of Generators |
| US7505589B2 (en) * | 2003-09-09 | 2009-03-17 | Temarylogic, Llc | Ternary and higher multi-value digital scramblers/descramblers |
| US7696785B2 (en) * | 2004-02-25 | 2010-04-13 | Ternarylogic Llc | Implementing logic functions with non-magnitude based physical phenomena |
| US8374289B2 (en) | 2004-02-25 | 2013-02-12 | Ternarylogic Llc | Generation and detection of non-binary digital sequences |
| US7218144B2 (en) * | 2004-02-25 | 2007-05-15 | Ternarylogic Llc | Single and composite binary and multi-valued logic functions from gates and inverters |
| US7580472B2 (en) * | 2004-02-25 | 2009-08-25 | Ternarylogic Llc | Generation and detection of non-binary digital sequences |
| US7548092B2 (en) | 2004-02-25 | 2009-06-16 | Ternarylogic Llc | Implementing logic functions with non-magnitude based physical phenomena |
| US20060021003A1 (en) * | 2004-06-23 | 2006-01-26 | Janus Software, Inc | Biometric authentication system |
| US7562106B2 (en) * | 2004-08-07 | 2009-07-14 | Ternarylogic Llc | Multi-value digital calculating circuits, including multipliers |
| US20100164548A1 (en) * | 2004-09-08 | 2010-07-01 | Ternarylogic Llc | Implementing Logic Functions With Non-Magnitude Based Physical Phenomena |
| KR102505205B1 (ko) * | 2021-04-29 | 2023-03-02 | 포항공과대학교 산학협력단 | 삼진 논리 회로 장치 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3028088A (en) * | 1956-09-25 | 1962-04-03 | Ibm | Multipurpose logical operations |
| US2921737A (en) * | 1958-04-23 | 1960-01-19 | Gen Dynamics Corp | Magnetic core full adder |
-
0
- NL NL297219D patent/NL297219A/xx unknown
- BE BE636282D patent/BE636282A/xx unknown
-
1962
- 1962-08-29 US US220183A patent/US3210529A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US3210529A (en) | 1965-10-05 |
| BE636282A (xx) | 1900-01-01 |