NL242525A - - Google Patents

Info

Publication number
NL242525A
NL242525A NL242525DA NL242525A NL 242525 A NL242525 A NL 242525A NL 242525D A NL242525D A NL 242525DA NL 242525 A NL242525 A NL 242525A
Authority
NL
Netherlands
Application number
Publication of NL242525A publication Critical patent/NL242525A/xx

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
NL242525D NL242525A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL242525T

Publications (1)

Publication Number Publication Date
NL242525A true NL242525A (en)

Family

ID=19780653

Family Applications (1)

Application Number Title Priority Date Filing Date
NL242525D NL242525A (en)

Country Status (2)

Country Link
DE (1) DE1066239B (en)
NL (1) NL242525A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL270663A (en) * 1960-10-26
DE1155483C2 (en) * 1961-02-01 1974-05-30 PROCEDURE AND ARRANGEMENT FOR CONVERTING INFORMATION STORED FROM A MEMORY IN BINARY CODE INTO DC PULSES

Also Published As

Publication number Publication date
DE1066239B (en) 1959-10-01

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