NL2023917B1 - High-selectivity dry release of dielectric structures - Google Patents

Abstract

The present invention is in the field of a method for high selectivity dry release of a dielectric structure for a light sail, such as photonic crystal mirrors, which have a relatively large size, are extremely thin, have a low weight, 5 have a large aspect ratio, a very good reflectance, and a high strength, as well as a method for fabrication of such a device, and a product obtained by said method.

Description

High-selectivity dry release of dielectric structures

FIELD OF TRE INVENTION The present invention is in the field of a method for hich selectivity dry release of a dielectric structure for a light sail, such as photonic crystal mirrors, which have a relatively large size, are extremely thin, have a low weight, have a large aspect ratio, a very good reflectance, and a high strength, as well as a method for fabrication of such a device, and a product obtained by said method.

BACKGROUND OF THE INVENTION Photonic crystal mirror systems are considered to focus on the interaction between light and mechanical motion on low energy scales. In order to have enhanced capabilities one needs a high reflectivity, a low dissipation and a small mass. Achieving all of these in one relatively large device has been a challenge up to now.

Various investigations have been done on optomechanical systems.

Makles et al. in “2D photonic-crystal optomechanical nano resonator” Opt. Lett.40, 174-177 (2015), describes photonic crystal mirrors. Therein photonic crystals have also been fabricated on fully clamped square membranes which are not tethered to the substrate. While these are highly reflective (exceeding 99%), they do not exhibit the same mechanical isolation observed in trampoline structures. It is noted that clamping can reduce the mechanical quality factor.

Another recent research focuses on an optomechanical system combining a tethered trampoline membrane and photonic crystal arrays of holes. Norte et al. in “Mechanical resonators for quantum optomechanics experiments at room temperature” describes that despite having a high reflectivity, the mentioned optomechanical system, with photonic crystal arrays of holes does not exhibit a high mechanical dissipation.

Photonic crystal (optomechanical) mirror systems may be used in several applications, such as for testing macroscopic quantum physics, high precision sensors, e.g. chemical sensors, or accelerometers.

The present invention relates also to light sails. A light 40 sail (also referred to as solar sail or photon sail} may be used for propulsion in space. It uses radiation pressure exerted by light on large mirrors. The light may originate from a star, such as the sun, or even a man-made external source, such as a laser. High-energy laser beams could be used as an alternative light source to exert much greater force than would be possible using sunlight, a concept known as beam sailing. The light exerts a force on the mirrors when reflected. It is therefore important to have a highly reflective mirror.

An advantage of a space craft having a light sail is a relatively low-cost operations and long operating lifetimes; in principle the source of light is of infinite nature. As light sails are relatively simple structures, they can be used often without deterioration.

In practice it has been found that solar pressure indeed affects spacecrafts. For long distance travelling a spacecraft will be displaced thousands of kilometres by solar pressure. Also, an orientation of a space craft may be influenced.

For specific examples, such as light sails, relatively large mirrors are required. Prior state-of-the-art mirrors are limited in size to typically less than 1 cm?. To give some idea about forces, in an example of a huge 1000 by 1000 meter mirror the force is only about 8 Newtons (at a distance of 150*105 km to the sun). It is noted that electric engines provide similar forces.

The present inventors have filed a previous patent application (NL 20198631) which application and its contents are incorporated by reference. Typically, a dielectric layer is etched, and a wet etchant such as KOH is used to remove the silicon beneath the dielectric layer. The dielectric layer may break, so only relatively small layer can be fabricated. Also, it is difficult to obtain ultra-clean dielectric layers, with high yield. In addition, chemical consumption during fabrication is rather high.

The present invention therefore relates to an improved method for high selectivity dry release of a dielectric structure, which solves one or more of the above problems and drawbacks of the prior state-of-the-art, providing reliable results, without jeopardizing functionality and advantages.

40 SUMMARY OF THE INVENTION

It is an object of the invention to overcome one or more limitations of the methods of the prior art and at the very least to provide an alternative thereto.

In a first aspect, the invention relates to a method for high selectivity dry release of a dielectric structure 1 such as for a light sail comprising providing a sample 10, wherein the sample is at least partly covered with a first dielectric release layer 12, providing a mask 15 on the release layer, selectively etching the mask, selectively etching the release layer through the etched mask with a first gaseous fluorine, typically an isotropically etch, which etch may be performed in one go, or in a series of e.g. 2-5 steps, removing the mask, providing a carrier 20, covering the carrier with an etch protection layer 21, such as a dielectric protection layer, such as a SiC:

protection layer, transferring the etched sample 10 to the carrier, transferring the combined carrier/sample to a dry etch tool, and under-etching the release layer through the remaining release layer and thereby forming at least one cavity 18 underneath the release layer by using a gaseous etchant, such as gaseous fluorine, such as SFs, XeF:, and HF vapor, and other gases used in plasma etchers which may require a carrier wafer.

The method may be used to produce a photonic Large-Aspect-Ratio Nano-Thickness Mirror assembly.

The present invention relates to a dielectric release layer,

such as an optomechanical system with a low mass, and a high mechanical quality factor.

A photonic crystal mirror assembly may comprise a 2-2000 nm thin film membrane, which may be tethered, comprising a material with a tensile strength > 0.5 GPa.

The membrane may be connected to a substrate frame.

The mirror may be a patterned photonic crystal array having at least one array with reflective holes, and likewise may be an optically reflective film, such as a metal film.

A typical membrane window cross-sectional dimension A-A’ is 10 mm to 300 mm; however larger areas can be made with the present method without any issue, such as up to a few meters.

In an alternative an assembly of the present mirrors may be provided, such as an assembly of 2-21° mirrors.

The surface area of the holes is adapted for reflecting light, which acts as a high reflectivity mirror for impinging light, e.g. a free

40 space laser or the sun.

The array of holes is preferably periodical in at least one dimension, preferably in two dimensions cr a hexagonal lattice, i.e. forming a regular row or column and preferably regular rows and columns.

The membrane is relatively thin and preferably as thin as possible, having a thickness of 3-300 nm, preferably 5-200 nm, more preferably 7-150 nm, more preferably 10-100 nm, such as 20-30 nm.

The system comprises a thin film membrane which remains stabilized after release.

The material may have a high tensile strength >0.5 GPa.

A high tensile strength material is found to improve the stability of the sail and also the mechanical quality factor.

The system comprises a patterned photonic crystal array functioning as a mirror, which is typically in a central location of the mirror or all over the mirror.

For some applications the membrane comprises holes over substantially (90-99.9%)}) all of its surface, such as to have an as high as possible reflective area.

Such a photonic crystal array is made of holes together forming a combined mirror.

The holes preferably have a circular i.e. cylindrical shape to have minimized scattering and losses, but may also be square, rectangular, or multigonal, such as hexagonal.

The holes preferably also have a contracting characteristic, meaning that they relax in such a way that they contract {diminish in size) slightly and thereby increase the stress.

The membrane in the present invention could be as thin as 2- 500 nm, but typically is 2-100 nm in thickness, such as 50 nm.

In order to have a high reflectiveness the holes are adapted, typically in their top surface area (per hole); it is noted that formally a hole can not have a surface; a reference to such & surface is then regarded to be a virtual surface of the hole.

By optimally adapting the holes it has been found that almost every photon (99,99%) can be reflected.

In order to suspend the membrane a frame is provided.

The frame is preferably as thin and as small as possible, in view of weight.

In view of strength, the frame is preferably not too small/thin.

It has been found that a substrate frame with a height h of 10-500 um, preferably 50-100 um, and a frame lower width fy of < 10% of a width of the membrane my performs well.

It is preferred to have a high aspect ratic frame.

A second aspect the invention relates to a product obtained 40 by the present method.

A method of making the present photonic crystal mirror assembly may comprise various steps, e.g. cf providing a substrate, such as Si, and glass. Thereafter a step of depositing a high tensile stress layer, such as a SiN layer.

5 The Si substrate thickness is in range of 10 pm=20 mm, preferably 50 pm-2 mm, more preferably 100 pm-1 mm, such as 200 um-500 pm. The substrate is preferably pre-etched to reduce its thickness. In a preferred example the inventors used a very accurate ratio of chemical precursors: for instance when NH3 and SiH:Cl; are used a ratio of 3:1 is used, and it is preferred to use a ratio in between 3+0.2:1, preferably 3+0.1:1, more preferably 3+0.05:1. Likewise other dielectrics, such as SiC, may be provided. Such may be achieved by limiting variations in the respective gas flows accordingly over a time of deposition. More in general, for a given stoichiometry relative variations should be in the same order or less, i.e. less than about 6%, preferably less than about 3%, more preferably less than about 1.5%, such as less than 1%. The dielectric release layer may thereafter be patterned to form holes, such as by using an electron beam resist for the holes. After patterning the resist is developed and rinsed. Then directional plasma etching may be performed to form the array of holes, e.g. by using CHF3, or C4Fg/SFg. In view of time needed for etching it is noted that an etching rate of a material such as SisN4 is around 1 nm/sec. For releasing the membrane, a dry etch process is used. Prior to releasing the membrane at least a part of the substrate is provided with the etch protection layer. By using this release step it has been found that the stress can be engineered, i.e.

the stress is increased up to values well above 1 GPa, such as > 5GPa.

The present invention provides a solution to one or more of the above-mentioned problems and overcomes drawbacks of the pricr state-of-the-art.

Advantages of the present description are detailed throughout the description.

DETAILED DESCRIPTION OF THE INVENTION In an exemplary embodiment of the present method after first etching with a gaseous etchant the sample may be : 40 cleaned, such as by plasma cleaning. By cleaning the quality of the dielectric release layer is improved.

In an exemplary embodiment of the present method the dielectric structure 1 may be a large aspect ratio layer, such as with an aspect ratio of >10%, preferably >10%, more preferably >107, such as >108, In an exemplary embodiment of the present methed the dielectric release layer may be selected from Si3N4, Si02, Sic, InGaP, Si, diamond, graphene, and combinations thereof.

In an exemplary embodiment of the present method the dielectric release layer 12 may have a thickness of 3-300 nm, preferably 5-200 nm, more preferably 10-100 nm, such as 20-59 nm.

In an exemplary embodiment of the present dielectric release layer the tensile stress is >1 GPa, preferably > 2 GPa. Maximum values that were obtained are in the order of 4-5 GPa, such as for SiN, i.e. close to rupture of the layers. Such high values are obtained by not relaxing the layers deposited and optionally also further increasing the stress, especially of the tethers. It has been found that in high stress membranes mechanical frequencies are achieved which are independent of thickness and are stress dominated. It is noted that an uitimate yield strength of a Si3N4 thin films is about G GPa, which may be a result of the present processing.

In an exemplary embodiment of the present method the dielectric release layer may have an optical absorption at 450 nm of less than 0.2 %.

In an exemplary embodiment of the present method the dieiectric release layer may have a hardness of > 8.5 Mohs.

In an exemplary embodiment of the present method the dielectric release layer may be ultra clean with < 10 ppm impurities in the layer.

In an exemplary embodiment of the present method the dielectric release layer may have a mechanical quality factor of > 106.

In an exemplary embodiment of the present method the dielectric release layer may have a specific mass of < 1 gr/n2, preferably < 0.1 gr/m.

In an exemplary embodiment of the present method the dielectric release layer may be deposited by at least one of 40 sputtering, evaporating, plasma-enhanced chemical vapor deposition (PECVD), and low-pressure chemical vapor deposition {LPCVD}.

In an exemplary embodiment of the present method etching the dielectric release layer may provide a patterned photonic crystal array having at least one n*m array 9 with holes, wherein a surface area of the holes 5 and array of holes are adapted for reflecting light.

In an exemplary embodiment of the present method the dielectric release layer may have a surface area of > 1 cm?, preferably > 10 cm?, more preferably > 100 cm?, such as up to 10 m?, hence relatively big. The surface area of the crystal array may depend on a final application and an amount of power and frequency that is needed to be generated. For instance, to be used as a chemical sensor, or a light sail, a higher surface area for the photonic mirror assembly could be used.

In an exemplary embodiment of the present product, the product may be selected from a mirror, a light sail, a nanomechanical device, an optomechanical mirror, a NEMS, a MEMS, a nanobridge, a hole, a ribbon, an edge, a sensor, such as for medical sensing, for navigation, for computing, for robotics, for communication, for manufacturing, for chemical sensing, for providing ultrasound, for acceleration, and for mass sensing, and combinations thereof.

In an exemplary embodiment the present product may be a photonic Large-Aspect-Ratio Nano-Thickness Mirror comprising holes, wherein for a given wavelength or range of wavelengths the holes have a cross-sectional length which is 0.25-0.50 * wavelength or 0.25-0.50 * weighted mean of said range of wavelengths, respectively.

In an exemplary embodiment of the present product a space area 8 between the holes is in a range of 35-97% of a surface area of the mirror 13, the remainder of the surface area of the mirror being formed by top surfaces of the holes.

In an exemplary embodiment the present product may comprise ie [2,210] arrays with holes, wherein ni and mi of each array 1 are chosen independently.

In an exemplary embodiment of a photonic mirror assembly, for a given wavelength or range of wavelengths it has been found that the best results in terms of reflectance (%) is 40 when the radius or cross-sectional length of the holes is about 0.25-0.5* of a wavelength to be reflected, preferably

0.3-0.45, more preferably 0.33-0.40 of said wavelength. For instance, for a wavelength of 1550 nm the height is at least 150 nm, preferably 200 nm or more. Likewise, if a wavelength range is provided, such as from 360-600 nm with a weighted mean of 480 nm the height is preferably 160 nm. For some applications such lower reflectance could still be acceptable. Suitable mirrors can be made for optical wavelength in a range of 210-3000 nm. For each wavelength a suitable reflective material can be selected.

The present mirror has improved characteristics, i.e. a good reflectivity (> 99.99%), a low mass, a low noise, and a low dissipation, compared to the prior art.

In an exemplary embodiment the present light sail comprises tethers 11 and wherein the light sail comprises two or more mirror assemblies, preferably 5-10 assemblies.

In an exemplary embodiment the present light sail comprises two or more mirror assemblies, preferably 5-100 assemblies.

In an exemplary embodiment the present method comprises a step of reducing of the stress at the central part of the mirror.

The high stress layer could be Si:Ns deposited by low pressure chemical vapor deposition (LPCVD) on <100> Silicon wafer substrates, or other high stress layers such as SiO, 8iC, InGaP and Si. It is found that SisNg layers deposited by LPCVD at 300-700 °C have few impurities (impurities are annealed at high temperature) and low optical absorptions, which is found crucial for minimizing optical losses. The higher the deposition temperature of Si3N4, the higher stress is obtained (100 MPa-1.5 GPa). The deposition rate is around 1 nm/min, and a typical thickness of SisN4 layers in this invention is 15 nm. The surface area roughness of the SisNa layers is better than 2 nm as can be measured by light scattering (e.g. Semilab SRP-2100}; hence a very smooth surface is obtained.

The invention will hereafter be further elucidated through the following examples which are exemplary and explanatory of nature and are not intended to be considered limiting of the invention. To the person skilled in the art it may be clear 40 that many variants, being obvious or not, may be conceivable falling within the scope of protection, defined by the present claims.

SUMMARY OF THE FIGURES Figures la-h and 2-3 show certain aspects of the present assembly. Figures 4 shows schematics of a light sail.

DETAILED DESCRIPTION OF FIGURES In the figures: 1 dielectric structure 2 light sail 5 surface area hole 7 cross-sectional length hole 8 space area between holes 9 array of holes 11 tether 12 dielectric release layer 13 surface area mirror 14 hole 17 substrate/frame 18 cavity 20 carrier 21 etch protection layer A-A' cross section membrane fu frame upper width fw frame lower width Ms membrane width Fig. la shows a sample with a top and bottom dielectric release layer, typically provided on a silicon substrate. Fig. lb shows a sample with a mask layer 15, which is patterned.

Fig. lc shows a sample with etched dielectric release layer through the patterned and etched mask.

Fig. 1d shows a sample with the mask removed, after etching.

Fig. le shows a sample transferred to a carrier 20. The carrier is provided with a top and bottom etch protection layer 21.

Fig. 1f shows etching of the sample and formation of a cavity 18. 40 Figure 1g shows a fabricated device 100. Therein a Si substrate 17 is partly etched in a central part thereof.

A central membrane 12 is provided.

Figure 1h shows the membrane 12 having a certain width mw.

The frame 17, supporting the membrane, has a height h, an upper width fu, and a lower width fx.

Figure 2 shows a schematic layout of the membrane 12. Four optional tethers 11 are shown attached to the membrane 12. In a central part a mirror 13 is provided with a regular two- dimensional array of holes 14, Each hole has a surface area 5. Typically, the surface areas (and likewise heights) of the holes are substantially the same or equal with respect to one and another (90-110% relative, preferably 99-101% relative, with respect to a mean surface area/height). A dotted line A- A’ is indicated.

Further a width 7 of holes is indicated.

Figure 3 shows a schematic representation of the present mirror.

Also, the array of holes 9 is indicated.

Figure 4 shows a light sail 200, with some mirror assembly with arrays of holes 9 indicated therein.

Typically, most or the whole area of the sail would be covered with mirrors.

The light sail may comprise a large number of present assemblies, together forming one sail.

Experiment For light sails fabrication, most of the silicon substrate is best removed in order to fully suspend a silicon nitride photonic crystal mirror.

A simple series of steps in the fabrication is described.

A substrate, typically a Si wafer, is provided, on which 250 nm SisNg is grown using an LPCVD technique with SiHa4, NH: at about 10 kPa at a growth rate of 50 nm in 13 min.

In a subsequent step a resist is spun on both sides.

An lithographic step is used to define a window on a top part of the product.

The window is then developed and rinsed thereby defining a frame.

The exposed silicon is removed by a KOH etch step.

On a top side a second resist is spun and a mask is used to define holes.

The holes are exposed in a subsequent lithographic step, typically using an E-beam (EBPG6-5000 system; and “ZEP” E-beam resist.

The holes in the silicon nitride are formed by CsFs/SFs plasma etch.

Thereafter the remaining resist on the top and bottom side are removed, such 40 as by a wet etch.

In a next step the substrate (Si) is etched through using 30% KOH or TMAH, at an etch rate of about 1 um/min, leaving only 1-30 microns of silicon. This last 1-30 micron of silicon gives the wafer stability until the last 1- 30 microns of silicon is removed with an SFs etch, leaving behind the suspended (SiN) structure, a frame, and holes together forming a mirror. In order to perform the SFg undercut in a plasma etcher samples are loaded onto a carrier wafer. Typically this wafer is made from silicon, but in the present method the wafer is covered with a protective layer which is mot etched by the SEFs. A protective layer that could be used is silicon dioxide, which is obtained by oxidizing the silicon wafer; however also a number of other protective layers can be used. By covering the carrier wafer with a protective layer, the SFs gas can much more quickly etch the silicon on the sample of interest, whereas without the layer on the carrier, the SFs would also etch the silicon carrier wafer and slow the etch of the sample. The SFs etch consists of a plasma etch with minimal (less than 10 V) or no DC bias so the etch remains isotropic. The plasma etch operates at high pressures of around 1072 mbar which allows the plasma to isotropically etch underneath nancstructures. The main gas used is SFs and sometimes other passivation gasses like 02. The stage for the carrier can be cooled to temperatures of 20°C down to -180°C using liquid nitrogen; this is found to improve selectivity at lower temperatures. Since the SFs is exothermic the etch can be quickly done in 10-4C seconds, or longer, depending on the selectivity and size of the structures. It can also be done in smaller steps of 10-20 seconds each, with a waiting period in between to let the sample cool. After the SFs is completed, (whether a lightsail or nanophotonic device) the nanostructure is free standing and ready for use.

For other applications in nanophotonics, there may be no need to pre-etch the silicon wafer with KOH, and just SFs can be used to undercut a dielectric (SiN) structure.

For the purpose of searching the following section is added, of which the last section represents a translation into Dutch.

1. A method for high selectivity dry release of a dielectric structure (1) for a light sail comprising providing a sample (10), wherein the sample is at least partly 40 covered with a first dielectric release layer (12),

providing a mask (15) on the release layer, selectively etching the mask, selectively etching the release layer through the etched mask with a first gasecus fluorine, removing the mask, providing a carrier (20), covering the carrier with an etch protection layer (21), such as a dielectric protection layer, such as a Si02 protection layer, transferring the etched sample (10) to the carrier, transferring the combined carrier/sample to a dry etch tool, and under-etching the release layer through the remaining release layer and thereby forming at least one cavity (18) underneath the release layer by using a gaseous etchant, such as fluorine, such as SFs, XeF:, and HF vapor.

2. Method according to embodiment 1, wherein after etching with a first gaseous fluorine the sample is cleaned, such as by plasma cleaning.

3. Method according to embodiment 1 or 2, wherein the dielectric structure (1) is a large aspect ratio layer, such as with an aspect ratio of >10%, preferably >10%, more preferably >107, such as >10%,

4. Method according to any of embodiments 1-3, wherein the dielectric release layer is selected from SisN4, SiÔ:, Sic, InGaP, Si, diamond, graphene, and combinations thereof.

5. Method according to any of embodiments 1-4, wherein the dielectric release layer (12) has a thickness of 3-300 nm, preferably 5-200 nm, more preferably 10-100 nm, such as 20-50 nm.

6. Method according to any of embodiments 1-5, wherein the dielectric release layer is provided with a tensile strength >

0.5 GPa, preferably >1 GPa, more preferably > 2 GPa, and/or wherein the dielectric release layer has an optical absorption at 450 nm of less than 0.2 %, and/or wherein the dielectric release layer has a hardness of > 8.5 Mchs, and/or wherein the dielectric release layer is ultra clean with < 10 ppm impurities in the layer, and/or 40 wherein the dielectric release layer has a mechanical quality factor of > 10%, and/or wherein the dielectric release layer has a specific mass of < 1 gr/m2, preferably < 0.1 gr/m:.

7. Method according to any of embodiments 1-6, wherein the dielectric release layer 1s deposited by at least one of sputtering, evaporating, plasma-enhanced chemical vapor deposition (PECVD), and low-pressure chemical vapor deposition (LPCVD) .

8. Method according to any of embodiments 1-7, wherein etching the dielectric release layer provides a patterned photonic crystal array having at least one n*m array (2) with holes, wherein a surface area of the holes (5) and array of holes are adapted for reflecting light.

9. Method according to any of embodiments 1-8, wherein the i5 dielectric release layer has a surface area of > 1 cm?, preferably > 10 cm?, more preferably > 100 cm?.

10. Product obtained by a method according to any of embodiments 1-9, wherein the product is selected from a mirror, a light sail, a nanomechanical device, an optomechanical mirror, a NEMS, a MEMS, a nanobridge, a hole, a ribbon, an edge, a sensor, such as for medical sensing, for navigation, for computing, for robotics, for communicaticn, for manufacturing, for chemical sensing, for providing ultrasound, for acceleration, and for mass sensing, and combinations thereof.

11. Product according to embodiment 10, wherein the product is a photonic Large-Aspect-Ratio Nano-Thickness Mirror comprising holes, wherein for a given wavelength or range of wavelengths the holes have a cross-sectional length which is 0.25-0.50 * wavelength or 0.25-0.50 * weighted mean of said range of wavelengths, respectively, and/or wherein a space area (8) between the holes is in a range of 35-97% of a surface area of the mirror (13), the remainder of the surface area of the mirror being formed by top surfaces of the holes, and/or comprising ie [2,2:] arrays with holes, wherein ni and mi of each array i are chosen independently.

Claims (11)

CONCLUSIONS A high selectivity dry release method of a dielectric structure (1) for a light sail comprising providing a sample (10), wherein the sample is at least partially covered with a first dielectric release layer (12), providing of a mask (15) on the release layer, selectively etching the mask, selectively etching the release layer through the etched mask with a first gaseous fluorine, removing the mask, providing a support (20), coating of the support having an etching protection layer (21), such as a dielectric protection layer, such as a SiO2 protection layer, transferring the etched sample {10) to the support, transferring the combined support/sample to a dry etching tool, and etching the release layer through the remaining release layer and thereby forming at least one cavity (18) under the release layer by using a gaseous etchant, such as fluorine, such as SF, XeFz, and HF vapor. The method of claim 1, wherein after etching with a first gaseous fluorine, the sample is cleaned, such as by plasma cleaning. The method of claim 1 or 2, wherein the dielectric structure (1) is a high aspect ratio layer, such as having an aspect ratio of >10%, preferably >10%, more preferably >107, such as >108. The method of any one of claims 1-3, wherein the dielectric release layer is selected from Si3Ng, SiO2, Sic, InGaP, Si, diamond, graphene, and combinations thereof. A method according to any one of claims 1-4, wherein the dielectric release layer {12) has a thickness of 3-300 nm, preferably 5-200 nm, more preferably 10-100 nm, such as 20-50 nm, A method according to any one of claims 1-5, wherein the dielectric release layer is provided with a tensile strength >0.5 GPa, preferably >1 GPa, more preferably >2 GPa, and/or wherein the dielectric release layer has an optical absorption at 450 nm of less than 0.2%, and/or wherein the dielectric release layer has a hardness of >8.5 Mohs, and/or wherein the dielectric release layer is ultra-pure with <10 ppm impurities in the layer, and/or wherein the dielectric release layer has a mechanical quality factor of >10%, and/or wherein the dielectric release layer has a specific mass of <1 gr/m? preferably <0.1 gr/m 2 . The method of any one of claims 1-6, wherein the dielectric release layer is deposited by at least one of sputtering, evaporation, plasma enhanced chemical vapor deposition (PECVD), and low pressure chemical vapor deposition (LPCVD). A method according to any one of claims 1 to 7, wherein the etching of the release dielectric layer provides a patterned photonic crystal array having at least one n*m array (9) with holes, a surface of the holes (5) and series of holes are adapted for reflecting light. A method according to any one of claims 1-8, wherein the dielectric release layer has an area of >1 cm 2 , preferably >10 cm 2 , more preferably >100 cm 2 . has. A product obtained by a method according to any one of claims 1-9, wherein the product is selected from a mirror, a light sail, a nanomechanical device, an optomechanical mirror, a NEMS, a MEMS, a nanobridge, a hole, a ribbon an edge, a sensor, such as for medical sensing, for navigation, for computing, for robotics, for communications, for manufacturing, for chemical sensing, for providing ultrasound, for acceleration, and for mass sensing, and combinations thereof. The product of claim 10, wherein the product is a high aspect ratio photonic nanothick mirror comprising holes, wherein for a given wavelength or range of wavelengths, the holes have a cross-sectional length that is 0.25-0.50*wavelength or 0, respectively. .25-0.50 * a weighted average of said wavelength range, and/or where a space region (8) between the holes in a range of 35-97% of a surface of the mirror (13), the remainder of the surface of the mirror being formed by top surfaces of the holes, and/or comprising ie [2-2] arrays of holes, where ni and mi of each series i are chosen independently.