NL2007681C2 - Electronic oscillator circuit, and method for generating an oscillation signal. - Google Patents

Description

Electronic oscillator circuit, and method for generating an oscillation signal

The present invention relates to an electronic oscillator, and to a method for generating an oscillation signal. In particular, the invention relates to an electronic oscillator 5 circuit, based on a resonator. The use of a resonator in oscillator circuits is known.

These circuits are for example used to deliver a clock signal in a digital circuit, or in sensor circuits, wherein the oscillators provides a translation function from the resonator to a frequency which is in turn a simpler unit to measure with further electronic means.

10 Prior art circuits fulfd a certain need, but as speed requirements of electronics increase, higher clock signals are required. For that reason, it is known not to use a first resonance frequency of a resonator, but an overtone thereof, for example a third or fifth overtone. Overtones are also referred to as modes. Most resonators support a few if not many modes, but, along with higher frequencies, higher accuracy is required too, and 15 selecting a predetermined mode has appeared to cause several difficulties.

This is because most oscillator circuits do not have a provision for selection of a resonance mode. Yet, for clock references the use of overtones may bring better noise performance, but definitely a higher frequency high quality reference. For sensors the 20 use of an overtone or selected mode may be critical to obtain the right sensitivity.

Some existing oscillator configurations support a mode selection, but then require the use of components like inductors and capacitors that have other specific disadvantages. For instance, a mode selective network in a crystal oscillator is quite possible, but 25 introduces a direct limitation of the resonator accuracy: if the extra frequency selective network must have a relative high quality, its temperature behaviour has a large direct impact on the resonator frequency as reached by the oscillator.

Another difficulty related to the increased frequency and speed requirements is that the 30 start-up behaviour of a resonator oscillator can be quite slow, which creates special points of attention for, for instance, reset procedures for other electronics.

Yet another difficulty is related to overtones of the resonator. In the fabrication of the resonator it may be possible to adapt the resonator such that there is some preference for 2 one specific mode, but typically the adaptation range is quite limited and certainly does not encompass optimization for several modes in one and the same resonator. An amplifier based oscillator already has some difficulty to select a specific mode for which a resonator is designed, and to control the mode in which the resonator is used is 5 even more difficult. In practice this implies that an amplifier based oscillator that can be controlled for resonator mode must carry extra frequency selective networks. As stated before this comes with its own errors, which will impact the accuracy of any application.

10 It is a goal of the present invention to propose an electronic oscillation circuit that overcomes at least part of the above difficulties. It is a further goal of the present invention to provide a method for operating such a circuit.

The invention thereto proposes an electronic oscillator circuit, comprising an oscillator, 15 for supplying an oscillation signal with an oscillation frequency dependent on a control signal, a controller for delivering the control signal as a function of a phase difference between a first controller input and a second controller input, a resonator, such as a piezo-electric oscillator, with at least one resonance frequency, and a phase shift dependent on the difference between the frequency of an exciting signal and the 20 resonance frequency, wherein the oscillation signal is fed back to the first controller input, and wherein the oscillation signal is fed back to the second controller input via the resonator.

The circuit makes use of the property of the resonator that its phase shift is dependent 25 on the difference between the frequency of an exciting signal and the resonance frequency. The circuit may be implemented with any resonator with such a phase dependency, at least in a bandwidth about the resonance frequency. Besides regular crystal resonators, so called MEMS resonators may be used.

30 MEMS resonators are not readily compatible with oscillator circuits according to the prior art. Although the resulting circuit may be larger than traditional oscillators in number of circuit elements, in actual modem chip manufacturing technologies the size difference is negligible or the size is even smaller.

3

The electronic oscillation circuit according to the present invention has specific advantages when it is used in combination with a MEMS resonator, for the construction of a MEMS clock oscillator.

5 According to the state of the art, the resonator needed to be calibrated, by mechanic or chemical means. These means had to be adjusted in the production process. The present invention enables to perform the calibration of the frequency of the oscillator by means of programming, as long as the error is within the controllable range. This goes for MEMS resonators, but also for other resonator types.

10

The controllable oscillator may for instance be a voltage controllable oscillator or a current controllable oscillator which is set to run close to the targeted frequency of the resonator, be it first harmonic (basetone) or any other resonance mode.

15 The oscillation signal from the controllable oscillator is fed back twice; one feedback goes directly to the controller, the other feedback passes through the resonator. The controller preferably comprises a so called down-converter, and may be referred to as such in general in the following.

20 The thus created feedback loop establishes a correct phase relationship between the two branches (which precise value depends on a possibly used down conversion process) and then locks the whole loop in a frequency close to its starting point where the resonator has one of its resonance frequencies.

25 An advantage of the present invention is that a separation of functions takes place, such that the size and time of actuation can be moved around relatively freely in comparison to the way and time that the oscillation is sensed. That is, the use as a function within the sensing side a down conversion so that the resonator’s frequency is down converted to DC or close to DC (a low Intermediate Frequency or IF). By doing this a lot of design 30 problems do not play at operating speed of the oscillator, but near DC where contention of problems is simpler. The down conversion process typically will require an associated filter, which in first instance may be a low pass filter. All elements that perform a function in the circuit may be a simple component, or an electronic circuit.

4

The down-converter can be chosen as symmetrical of with very little temperature sensitivity, both of which are good to get good control over temperature. In a simple example a phase frequency detector (PFD) will typically have two flip-flops in a symmetrical cross-coupled configuration, meaning it is possible to be drawn as 100% 5 symmetrical, leaving small implementation deviations as residual error only. Typical examples of down-converters are flip-flops, mixers and some non-linear devices.

An extra element can be taken up to compensate for instance the parallel capacitor of a crystal. Thus it becomes relatively simple to compensate the impedance from that 10 parallel capacitor, which is attractive as at higher resonator overtones the relevant impedance remains better visible, which means that the loop can more readily lock to higher overtones. In general, a compensation element for compensating a parasitic transfer through the resonator may be included in the circuit. Such circuit may comprise an opposite or complementary transfer function compared with the parasitic one.

15

With a circuit according to the invention, it is very easy to choose the resonance mode, and make that choice programmable. Even if the wrong mode is ‘found’ first, it remains simple to adjust the mode by applying a minor or major shift of the operating frequency of the controllable oscillator, for instance by changing the limits of the control voltage 20 of the controllable oscillator, or tune the capacitor in an LC oscillator.

Thereto, the oscillation signal may be fed back via a divider. A divider after the controllable oscillator in the feedback path will make sure the controllable oscillator runs at high frequencies (for then the lock can come to its steady state point). This is 25 attractive in modern chip technologies, where design of a multi-GHz oscillator results in better phase noise (when expressed in time) then lower frequencies, better isolation from external disturbances due to the small geometries. There are many applications that can directly use the high controllable oscillator frequency, for instance for RF. Further, changing a division factor, which can be relatively easily done, extends the 30 choice of frequencies without impacting the noise performance a lot.

The invention will now be explained into more detail with reference to the following figures. Herein: - Figure 1 shows a first embodiment of an electronic oscillation circuit; 5 - Figure 2 shows a second embodiment of a electronic oscillation circuit; - Figure 3 shows a third embodiment of a electronic oscillation circuit; - Figure 4 shows a fourth embodiment of a electronic oscillation circuit; - Figure 5 shows a fifth embodiment of a electronic oscillation circuit; 5 - Figure 6 shows a sixth embodiment of a electronic oscillation circuit; - Figure 7 shows a seventh embodiment of a electronic oscillation circuit; - Figure 8 shows a eighth embodiment of a electronic oscillation circuit; - Figure 9 shows a ninth embodiment of a electronic oscillation circuit; and - Figure 10 shows a tenth embodiment of a electronic oscillation circuit.

10

Figure 1 shows a first embodiment of a electronic oscillation circuit, in a very simple form, wherein the controller comprises a down-converter and a loop filter. The circuit is operated as follows.

15 The controllable oscillator starts at its start frequency, which will be chosen close to the targeted resonator frequency, and will be between some minimum and maximum frequency that can be reached by the controllable oscillator. This accurate choice is very well possible in modem controllable oscillator design on chip, as spread of the oscillator parameters is quite limited in for instance controlled LC oscillators, and factory loaded 20 tables allow for first order parameter correction. The start time will be extremely small (range of a few ns), even for an LC oscillator, as its resonator quality is low and its working frequency is high.

The down-converter senses the direct feedback directly as one input. The resonator 25 receives this frequency signal which will be close to, but most probably not precisely on the resonator frequency. Because of this difference the resonator will show a phase shift such that the down-converter will ‘sense’ the phase shift. The complete loop will be responding then such that the phase shift is made correct for resonance, at which moment the resonance becomes fact. It could be said that while not in precise resonance 30 the resonator leads the loop in a direction of its target, while at resonance there is steady state behaviour.

If there is noise in one of the loop elements other than the resonator, the noise directly will give rise to some phase shift into the down-converter, which will become corrected.

6

Although the controllable oscillator initial frequency accuracy is severely limited, the fast start-up is of major interest for establishing a clock for circuits that badly require a clock. For circuits that need the precise frequency the loop can be monitored for lock: as 5 soon as lock is established the signal can be put out to for instance radio frequency senders. This combined behaviour of fast but inaccurate clock and slower but accurate clock covers many applications.

Sensing is well separated in time and actuation quantity, as the down conversion is the 10 sensing element without directly implying actuation, and the controllable oscillator with divider is the actuation side without directly implying the sensing side. In a non-exhaustive list: actuation of the resonator might be in the voltage domain or the current domain, vice versa the sensing side may have current or voltage oriented properties (high or low impedance). As an example of application of this: a crystal can be made to 15 run in series mode by having a voltage actuator and current sensor side, or in parallel mode by having the actuator in current mode and the sensor side in voltage mode. But for another type of resonator, such as a capacitively coupled MEMS resonator, both input and output can be chosen in voltage domain, or if more desired the derived domain of charge.

20

Delays in the loop are not directly impacting performance of the oscillator as the loop carries its correction information in the near DC spectrum. Thus all kinds of correction measures can be made without impacting the overall performance. For instance, dynamically limiting the controllable oscillator range is possible, which is attractive as 25 it means that an overtone resonator will never be allowed to oscillate on its base tone. And also: if it can be detected that the controllable oscillator runs on a wrong overtone mode, the change of the controllable oscillator range will help find the correct overtone.

The only limitations to the resonance accuracy can be found in the limitation of the 30 phase shift over the resonator, which probably needs to be precisely 0 for best performance. This phase is reached if the different oscillator paths have identical delay and matching. Thus the frequency performance of the system is limited by the differential differences between the two paths, so for instance in the mixer, or possible different delays from the controllable oscillator to resonator and down-converter.

7

The use of the controllable oscillator at high frequencies can be simply combined with what in theory is known as “Impulse sensitivity function analysis”. In short this analysis method points to the possibility of driving the resonator (in time) at the peak of its 5 amplitude, while the phase results in clock edges around the zero crossings. The impulse sensitivity function analysis will show that a high quality resonator will have extremely low phase noise sensitivity when driven at its amplitude peak. According to the invention it is possible to use for best noise performance: supply short pulses to the resonator to sustain the oscillation at the peaks in time. The short pulses may introduce 10 new problems in the loop, such as sensitivity for offset in timing paths and such, but these elements will not directly break stability, at most require a smaller loop bandwidth for safe operation. But since the method would generate less phase noise to begin with this can be very attractive.

15 The impulse sensitivity function can be used. The high quality of the resonator will not only make the transfer of impulse noise to phase noise on the amplitude peak very small, but also the time period directly around that peak. Thus a noisy divider (jumpy in time) is not a principally huge problem. Use can be made in the feedback of a fractional divider instead of an integer divider. A fractional divider must ‘round’ to oscillator 20 signal edges, so it’s output signal will always be jumpy in its appearance, but the crystal suppresses that to low phase noise. Thus it is possible to use fractional techniques to come to a controllable oscillator frequency which has a fractional relationship with the resonator frequency. This in turn can be applied for first order temperature compensation, or generate an output frequency which is not on the integer grid 25 (multiples) of the resonator frequency, or to correct production inaccuracies. This method relies on the high quality of the resonator (narrow band, sometimes higher order) instead of relying on frequency synthesis techniques where the filtering and matching must rely on circuit elements with much lower qualities. The fractional divider of course may make use of delta sigma techniques as in regular frequency 30 synthesis, to make sure the frequency components of jitter do not contain low frequency sources, which would start pulling the resonator by repetition, which is the same as low frequency content.

8

Figure 2 shows a down conversion oscillator including a divider in the feedback. The steady state solution dictates that the controllable oscillator runs at higher speed so that after the divider the desired frequency is reached. This allows direct generation of high frequencies as multiples of the resonance frequency, simpler integration, good phase 5 performance of the controllable oscillator. An extra is that an acute change of the divider could help to select another resonance mode: the controllable oscillator will run at some frequency and change of the divider would change the frequency that is offered to the resonator.

10 Further advantage is the presence of a higher frequency so that extra engineering choices are provided for applying an energy restoration moment at an optimal moment. As is shown in generic impulse sensitivity functions it is attractive to energize the resonator at amplitude peaks. Noise on the energizer side is than well suppressed, especially if the quality of the resonator is high.

15

Figure 3 shows an electronic oscillation circuit with a block diagram with an additional pulse shaper for optimal noise rejection. The controllable oscillator is not implicitly controlled to have a limited frequency range. Although it is so that any controllable oscillator will have a natural limited range, it is worth the while to add an explicit 20 limiter function.

Figure 4 shows an embodiment with an explicit limiter function. The limiter function makes selection of the range of the controllable oscillator frequency possible. In this sense it is quite comparable to the divider, both giving fine control over the resonance 25 mode that is selected.

Figure 5 shows an embodiment with a mixer as a down-converter. The circuit is adapted for use of a linear mixer, which actually ‘expects’ 90 degrees phase difference between its two inputs when in steady state. For that purpose, an IQ divider is added, which can 30 be readily built as a two bit inverse feedback shiftregister (and then divides by an extra factor 4, which can be taken along in the feedback factor). The IQ divider yields two signals I and Q, of which the Q lags 90 degrees behind I. The mixer sees and expects in the steady state resonance situation two signals with a 90 degrees difference, and thus will carry an average 0 on its output. Depending on used resonator, actuation and 9 sensing it may be necessary to swap the I and Q lines, as the whole loop needs to maintain negative feedback. This block diagram does incur some spurious as the mixer generates, amongst others, twice the resonators frequency, which will feed through the loop filter a bit, which introduces a small modulation on the controllable oscillator. This 5 modulation may or may not be suppressed if the controllable oscillator is divided before being used. If not the related spurious can be suppressed with extra filter means in or near the loop filter like resampling or a notch filter.

Figure 6 shows an embodiment with flip-flops arranged as a phase frequency detector 10 (PFD) as down-converter. In this block diagram spurious do not play a large role as the loop will carry a ‘no-energy’ signal from the PFD when in lock.

Figure 7 shows an embodiment with parasitic transfer compensation, for the first diagram in a very limited and simple fashion. The embodiment comprises a PFD as 15 down-converter, with additional compensation of the parallel capacity Cp. Not shown in this block diagram is the possibility to use automatic compensation by adjusting the Ccompensation to track dynamic behaviour of Cp. This may require the use of an image rejection mixer, which is quite standard in radio frequency engineering, and is left in this discussion except for the remark that a mixer with its inputs parallel with the shown 20 PFD would already do the trick as the phase relationships at resonance would be giving next to perfect amplitude detection on the output of that mixer.

Figure 8 shows an embodiment adapted for injection the resonator signal at an optimal moment. The expected noise performance can be improved by making sure that the energy supply of the resonator happens at optimal moments, probably at the peak of the 25 amplitude of the resonator, not close to the zero crossings. The best moment can be found with impulse response function analysis. In use, all dividers and the pulse shaper run on the maximum frequency in the system (in the drawing freq out). An advantage of the present invention with respect to the state of the art is that a higher frequency is used to time actions.

30

Figure 9 shows an embodiment for superhet construction with required second frequency. In a large variation of the superhet approach it is also possible to use an IF which is not low but instead very high. This is actually easier to integrate and gives the possibility of passive components for filtering. For both up and down-converters 10 however an extra clock is required for doing the 2nd down conversion, and in order to get a non-DC IF, the 1st down conversion also needs another frequency than present in the block diagram. In a generic approach this can readily be solved with extra dividers.

5 There are many variants for choosing the various frequencies, as the IF frequency is now actually an extra freedom of design choice, and more complex blocks can be used, like PLL’s, controllable oscillators, or a simpler counter. The latter is simpler but may be slightly more restrictive due to the requirements of the dividers.

10 In an embodiment, the first conversion is an up conversion, and the IF frequency will be freqjDuC(1 /div2-1 /div 1), and thus the requirement is obtained that freqjDut/div3 =freq_out* (1 /div2-1 /div 1), or div3=div 1 * div2/(|div 1 -div2|).

Simpler choices are available like using div2=l/2divl, so that div3=divl, so that only 15 two dividers are required.

Figure 10 shows an embodiment with a fractional divider in the feedback. In this block diagram the extra elements are: the fractional dividerl forces the freq out signal to the resonator frequency *divl, thus enabling the setting of the output frequency in a fine 20 grid. The resonator rejects the large jitter from the fractional divider by proper timing through the pulse shaper and by its own quality, the first converter mixes with a clean signal as divider2 uses an integer division factor div2. Because it may be desired to dynamically control the fractional division number in dividerl (that gives control over the frequency on the output), in general no relation can be determined between the 25 various division factors. Divider 3 must be derived from the formula (div3=divl*div2/(|divl-div2|), which will almost always become fractional. Because it is complex to make the 2nd frequency converter work nicely with such a jittery divided signal if the IF is a high frequency signal, the choice will probably be to use a low frequency IF. At low frequency the relative jitter of the signal out of divider 3 will be 30 small (a pulse modulation depth is quite limited), and cause little harm in for instance a switched cap filter, which may be the implementation of choice for the second down-converter.

11

In this embodiment the pulse shaper uses the freq out as time basis. The fractional dividers may be of the delta sigma type. Such counters have the property that the peak-peak jitter on the output of the divider is larger than the minimum possible, in exchange for the jitter being as much as possible high frequent. This is essential for at certain set 5 fractional divl numbers the resulting disturbance on the resonator would be so low frequent that the loop would start reacting, and the output would show a large low frequent frequency wobble, which is unintended. Instead all jitter is pushed out to high frequencies where the loop can readily suppress it.

10 When the resonator frequency is 10MHz, then delta sigma shaping would have its OdB point on 10MHz/6=1.6MHz. Suppose further the same 10MHz resonator has a Q of 100.000, which boils down to a -3dB bandwidth of 100Hz, at baseband +-50Hz around DC. Suppose finally the resonator is a common type, with first order roll off. Then the resulting suppression only from the spectral distance would be 1.6MHz/50=32k, about 15 90dB all by itself. This gives an impression of how convenient it is to not only use the resonator as reference, but also as filter.

It will be clear that the proposed circuit opens a lot of opportunities to reduce implementation limitations, and is such a very versatile method.

20

In the figures, the following references are used: 1 Resonator 12 Compensation 2 Down conversion 13 1st Down Conversion 25 3 Loop filter 14 IF filter 4 Controlled Oscillator 15 2nd Down Conversion 5 Freq out 16 Divider 3 6 Divider 17 Divider 2 7 PDF 18 Divider 1

30 8 Pulse shaper 19 IF

9 Limiter 20 Fractional Divider 3 10 Mixer 21 Fractional Divider 1 11 IQ Divider 22 min 23 max

Claims (15)

An electronic oscillator circuit comprising: an oscillator for supplying an oscillation signal with an oscillation frequency dependent on a control signal; a control for supplying the control signal as a function of a phase difference between a first control input and a second control input; a resonator, with at least one resonance frequency, and 10. a phase shift depending on the frequency difference between a generation signal and the resonance frequency; wherein the oscillation signal is fed back to the first control input, and wherein 15. the oscillation signal is fed back to the second control input. The electronic oscillator circuit of claim 1, wherein the oscillation signal is fed back via a divider. The electronic oscillator circuit of claim 2, wherein the divisor is a fractional divisor. 4. An electronic oscillator circuit according to any one of the preceding claims, wherein the oscillation signal which is fed back to the resonator is located in an interval around an overtone resonance frequency of the resonator. Electronic oscillator circuit according to one of the preceding claims, wherein the control comprises a down-converter and a loop filter. The electronic oscillator circuit of any one of the preceding claims, wherein either the oscillation signal that is fed back to the first control input, or the oscillation signal that is fed back to the second control input via the resonator via a phase shift component, with a predetermined phase shift that is a difference between the phase shift of the resonator when it is in resonance, and a phase shift in which the control is arranged to determine an equilibrium state of the oscillator circuit. The electronic oscillator circuit according to claim 6, wherein the down converter comprises a linear mixer, and wherein either the oscillation signal that is fed back to the first control input, or the oscillation signal that is fed back to the second control input via the resonator, is fed back via a 90 carrier phase shift component. 10 The electronic oscillator circuit of claim 7, wherein the 90-degree phase shift component comprises an IQ divider. 9. An electronic oscillator circuit according to any one of the preceding claims, wherein the oscillation signal which is fed back via the resonator is fed back via a pulse shaper. 10. Electronic oscillator circuit according to any one of the preceding claims, wherein the control comprises a limiter, for limiting the minimum and maximum frequency of the control signal. 11. Electronic oscillator circuit according to any one of the preceding claims, wherein the control comprises a plurality of downlink transducers, connected in series, for obtaining a plurality of intermediate frequencies between the resonator and the controllable oscillator. The electronic oscillator circuit of claim 10, wherein the oscillation signal is fed back to each of the down converters, to each via a respective divider. 30 Electronic oscillator circuit according to one of the preceding claims, comprising a compensation element to compensate for a parasitic transfer through the resonator. The electronic oscillator circuit according to any of the preceding claims, wherein the resonator is a MEMS resonator. A method for providing an oscillation signal, comprising: 5. activating an oscillator to provide the oscillation signal; generating a resonator with the oscillation signal to generate a resonator signal. determining a phase difference between the oscillation signal and the resonator signal; 10. controlling the oscillator such that the phase difference is given a predetermined value.