NL144120B - METHOD FOR MANUFACTURING A THIN-LAYER CIRCUIT, AND THE CIRCUIT OBTAINED ACCORDING TO THIS METHOD. - Google Patents

METHOD FOR MANUFACTURING A THIN-LAYER CIRCUIT, AND THE CIRCUIT OBTAINED ACCORDING TO THIS METHOD.

Info

Publication number
NL144120B
NL144120B NL686810890A NL6810890A NL144120B NL 144120 B NL144120 B NL 144120B NL 686810890 A NL686810890 A NL 686810890A NL 6810890 A NL6810890 A NL 6810890A NL 144120 B NL144120 B NL 144120B
Authority
NL
Netherlands
Prior art keywords
circuit
thin
manufacturing
obtained according
layer circuit
Prior art date
Application number
NL686810890A
Other languages
Dutch (nl)
Other versions
NL6810890A (en
Original Assignee
Lucas Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lucas Industries Ltd filed Critical Lucas Industries Ltd
Publication of NL6810890A publication Critical patent/NL6810890A/xx
Publication of NL144120B publication Critical patent/NL144120B/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/05Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/053Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142Metallic substrates having insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/01Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
    • H01L27/016Thin-film circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N97/00Electric solid-state thin-film or thick-film devices, not otherwise provided for
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrochemical Coating By Surface Reaction (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
NL686810890A 1967-08-03 1968-07-31 METHOD FOR MANUFACTURING A THIN-LAYER CIRCUIT, AND THE CIRCUIT OBTAINED ACCORDING TO THIS METHOD. NL144120B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB3574867 1967-08-03
GB939168 1968-02-27

Publications (2)

Publication Number Publication Date
NL6810890A NL6810890A (en) 1969-02-05
NL144120B true NL144120B (en) 1974-11-15

Family

ID=26242903

Family Applications (1)

Application Number Title Priority Date Filing Date
NL686810890A NL144120B (en) 1967-08-03 1968-07-31 METHOD FOR MANUFACTURING A THIN-LAYER CIRCUIT, AND THE CIRCUIT OBTAINED ACCORDING TO THIS METHOD.

Country Status (6)

Country Link
JP (1) JPS4919551B1 (en)
CA (1) CA924418A (en)
DE (1) DE1765884A1 (en)
FR (1) FR1584094A (en)
NL (1) NL144120B (en)
SE (1) SE347861B (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SU470249A1 (en) * 1972-12-20 1976-08-05 Предприятие П/Я Г-4515 Chip
JPS5211843U (en) * 1975-07-14 1977-01-27
CA1137649A (en) * 1980-07-10 1982-12-14 Guy J. Chaput Electrical circuit on porcelain coated metal substrate
IL110431A (en) * 1994-07-25 2001-08-08 Microcomponents And Systems Lt Method of manufacturing a composite structure for use in electronic device and structure manufactured by said method
FR2763780B1 (en) * 1997-05-20 1999-08-13 Sagem METHOD FOR MANUFACTURING PRINTED CIRCUITS ON A METAL SUBSTRATE
NL1033519C2 (en) * 2007-03-08 2008-09-16 Yun Tai Semiconductor heat-transfer involves treating high conductivity metal substrate by electrolytic oxidation to provide oxidized insulation layer, covering metal conducting layer, and installing electronic device and bonding lead wires
EP3749054A1 (en) 2019-06-03 2020-12-09 Patentbox Internacional, S.L. Arrangement of elements in an electric heating plate and its manufacturing procedure

Also Published As

Publication number Publication date
NL6810890A (en) 1969-02-05
CA924418A (en) 1973-04-10
DE1765884A1 (en) 1972-02-03
FR1584094A (en) 1969-12-12
SE347861B (en) 1972-08-14
JPS4919551B1 (en) 1974-05-18

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