FR1584094A - - Google Patents

Info

Publication number
FR1584094A
FR1584094A FR1584094DA FR1584094A FR 1584094 A FR1584094 A FR 1584094A FR 1584094D A FR1584094D A FR 1584094DA FR 1584094 A FR1584094 A FR 1584094A
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Application granted granted Critical
Publication of FR1584094A publication Critical patent/FR1584094A/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142—Metallic substrates having insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/01—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
    • H01L27/016—Thin-film circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N97/00—Electric solid-state thin-film or thick-film devices, not otherwise provided for
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Electrochemical Coating By Surface Reaction (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
FR1584094D 1967-08-03 1968-08-02 Expired FR1584094A (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB3574867 1967-08-03
GB939168 1968-02-27

Publications (1)

Publication Number Publication Date
FR1584094A true FR1584094A (fr) 1969-12-12

Family

ID=26242903

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1584094D Expired FR1584094A (fr) 1967-08-03 1968-08-02

Country Status (6)

Country Link
JP (1) JPS4919551B1 (fr)
CA (1) CA924418A (fr)
DE (1) DE1765884A1 (fr)
FR (1) FR1584094A (fr)
NL (1) NL144120B (fr)
SE (1) SE347861B (fr)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2211835A1 (fr) * 1972-12-20 1974-07-19 Smolko Gennady
EP0044138A2 (fr) * 1980-07-10 1982-01-20 Northern Telecom Limited Circuit électrique sur un substrat métallique recouvert de porcelaine
WO1996003771A1 (fr) * 1994-07-25 1996-02-08 Micro Components & Systems Ltd. Procede de fabrication d'une structure composite s'adaptant a des dispositifs electroniques et procede de fabrication
EP0880310A1 (fr) * 1997-05-20 1998-11-25 Sagem S.A. Procédé de fabrication de circuits imprimés sur substrat métallique
NL1033519C2 (nl) * 2007-03-08 2008-09-16 Yun Tai Werkwijze voor warmteoverdracht bij halfgeleiders.
EP3749054A1 (fr) 2019-06-03 2020-12-09 Patentbox Internacional, S.L. Agencement d'éléments dans une plaque de chauffage électrique et son procédé de fabrication

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5211843U (fr) * 1975-07-14 1977-01-27

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2211835A1 (fr) * 1972-12-20 1974-07-19 Smolko Gennady
EP0044138A2 (fr) * 1980-07-10 1982-01-20 Northern Telecom Limited Circuit électrique sur un substrat métallique recouvert de porcelaine
EP0044138A3 (en) * 1980-07-10 1983-04-20 Northern Telecom Limited Electrical circuit on porcelain coated metal substrate
WO1996003771A1 (fr) * 1994-07-25 1996-02-08 Micro Components & Systems Ltd. Procede de fabrication d'une structure composite s'adaptant a des dispositifs electroniques et procede de fabrication
US5661341A (en) * 1994-07-25 1997-08-26 Microcomponents And Systems Ltd. Method of manufacturing a composite structure for use in electronic devices and structure, manufactured by said method
EP0880310A1 (fr) * 1997-05-20 1998-11-25 Sagem S.A. Procédé de fabrication de circuits imprimés sur substrat métallique
FR2763780A1 (fr) * 1997-05-20 1998-11-27 Sagem Procede de fabrication de circuits imprimes sur substrat metallique
NL1033519C2 (nl) * 2007-03-08 2008-09-16 Yun Tai Werkwijze voor warmteoverdracht bij halfgeleiders.
EP3749054A1 (fr) 2019-06-03 2020-12-09 Patentbox Internacional, S.L. Agencement d'éléments dans une plaque de chauffage électrique et son procédé de fabrication

Also Published As

Publication number Publication date
NL144120B (nl) 1974-11-15
DE1765884A1 (de) 1972-02-03
CA924418A (en) 1973-04-10
SE347861B (fr) 1972-08-14
JPS4919551B1 (fr) 1974-05-18
NL6810890A (fr) 1969-02-05

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Legal Events

Date Code Title Description
ST Notification of lapse