NL1022177A1 - Inrichting en werkwijze voor het afhandelen van zeer lange instructiewoorden met variabele lengte. - Google Patents
Inrichting en werkwijze voor het afhandelen van zeer lange instructiewoorden met variabele lengte.Info
- Publication number
- NL1022177A1 NL1022177A1 NL1022177A NL1022177A NL1022177A1 NL 1022177 A1 NL1022177 A1 NL 1022177A1 NL 1022177 A NL1022177 A NL 1022177A NL 1022177 A NL1022177 A NL 1022177A NL 1022177 A1 NL1022177 A1 NL 1022177A1
- Authority
- NL
- Netherlands
- Prior art keywords
- handling
- variable length
- long instruction
- instruction words
- words
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
- G06F9/3891—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
- G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2002-0007532A KR100464406B1 (ko) | 2002-02-08 | 2002-02-08 | 가변길이 vliw 명령어를 위한 디스패치 장치 및 방법 |
KR20020007532 | 2002-02-08 |
Publications (2)
Publication Number | Publication Date |
---|---|
NL1022177A1 true NL1022177A1 (nl) | 2003-08-11 |
NL1022177C2 NL1022177C2 (nl) | 2005-07-27 |
Family
ID=27656428
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NL1022177A NL1022177C2 (nl) | 2002-02-08 | 2002-12-16 | Inrichting en werkwijze voor het afhandelen van zeer lange instructiewoorden met variabele lengte. |
Country Status (4)
Country | Link |
---|---|
US (1) | US7366874B2 (nl) |
KR (1) | KR100464406B1 (nl) |
FR (1) | FR2835934B1 (nl) |
NL (1) | NL1022177C2 (nl) |
Families Citing this family (40)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2370380B (en) | 2000-12-19 | 2003-12-31 | Picochip Designs Ltd | Processor architecture |
US6968444B1 (en) | 2002-11-04 | 2005-11-22 | Advanced Micro Devices, Inc. | Microprocessor employing a fixed position dispatch unit |
US8484441B2 (en) | 2004-03-31 | 2013-07-09 | Icera Inc. | Apparatus and method for separate asymmetric control processing and data path processing in a configurable dual path processor that supports instructions having different bit widths |
US9047094B2 (en) * | 2004-03-31 | 2015-06-02 | Icera Inc. | Apparatus and method for separate asymmetric control processing and data path processing in a dual path processor |
US7949856B2 (en) * | 2004-03-31 | 2011-05-24 | Icera Inc. | Method and apparatus for separate control processing and data path processing in a dual path processor with a shared load/store unit |
GB2420884B (en) * | 2004-12-03 | 2009-04-15 | Picochip Designs Ltd | Processor architecture |
US7676647B2 (en) * | 2006-08-18 | 2010-03-09 | Qualcomm Incorporated | System and method of processing data using scalar/vector instructions |
GB2454865B (en) | 2007-11-05 | 2012-06-13 | Picochip Designs Ltd | Power control |
US20090292908A1 (en) * | 2008-05-23 | 2009-11-26 | On Demand Electronics | Method and arrangements for multipath instruction processing |
KR101553652B1 (ko) | 2009-02-18 | 2015-09-16 | 삼성전자 주식회사 | 이종 프로세서에 대한 명령어 컴파일링 장치 및 방법 |
GB2470037B (en) | 2009-05-07 | 2013-07-10 | Picochip Designs Ltd | Methods and devices for reducing interference in an uplink |
GB2470771B (en) | 2009-06-05 | 2012-07-18 | Picochip Designs Ltd | A method and device in a communication network |
GB2470891B (en) | 2009-06-05 | 2013-11-27 | Picochip Designs Ltd | A method and device in a communication network |
GB2474071B (en) | 2009-10-05 | 2013-08-07 | Picochip Designs Ltd | Femtocell base station |
US9678754B2 (en) * | 2010-03-03 | 2017-06-13 | Qualcomm Incorporated | System and method of processing hierarchical very long instruction packets |
GB2482869B (en) | 2010-08-16 | 2013-11-06 | Picochip Designs Ltd | Femtocell access control |
GB2489919B (en) | 2011-04-05 | 2018-02-14 | Intel Corp | Filter |
GB2489716B (en) | 2011-04-05 | 2015-06-24 | Intel Corp | Multimode base system |
GB2491098B (en) | 2011-05-16 | 2015-05-20 | Intel Corp | Accessing a base station |
US9753733B2 (en) * | 2012-06-15 | 2017-09-05 | Apple Inc. | Methods, apparatus, and processors for packing multiple iterations of loop in a loop buffer |
GB2514397B (en) | 2013-05-23 | 2017-10-11 | Linear Algebra Tech Ltd | Corner detection |
US9727113B2 (en) | 2013-08-08 | 2017-08-08 | Linear Algebra Technologies Limited | Low power computational imaging |
US9146747B2 (en) | 2013-08-08 | 2015-09-29 | Linear Algebra Technologies Limited | Apparatus, systems, and methods for providing configurable computational imaging pipeline |
US9910675B2 (en) | 2013-08-08 | 2018-03-06 | Linear Algebra Technologies Limited | Apparatus, systems, and methods for low power computational imaging |
US11768689B2 (en) | 2013-08-08 | 2023-09-26 | Movidius Limited | Apparatus, systems, and methods for low power computational imaging |
US10001993B2 (en) | 2013-08-08 | 2018-06-19 | Linear Algebra Technologies Limited | Variable-length instruction buffer management |
US9196017B2 (en) | 2013-11-15 | 2015-11-24 | Linear Algebra Technologies Limited | Apparatus, systems, and methods for removing noise from an image |
US9270872B2 (en) | 2013-11-26 | 2016-02-23 | Linear Algebra Technologies Limited | Apparatus, systems, and methods for removing shading effect from image |
US10015048B2 (en) | 2014-12-27 | 2018-07-03 | Intel Corporation | Programmable protocol parser for NIC classification and queue assignments |
US9825862B2 (en) | 2015-08-26 | 2017-11-21 | Barefoot Networks, Inc. | Packet header field extraction |
US10523764B2 (en) * | 2015-09-24 | 2019-12-31 | Barefoot Networks, Inc. | Data-plane stateful processing units in packet processing pipelines |
US9923816B2 (en) | 2015-09-24 | 2018-03-20 | Barefoot Networks, Inc. | Data-plane stateful processing units in packet processing pipelines |
US9912774B2 (en) | 2015-12-22 | 2018-03-06 | Intel Corporation | Accelerated network packet processing |
US10460704B2 (en) | 2016-04-01 | 2019-10-29 | Movidius Limited | Systems and methods for head-mounted display adapted to human visual mechanism |
US10419366B1 (en) | 2017-01-31 | 2019-09-17 | Barefoot Networks, Inc. | Mechanism for communicating to remote control plane from forwarding element |
US10694006B1 (en) | 2017-04-23 | 2020-06-23 | Barefoot Networks, Inc. | Generation of descriptive data for packet fields |
US10826840B1 (en) | 2017-07-23 | 2020-11-03 | Barefoot Networks, Inc. | Multiple copies of stateful tables |
US10594630B1 (en) | 2017-09-28 | 2020-03-17 | Barefoot Networks, Inc. | Expansion of packet data within processing pipeline |
US10949947B2 (en) | 2017-12-29 | 2021-03-16 | Intel Corporation | Foveated image rendering for head-mounted display devices |
US11204768B2 (en) | 2019-11-06 | 2021-12-21 | Onnivation Llc | Instruction length based parallel instruction demarcator |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6002880A (en) | 1992-12-29 | 1999-12-14 | Philips Electronics North America Corporation | VLIW processor with less instruction issue slots than functional units |
JP2880459B2 (ja) * | 1995-10-13 | 1999-04-12 | 松下電器産業株式会社 | 可変語長vliw命令プロセッサ |
US5761506A (en) * | 1996-09-20 | 1998-06-02 | Bay Networks, Inc. | Method and apparatus for handling cache misses in a computer system |
US5958044A (en) * | 1997-01-24 | 1999-09-28 | Texas Instruments Incorporated | Multicycle NOP |
US6173389B1 (en) * | 1997-12-04 | 2001-01-09 | Billions Of Operations Per Second, Inc. | Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor |
US5974537A (en) * | 1997-12-29 | 1999-10-26 | Philips Electronics North America Corporation | Guard bits in a VLIW instruction control routing of operations to functional units allowing two issue slots to specify the same functional unit |
US6076154A (en) * | 1998-01-16 | 2000-06-13 | U.S. Philips Corporation | VLIW processor has different functional units operating on commands of different widths |
US6061786A (en) | 1998-04-23 | 2000-05-09 | Advanced Micro Devices, Inc. | Processor configured to select a next fetch address by partially decoding a byte of a control transfer instruction |
US6317820B1 (en) * | 1998-06-05 | 2001-11-13 | Texas Instruments Incorporated | Dual-mode VLIW architecture providing a software-controlled varying mix of instruction-level and task-level parallelism |
US6356994B1 (en) | 1998-07-09 | 2002-03-12 | Bops, Incorporated | Methods and apparatus for instruction addressing in indirect VLIW processors |
US6219780B1 (en) * | 1998-10-27 | 2001-04-17 | International Business Machines Corporation | Circuit arrangement and method of dispatching instructions to multiple execution units |
US6249861B1 (en) * | 1998-12-03 | 2001-06-19 | Sun Microsystems, Inc. | Instruction fetch unit aligner for a non-power of two size VLIW instruction |
US6405300B1 (en) * | 1999-03-22 | 2002-06-11 | Sun Microsystems, Inc. | Combining results of selectively executed remaining sub-instructions with that of emulated sub-instruction causing exception in VLIW processor |
EP1102165A1 (en) | 1999-11-15 | 2001-05-23 | Texas Instruments Incorporated | Microprocessor with execution packet spanning two or more fetch packets |
-
2002
- 2002-02-08 KR KR10-2002-0007532A patent/KR100464406B1/ko not_active IP Right Cessation
- 2002-12-03 US US10/309,295 patent/US7366874B2/en not_active Expired - Lifetime
- 2002-12-16 NL NL1022177A patent/NL1022177C2/nl not_active IP Right Cessation
- 2002-12-30 FR FR0216863A patent/FR2835934B1/fr not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR100464406B1 (ko) | 2005-01-03 |
FR2835934A1 (fr) | 2003-08-15 |
NL1022177C2 (nl) | 2005-07-27 |
KR20030067892A (ko) | 2003-08-19 |
FR2835934B1 (fr) | 2006-05-19 |
US20030154358A1 (en) | 2003-08-14 |
US7366874B2 (en) | 2008-04-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
AD1A | A request for search or an international type search has been filed | ||
RD2N | Patents in respect of which a decision has been taken or a report has been made (novelty report) |
Effective date: 20050520 |
|
PD2B | A search report has been drawn up | ||
V1 | Lapsed because of non-payment of the annual fee |
Effective date: 20150701 |