MY181499A - Low-profile footed power package - Google Patents

Low-profile footed power package

Info

Publication number
MY181499A
MY181499A MYPI2017704183A MYPI2017704183A MY181499A MY 181499 A MY181499 A MY 181499A MY PI2017704183 A MYPI2017704183 A MY PI2017704183A MY PI2017704183 A MYPI2017704183 A MY PI2017704183A MY 181499 A MY181499 A MY 181499A
Authority
MY
Malaysia
Prior art keywords
die
package
die pad
lead
heat
Prior art date
Application number
MYPI2017704183A
Inventor
Richard K Williams
Keng-Hung Lin
Original Assignee
Adventive Tech Ltd
Richard K Williams
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US14/703,359 external-priority patent/US9620439B2/en
Application filed by Adventive Tech Ltd, Richard K Williams filed Critical Adventive Tech Ltd
Publication of MY181499A publication Critical patent/MY181499A/en

Links

Classifications

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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

A power package includes a heat tab extending from a die pad exposed on the underside of the package, which facilitates the removal of heat from the die to the PCB or other surface on which the package is mounted. The heat tab has a bottom surface coplanar with the flat bottom surface of the die pad and bottom surface of a lead. The lead includes a horizontal foot segment, a vertical columnar segment, and a horizontal cantilever segment facing the die pad. The heat tab may also have a foot. A die containing a power device is mounted on a top surface of the die pad and may be electrically connected to the lead using a bonding wire or clip. The die may be mounted on the die pad with an electrically conductive material, and the package may also include a lead that extends from the die pad and is thus electrically tied to die bottom of the die. The result is a package with a minimal footprint that is suitable for the technique known as "wave soldering" that is used in relatively low-cost printed circuit board assembly factories. Methods of fabricating the package are disclosed.
MYPI2017704183A 2015-05-04 2016-05-02 Low-profile footed power package MY181499A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/703,359 US9620439B2 (en) 2013-03-09 2015-05-04 Low-profile footed power package
PCT/US2016/030456 WO2016179111A1 (en) 2015-05-04 2016-05-02 Low-profile footed power package

Publications (1)

Publication Number Publication Date
MY181499A true MY181499A (en) 2020-12-23

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Application Number Title Priority Date Filing Date
MYPI2017704183A MY181499A (en) 2015-05-04 2016-05-02 Low-profile footed power package

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CN (1) CN107924901A (en)
MY (1) MY181499A (en)
TW (1) TWI601253B (en)
WO (1) WO2016179111A1 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10121742B2 (en) * 2017-03-15 2018-11-06 Amkor Technology, Inc. Method of forming a packaged semiconductor device using ganged conductive connective assembly and structure
US10727151B2 (en) * 2017-05-25 2020-07-28 Infineon Technologies Ag Semiconductor chip package having a cooling surface and method of manufacturing a semiconductor package
CN111279471B (en) * 2017-11-10 2023-09-15 新电元工业株式会社 electronic module
CN110190004A (en) * 2019-06-11 2019-08-30 山东海声尼克微电子有限公司 A kind of welding procedure for high-current supply Module bond

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4935803A (en) * 1988-09-09 1990-06-19 Motorola, Inc. Self-centering electrode for power devices
US6307755B1 (en) * 1999-05-27 2001-10-23 Richard K. Williams Surface mount semiconductor package, die-leadframe combination and leadframe therefor and method of mounting leadframes to surfaces of semiconductor die
US6891256B2 (en) * 2001-10-22 2005-05-10 Fairchild Semiconductor Corporation Thin, thermally enhanced flip chip in a leaded molded package
US9305859B2 (en) * 2006-05-02 2016-04-05 Advanced Analogic Technologies Incorporated Integrated circuit die with low thermal resistance
US9831393B2 (en) * 2010-07-30 2017-11-28 Cree Hong Kong Limited Water resistant surface mount device package
CN102468292B (en) * 2010-10-29 2015-02-25 万国半导体股份有限公司 Packaging body structure for direct current-direct current convertor
US8513787B2 (en) * 2011-08-16 2013-08-20 Advanced Analogic Technologies, Incorporated Multi-die semiconductor package with one or more embedded die pads
US9576884B2 (en) * 2013-03-09 2017-02-21 Adventive Ipbank Low profile leaded semiconductor package

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TWI601253B (en) 2017-10-01
TW201642420A (en) 2016-12-01
WO2016179111A1 (en) 2016-11-10
CN107924901A (en) 2018-04-17

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